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    • 9. 发明授权
    • Low power display mode
    • 低功耗显示模式
    • US08314806B2
    • 2012-11-20
    • US11322880
    • 2006-04-13
    • Eric SamsonAditya NavaleTodd Witter
    • Eric SamsonAditya NavaleTodd Witter
    • G09G5/39
    • G06F3/14G09G5/006G09G5/008G09G5/363G09G5/39G09G2330/021
    • A controller is described that includes wiring to transport notification that a FIFO that holds data to be used to display content on a display has reached a threshold. The controller also includes first control circuitry to turn on a phase locked loop (PLL) circuit to cause logic circuitry within the controller downstream from the PLL to begin to receive a first clock in response to the notification. The logic circuitry is to transport data read from a memory toward the FIFO. The controller also includes second control circuitry to cause the memory to use a second clock provided by the controller in response to the notification.
    • 描述了一种控制器,其包括用于传送通知的连接,即在显示器上保存用于显示内容的数据的FIFO已经达到阈值。 该控制器还包括第一控制电路,用于接通锁相环(PLL)电路,以使PLL内的控制器内的逻辑电路响应该通知开始接收第一时钟。 逻辑电路是将从存储器读取的数据传输到FIFO。 控制器还包括第二控制电路,以使存储器响应于该通知使用由控制器提供的第二时钟。