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1. 发明申请

US20050265127A1 Real time clock circuit having an internal clock generator 失效
公开(公告)号：US20050265127A1
公开(公告)日：2005-12-01
申请号：US11196111
申请日：2005-08-03
申请人： Eric Retter , John Sutton
发明人： Eric Retter , John Sutton
IPC分类号： G04G5/00 , G04G15/00 , G04C11/02
CPC分类号： G04G15/006 , G04R20/02
摘要： Under the present invention a real time clock circuit, within a set-top box, is provided with an internal clock generator for generating multiple clock signals. Once generated, a first clock signal is divided into an initial set of values representing time and optionally day/date intervals, and then communicated to a set of clock registers. The initial set of values can then be communicated (directly or via a set of DCR registers) to a display component within the set-top box. Updated clock signals are received by the set of DCR registers from an external source such as a satellite or the like thus making the clock very accurate, and are communicated to the display component. Similar to the initial set of values, the updated set of values could be communicated to the display component directly from the set of DCR registers, or via the set of clock registers.

2. 发明授权

US5244451A Method for operating a worm centrifuge having a pressurized gas introduction 失效
标题翻译：具有加压气体介绍的运行中心的方法
公开(公告)号：US5244451A
公开(公告)日：1993-09-14
申请号：US835780
申请日：1992-02-14
申请人： Eric Retter
发明人： Eric Retter
IPC分类号： B04B1/20 , B04B11/02 , B04B15/08
CPC分类号： B04B11/02 , B04B1/20 , B04B15/08
摘要： A method for operating and improving the throughput and efficiency of a worm centrifuge by introducing, at a controlled frequency, successive pressure surges into the concentrated sludge fraction within the bowl separator preceding the solids discharge opening whereby the pulse frequency and the level of pressure are controllable and can be controlled as a function of the sludge fraction throughput through the separator.
摘要翻译：一种用于通过以受控的频率将连续的压力冲击引入固体排放口之前的碗分离器内的浓缩污泥级分中来操作和改善蠕虫离心机的生产率和效率的方法，由此脉冲频率和压力水平是可控的并且可以作为通过分离器的污泥馏分通过量的函数来控制。

3. 发明授权

US08675444B2 Synchronized command throttling for multi-channel duty-cycle based memory power management 失效
标题翻译：用于多通道占空比的存储器电源管理的同步命令调节
公开(公告)号：US08675444B2
公开(公告)日：2014-03-18
申请号：US13314379
申请日：2011-12-08
申请人： John Dodson , Karthick Rajamani , Eric Retter , Kenneth Wright
发明人： John Dodson , Karthick Rajamani , Eric Retter , Kenneth Wright
IPC分类号： G11C8/00
CPC分类号： G06F3/0644 , G06F1/32 , G06F1/3206 , G06F1/3275 , G06F13/16 , G11C5/147 , G11C11/4074 , Y02D10/14
摘要： A technique for memory command throttling in a partitioned memory subsystem includes accepting, by a master memory controller included in multiple memory controllers, a synchronization command. The synchronization command includes command data that includes an associated synchronization indication (e.g., a synchronization bit or bits) for each of the multiple memory controllers and each of the multiple memory controllers controls a respective partition of the partitioned memory subsystem. In response to receiving the synchronization command, the master memory controller forwards the synchronization command to the multiple memory controllers. In response to receiving the forwarded synchronization command each of the multiple memory controllers de-asserts an associated status bit. In response to receiving the forwarded synchronization command, each of the multiple memory controllers determines whether the associated synchronization indication is asserted. Each of the multiple memory controllers with the asserted associated synchronization indication then transmits the forwarded synchronization command to associated power control logic.
摘要翻译：在分区存储器子系统中用于存储器命令调节的技术包括由包含在多个存储器控制器中的主存储器控制器接受同步命令。同步命令包括命令数据，其包括用于多个存储器控制器中的每一个的相关联的同步指示（例如，同步位或位），并且多个存储器控制器中的每一个控制分区存储器子系统的相应分区。响应于接收到同步命令，主存储器控制器将同步命令转发到多个存储器控制器。响应于接收到转发的同步命令，多个存储器控制器中的每个存储器控制器断言相关联的状态位。响应于接收到转发的同步命令，多个存储器控制器中的每一个确定相关联的同步指示是否被断言。具有断言的相关同步指示的多个存储器控制器中的每一个然后将转发的同步命令发送到相关联的功率控制逻辑。

4. 发明申请

US20060179334A1 Dynamic power management via DIMM read operation limiter 失效
标题翻译：通过DIMM读取操作限制器进行动态电源管理
公开(公告)号：US20060179334A1
公开(公告)日：2006-08-10
申请号：US11054392
申请日：2005-02-09
申请人： Mark Brittain , Edgar Cordero , James Fields , Warren Maule , Eric Retter
发明人： Mark Brittain , Edgar Cordero , James Fields , Warren Maule , Eric Retter
IPC分类号： G06F1/32
CPC分类号： G06F1/3225 , G06F1/206 , Y02D10/16
摘要： A method and system for enabling directed temperature/power management at the DIMM-level and/or DRAM-level utilizing intelligent scheduling of memory access operations received at the memory controller. Hot spots within the memory subsystem, caused by operating the DIMMs/DRAMs above predetermined/preset threshold power/temperature values for operating a DIMM and/or a DRAM, are avoided/controlled by logic within the memory controller. The memory controller logic throttles the number/frequency at which commands (read/write operations) are issued to the specific DIMM/DRAM based on feedback data received from the specific DIMM/DRAM reaching the preset threshold power usage value.
摘要翻译：一种用于利用在存储器控制器处接收的存储器访问操作的智能调度在DIMM级和/或DRAM级实现定向温度/电源管理的方法和系统。由存储器控制器内的逻辑避免/控制存储器子系统内由于将DIMM / DRAM操作在用于操作DIMM和/或DRAM的预定/预设阈值功率/温度值以上的热点。存储器控制器逻辑基于从特定DIMM / DRAM接收的反馈数据达到预设阈值功率使用值，来限制向特定DIMM / DRAM发出命令（读/写操作）的数量/频率。

5. 发明授权

US5252209A Solid bowl worm centrifuge with improved discharge openings 失效
标题翻译：固体碗蜗杆离心机具有改进的排放口
公开(公告)号：US5252209A
公开(公告)日：1993-10-12
申请号：US871046
申请日：1992-04-20
申请人： Eric Retter
发明人： Eric Retter
IPC分类号： B04B1/20
CPC分类号： B04B1/20 , B04B2001/2041 , B04B2001/2091
摘要： A centrifugal separator for the separation a slurry into a light phase fraction and a heavy phase fraction including a rotatable shell having a cylindrical portion and a conical portion with a rotatable auger therein and a light phase opening at one end and a heavy phase opening at a second end sized to throttle the flow of light phase liquid and heavy phase liquid and sized in the cross-sectional area ratio of A/B so that the discharge from the separator will continue to be in the ratio of A/B regardless of throughput and in one form the separator has a second heavy phase opening in the cylindrical portion and in another form, an annular barrier vane on the auger blocking flow of liquid fraction toward the heavy fraction opening.
摘要翻译：一种离心分离器，用于将浆料分离成轻相分数和重相分数，其包括具有圆柱形部分的可旋转壳体和具有可旋转螺旋钻头的圆锥形部分，并且在一端具有轻质相开口，第二端尺寸以节流轻相液体和重相液体的流动，并且尺寸为A / B的横截面积比，使得来自分离器的排出物将继续以A / B的比例而不考虑生产量和在一种形式中，分离器在圆柱形部分中具有第二重相开口，并且在另一种形式中，螺旋钻上的环形阻挡叶片阻止液体部分朝向重馏分开口的流动。

6. 发明申请

US20060181942A1 Switching a defective signal line with a spare signal line without shutting down the computer system 失效
标题翻译：在不关闭计算机系统的情况下用备用信号线切换有缺陷的信号线
公开(公告)号：US20060181942A1
公开(公告)日：2006-08-17
申请号：US11056886
申请日：2005-02-11
申请人： Edgar Cordero , James Fields, , Kevin Gower , Eric Retter
发明人： Edgar Cordero , James Fields, , Kevin Gower , Eric Retter
IPC分类号： G11C29/00
CPC分类号： G06F11/10 , G06F11/2007 , G11C29/025 , G11C2029/0409
摘要： A method, computer program product and system for switching a defective signal line with a spare signal line without shutting down the computer system. A service processor monitors error correction code (ECC) check units configured to detect an error in a signal line. If an ECC check unit detects an error rate that exceeds a threshold, then the signal line with such an error rate may be said to be “defective.” The service processor configures switch control units in the driver/receiver pair associated with the defective signal line to be able to switch the defective signal line with a spare line upon receipt of a command from a memory controller switch control unit. In this manner, the system is not deactivated in order to switch a defective signal line with a spare line thereby reducing the time that the processor cannot send information to the memory buffers.
摘要翻译：一种用于在不关闭计算机系统的情况下用备用信号线切换有缺陷的信号线的方法，计算机程序产品和系统。服务处理器监视配置成检测信号线中的错误的纠错码（ECC）检查单元。如果ECC检查单元检测到错误率超过阈值，则具有这种错误率的信号线可能被认为是“有缺陷的”。服务处理器配置与缺陷信号线相关联的驱动器/接收器对中的开关控制单元，以便在从存储器控制器开关控制单元接收到命令时能够用备用线切换故障信号线。以这种方式，为了用备用线切换有缺陷的信号线，系统不被去激活，从而减少处理器不能向存储器缓冲器发送信息的时间。

7. 发明申请

US20060179358A1 System and method for recovering from errors in a data processing system 失效
标题翻译：用于从数据处理系统中的错误中恢复的系统和方法
公开(公告)号：US20060179358A1
公开(公告)日：2006-08-10
申请号：US11054186
申请日：2005-02-09
申请人： Edgar Cordero , James Fields , Kevin Gower , Eric Retter , Scott Swaney
发明人： Edgar Cordero , James Fields , Kevin Gower , Eric Retter , Scott Swaney
IPC分类号： G06F11/00
CPC分类号： G06F11/1441 , G06F11/2028
摘要： A system and method of recovering from errors in a data processing system. The data processing system includes one or more processor cores coupled to one or more memory controllers. The one or more memory controllers include at least a first memory interface coupled to a first memory and at least a second memory interface coupled to a second memory. In response to determining an error has been detected in the first memory, access to the first memory via the first memory interface is inhibited. Also, the first memory interface is locally restarted without restarting the second memory interface.
摘要翻译：一种从数据处理系统中的错误中恢复的系统和方法。数据处理系统包括耦合到一个或多个存储器控制器的一个或多个处理器核心。一个或多个存储器控制器至少包括耦合到第一存储器的第一存储器接口和耦合到第二存储器的至少第二存储器接口。响应于确定在第一存储器中检测到错误，禁止经由第一存储器接口访问第一存储器。此外，第一个存储器接口在本地重新启动，而不重新启动第二个存储器接口。

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