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    • 1. 发明授权
    • Efficient motion vector detection
    • 高效的运动矢量检测
    • US06590937B1
    • 2003-07-08
    • US08283830
    • 1994-08-01
    • Eiji OguraMasatoshi TakashimaKeitaro Yamashita
    • Eiji OguraMasatoshi TakashimaKeitaro Yamashita
    • H04N718
    • H04N19/51G06T7/231G06T2207/10016
    • A reference block is divided in the horizontal direction into small blocks, and is also divided in the vertical direction into small blocks. Feature values representing each of the small blocks formed from the reference block are obtained. Similarly, a check block is divided in the horizontal and vertical directions into small blocks and feature values representing the small blocks formed from the check block are obtained. The feature values in the horizontal direction of the reference and check blocks are compared, and the feature values in the vertical direction of the reference and check blocks are compared. The results of the two comparisons comprise an evaluation value by which the degree of matching of the reference and check blocks is evaluated. The check block is moved throughout a predetermined search range, and the process is repeated for each position of the check block. A motion vector is produced between the reference block and the check block position at which the check block best matches the reference block.
    • 参考块在水平方向上划分成小块,并且在垂直方向上也被划分成小块。 获得表示从参考块形成的每个小块的特征值。 类似地,检查块在水平和垂直方向上被划分为小块,并且获得表示由检查块形成的小块的特征值。 比较参考和检查块的水平方向的特征值,并比较参考和检查块的垂直方向上的特征值。 两个比较的结果包括评估参考和检查块的匹配程度的评估值。 检查块在预定的搜索范围内移动,并且对于检查块的每个位置重复该过程。 在参考块和检查块位置之间产生运动矢量,在该位置,检查块与参考块最匹配。
    • 3. 发明授权
    • Recording control system
    • 录音控制系统
    • US5182680A
    • 1993-01-26
    • US659568
    • 1991-02-22
    • Keitaro YamashitaEiji Ogura
    • Keitaro YamashitaEiji Ogura
    • G11B20/10G11B15/02G11B15/087G11B20/00H04N5/913H04N5/93
    • G11B15/087G11B15/02G11B20/00086H04N5/913H04N2005/91321H04N5/93
    • A recording control system for preventing undesirable copy of information reproduced from a video tape onto another tape. The system includes a unit for receiving audio and video information signals from a video tape reproducing apparatus, a circuit for receiving an identification code from the video tape reproducing apparatus, a circuit for receiving timing signals from the video tape reproducing apparatus, a circuit for decoding the received identification code with reference to the received timing signals to generate recording control signals, a unit for recording the received audio and video information signals onto a video tape, and a circuit for controlling an operation of the recording unit in response to the recording control signals.
    • 一种记录控制系统,用于防止从录像带再现的信息的不期望的复制到另一个磁带上。 该系统包括用于从视频磁带再现装置接收音频和视频信息信号的单元,用于从视频磁带再现装置接收识别码的电路,用于从视频磁带再现装置接收定时信号的电路,用于解码的电路 参考接收到的定时信号接收的识别码以产生记录控制信号,用于将接收到的音频和视频信息信号记录到录像带上的单元,以及用于响应于记录控制来控制记录单元的操作的电路 信号。
    • 4. 发明授权
    • Shift registers, display panels, display devices, and electronic devices
    • 移位寄存器,显示面板,显示设备和电子设备
    • US08860652B2
    • 2014-10-14
    • US13593424
    • 2012-08-23
    • Keitaro Yamashita
    • Keitaro Yamashita
    • G09G3/36
    • G09G3/3674G09G2310/0286G09G2320/0223
    • A shift register is provided. In each of successively cascaded shift register units, for a first switch, control and output terminals are coupled to a first node and an output node respectively, and an input terminal receives a first clock signal. For a second switch, input and output terminals are coupled to the control terminal of the second switch and the first node respectively. For a third switch, a control terminal is coupled to the first node, and an input terminal receives the first clock signal. A first capacitor is coupled between an output terminal of the third switch and the first node. For a fourth switch, an input terminal is coupled to the first node, and an output terminal is coupled to a low voltage terminal. For a current shift register, a control terminal of the second switch receives an output signal generated by previous shift register unit.
    • 提供移位寄存器。 在连续级联移位寄存器单元的每一个中,对于第一开关,控制和输出端分别耦合到第一节点和输出节点,并且输入端子接收第一时钟信号。 对于第二开关,输入和输出端分别耦合到第二开关的控制端和第一节点。 对于第三开关,控制端子耦合到第一节点,并且输入端子接收第一时钟信号。 第一电容器耦合在第三开关的输出端和第一节点之间。 对于第四开关,输入端子耦合到第一节点,并且输出端子耦合到低电压端子。 对于当前移位寄存器,第二开关的控制端子接收由先前移位寄存器单元产生的输出信号。
    • 5. 发明授权
    • Display device using pixel memory circuit to reduce flicker with reduced power consumption
    • 使用像素存储电路的显示装置可降低功耗降低闪烁
    • US08736591B2
    • 2014-05-27
    • US13278538
    • 2011-10-21
    • Keitaro Yamashita
    • Keitaro Yamashita
    • G09G3/36G06F3/038G09G5/00
    • G09G3/3648G09G2300/0439G09G2300/0842G09G2310/0251G09G2310/08G09G2320/0247
    • A display device where a memory circuit is installed into each pixel without generating flicker, including a plurality of pixels arranged in a matrix, wherein each pixel has a light-transmissive element controlling the amount of transmissive light in response to a voltage difference between a first electrode and a second electrode, a memory circuit storing the voltage level of the first electrode, and a controller. In the case where the first electrode has a positive voltage level with respect to the second electrode at a refreshing timing, the controller makes the memory circuit store the voltage level of the first electrode, applies a first predetermined voltage to the second electrode to increase the voltage level of the first electrode by the first predetermined voltage, and discharges the first electrode so that the first electrode has a negative voltage level with respect to the second electrode.
    • 一种显示装置,其中存储电路被安装到每个像素中而不产生闪烁,包括排列成矩阵的多个像素,其中每个像素具有光传输元件,其响应于第一 电极和第二电极,存储第一电极的电压电平的存储电路和控制器。 在第一电极在刷新定时相对于第二电极具有正电压电平的情况下,控制器使存储电路存储第一电极的电压电平,向第二电极施加第一预定电压以增加第 第一电极的电压电平达到第一预定电压,并且使第一电极放电,使得第一电极相对于第二电极具有负电压电平。
    • 6. 发明授权
    • Drive circuit
    • 驱动电路
    • US08665248B2
    • 2014-03-04
    • US12332751
    • 2008-12-11
    • Keitaro Yamashita
    • Keitaro Yamashita
    • G06F3/038
    • G09G3/3677
    • A drive circuit is disclosed. The drive circuit includes a first p-typed thin film transistor (PTFT), a second PTFT, a first n-typed thin film transistor (NTFT), a second NTFT and a capacitor. The drain of the first PTFT is coupled to a first electrical line, and the gate thereof is coupled to a first clock line. The drain of the second PTFT is coupled to a second clock line, and the source thereof is coupled to an output. The source of the first NTFT is coupled to a second electrical line, and the gate thereof is couple to an output of a preceding drive circuit. The source of the second NTFT is couple to a third electrical line, the gate thereof is coupled to a third clock line, and the drain thereof is coupled to the output. The capacitor has one end coupled to the second electrical line, while the other end is coupled to the source of the first PTFT, the drain of the first NTFT and the gate of the second PTFT.
    • 公开了一种驱动电路。 驱动电路包括第一p型薄膜晶体管(PTFT),第二PTFT,第一n型薄膜晶体管(NTFT),第二NTFT和电容器。 第一PTFT的漏极耦合到第一电线,并且其栅极耦合到第一时钟线。 第二PTFT的漏极耦合到第二时钟线,并且其源极耦合到输出端。 第一NTFT的源极耦合到第二电线,并且其栅极耦合到先前的驱动电路的输出端。 第二NTFT的源耦合到第三电线,其栅极耦合到第三时钟线,并且其漏极耦合到输出端。 电容器具有耦合到第二电线的一端,而另一端耦合到第一PTFT的源极,第一NTFT的漏极和第二PTFT的栅极。
    • 7. 发明授权
    • Miniaturized demultiplexer and electronic device using same
    • 小型化解复用器和使用其的电子设备
    • US07948295B2
    • 2011-05-24
    • US12404112
    • 2009-03-13
    • Keitaro Yamashita
    • Keitaro Yamashita
    • H03K17/00
    • H03K17/693G09G3/3648G09G3/3688G09G2300/0828G09G2300/0842G09G2310/0297H03K17/007
    • A demultiplexer includes an input terminal for providing an input signal, a plurality of output terminals for outputting the input signal, and a switching circuit coupled among the input terminal and the plurality of output terminals, and outputting the input signal selectively from the plurality of output terminals according to a plurality of control signals provided to a plurality of control terminals. For miniaturizing the demultiplexer, the switching circuit includes one or more switch elements connected between the input terminal and each of the output terminals in series, wherein at least two of the switch elements coupled to different output terminals are simultaneously switched in response to one control signal from the plurality of control terminals.
    • 解复用器包括用于提供输入信号的输入端子,用于输出输入信号的多个输出端子以及耦合在输入端子和多个输出端子之间的开关电路,并且从多个输出端选择性地输出输入信号 终端根据提供给多个控制终端的多个控制信号。 为了使多路分解器小型化,开关电路包括串联连接在输入端和每个输出端之间的一个或多个开关元件,其中响应一个控制信号同时切换耦合到不同输出端的至少两个开关元件 从多个控制终端。
    • 8. 发明申请
    • ACTIVE-MATRIX TYPE DISPLAY DEVICE AND AN ELECTRONIC APPARATUS HAVING THE SAME
    • 主动矩阵型显示装置和具有该活动矩阵类型显示装置的电子装置
    • US20100177083A1
    • 2010-07-15
    • US12652717
    • 2010-01-05
    • Keitaro Yamashita
    • Keitaro Yamashita
    • G06F3/038G09G3/20G09G3/36G09G3/32
    • G09G3/20G09G3/3225G09G3/3648G09G2300/0852G09G2310/06
    • A display device whose pixels being embedded with a memory is disclosed. These pixels each includes: a capacitor; a switching unit between the display unit and the capacitor, being turning on during the sampling period; and a voltage detecting circuit for detecting the voltage between the capacitor and the switching unit. Besides, the display unit also includes: a first capacitor voltage source connected to a terminal of the capacitor which is not connected to the voltage detecting circuit, and applying a predetermined voltage within the variation range of the voltage state of the display unit on the capacitor in the sampling period; and/or a second capacitor voltage source, being connected to a terminal of the display unit which is not connected to the switching unit, and applying a predetermined voltage within the variation range of the voltage state of the display unit on the display unit in the sampling period.
    • 公开了一种其嵌入存储器的像素的显示装置。 这些像素包括:电容器; 显示单元和电容器之间的切换单元在采样周期期间导通; 以及用于检测电容器和开关单元之间的电压的电压检测电路。 此外,显示单元还包括:连接到电容器的未连接到电压检测电路的端子的第一电容器电压源,并且在电容器的显示单元的电压状态的变化范围内施加预定电压 在抽样期间 和/或第二电容器电压源,连接到未连接到开关单元的显示单元的端子,并且在显示单元的显示单元的电压状态的变化范围内施加预定电压 抽样期。
    • 9. 发明申请
    • ACTIVE MATRIX DISPLAY APPARATUS WITH TOUCH SENSING FUNCTION
    • 具有触摸感应功能的主动矩阵显示设备
    • US20100001970A1
    • 2010-01-07
    • US12497451
    • 2009-07-02
    • Keitaro Yamashita
    • Keitaro Yamashita
    • G06F3/041
    • G06F3/0412G02F1/13338G02F2201/40G06F3/045
    • An active matrix display apparatus with touch sensing function having high aperture ratio includes a plurality of pixels, having respective pixels arrayed as a matrix, positioned at intersections of source lines of respective columns and gate lines of respective rows, each pixel having a thin film transistor and a liquid crystal element, which is positioned between a drain of thin film transistors and a common line; and a touch switch unit having touch sensing transistors and a mechanical switch, which is positioned between two adjacent pixels in an identical column. The gates of the touch sensing transistors are coupled to the gate lines of the two adjacent pixels wherein the touch sensing transistors coupled in series and the mechanical switch shared by the adjacent pixels, are coupled between the source line of the identical column and the common line.
    • 具有高开口率的触摸感测功能的有源矩阵显示装置包括多个像素,其具有排列成矩阵的各个像素,位于相应列的源极线和各行栅极线的交点处,每个像素具有薄膜晶体管 以及位于薄膜晶体管的漏极和公共线之间的液晶元件; 以及触摸开关单元,其具有触摸感测晶体管和位于相同列中的两个相邻像素之间的机械开关。 触摸感测晶体管的栅极耦合到两个相邻像素的栅极线,其中串联耦合的触摸感测晶体管和由相邻像素共享的机械开关耦合在相同列的源极线和公共线之间 。
    • 10. 发明授权
    • Charge pump circuit and electronic circuit provided therewith, and method for driving charge pump circuit
    • 电荷泵电路及其电子电路,以及驱动电荷泵电路的方法
    • US07579901B2
    • 2009-08-25
    • US11578997
    • 2005-04-25
    • Keitaro Yamashita
    • Keitaro Yamashita
    • G05F1/10G05F3/02
    • H02M3/073H02M1/36
    • It is an object of the present invention to reliably avoid problems with a load connected when stopping the operation of a charge pump circuit. The charge pump circuit is provided with a first switching element (S1) connected to a power supply, a second switching element (S2) connected to a load (102)and a capacitor element (Cp) connected between the first switching element (S1) and the second switching element (S2), and moves charge in a direction opposite to the direction in which charge moves during normal operation by inverting the phase of any one of clock signals applied to the first switching element (S1), second switching element (S2) and capacitor element (Cp) during normal operation.
    • 本发明的目的是可靠地避免在停止电荷泵电路的操作时所连接的负载的问题。 电荷泵电路设置有连接到电源的第一开关元件(S1),连接到负载(102)的第二开关元件(S2)和连接在第一开关元件(S1)之间的电容元件(Cp) 和第二开关元件(S2),通过使施加到第一开关元件(S1)的时钟信号中的任何一个的相位相反,第二开关元件(S1)和第二开关元件(S2)的相位相反地沿与正常工作期间的充电移动方向相反的方向移动电荷, S2)和电容元件(Cp)。