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1. 发明申请

US20130257846A1 LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR DRIVING SAME 有权
标题翻译：液晶显示装置及其驱动方法
公开(公告)号：US20130257846A1
公开(公告)日：2013-10-03
申请号：US13993922
申请日：2011-12-12
申请人： Eiji Matsuda , Yasushi Sasaki , Yuhichiroh Murakami , Seijirou Gyouten , Shuji Nishi , Makoto Yokoyama
发明人： Eiji Matsuda , Yasushi Sasaki , Yuhichiroh Murakami , Seijirou Gyouten , Shuji Nishi , Makoto Yokoyama
IPC分类号： G09G3/36
CPC分类号： G09G3/3618 , G09G3/3648 , G09G2300/0852 , G09G2300/0857 , G09G2300/0876
摘要： A memory-type liquid crystal display device includes transistors (N1, N2), retention electrodes (MRY), refresh output control sections (RS1), and capacitors (Cb1). In a data retention period, an electric potential of each of the retention electrodes (MRY) is changed via a corresponding one of the capacitors (Cb1) by changing an electric potential level of a retention capacitor wire signal that is supplied to a corresponding CS line (CSL(i)). Each of the refresh output control sections (RS1) receives the electric potential thus changed of a corresponding one of the retention electrodes (MRY) via the input section and controls an electric potential of a corresponding pixel electrode (PIX) in accordance with the electric potential thus changed.
摘要翻译：记忆型液晶显示装置包括晶体管（N1，N2），保持电极（MRY），刷新输出控制部分（RS1）和电容器（Cb1）。在数据保持期间，通过改变提供给相应的CS行的保持电容配线信号的电位电平，经由相应的一个电容器（Cb1）来改变每个保持电极（MRY）的电位（CSL（i））。每个刷新输出控制部分（RS1）经由输入部分接收相应的一个保持电极（MRY）所改变的电位，并根据电位控制对应的像素电极（PIX）的电位从而改变了。

2. 发明授权

US09076400B2 Liquid crystal display device and method for driving same 有权
标题翻译：液晶显示装置及其驱动方法
公开(公告)号：US09076400B2
公开(公告)日：2015-07-07
申请号：US13993922
申请日：2011-12-12
申请人： Eiji Matsuda , Yasushi Sasaki , Yuhichiroh Murakami , Seijirou Gyouten , Shuji Nishi , Makoto Yokoyama
发明人： Eiji Matsuda , Yasushi Sasaki , Yuhichiroh Murakami , Seijirou Gyouten , Shuji Nishi , Makoto Yokoyama
IPC分类号： G09G3/36
CPC分类号： G09G3/3618 , G09G3/3648 , G09G2300/0852 , G09G2300/0857 , G09G2300/0876
摘要： A memory-type liquid crystal display device includes transistors (N1, N2), retention electrodes (MRY), refresh output control sections (RS1), and capacitors (Cb1). In a data retention period, an electric potential of each of the retention electrodes (MRY) is changed via a corresponding one of the capacitors (Cb1) by changing an electric potential level of a retention capacitor wire signal that is supplied to a corresponding CS line (CSL(i)). Each of the refresh output control sections (RS1) receives the electric potential thus changed of a corresponding one of the retention electrodes (MRY) via the input section and controls an electric potential of a corresponding pixel electrode (PIX) in accordance with the electric potential thus changed.
摘要翻译：记忆型液晶显示装置包括晶体管（N1，N2），保持电极（MRY），刷新输出控制部分（RS1）和电容器（Cb1）。在数据保持期间，通过改变提供给相应的CS行的保持电容配线信号的电位电平，经由相应的一个电容器（Cb1）来改变每个保持电极（MRY）的电位（CSL（i））。每个刷新输出控制部分（RS1）经由输入部分接收相应的一个保持电极（MRY）所改变的电位，并根据电位控制对应的像素电极（PIX）的电位从而改变了。

3. 发明申请

US20120176388A1 LIQUID CRYSTAL DISPLAY DEVICE AND DRIVE METHOD THEREFOR 有权
标题翻译：液晶显示装置及其驱动方法
公开(公告)号：US20120176388A1
公开(公告)日：2012-07-12
申请号：US13395536
申请日：2010-05-26
申请人： Makoto Yokoyama , Shige Furuta , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
发明人： Makoto Yokoyama , Shige Furuta , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G5/39
CPC分类号： G09G3/3648 , G02F1/13624 , G09G2300/043 , G09G2300/0819 , G09G2300/0852 , G09G2300/0876 , G09G2310/063 , G09G2310/08 , G09G2320/0219 , G09G2320/0247 , G09G2340/0428
摘要： In a memory liquid crystal display device, a potential of a storage capacitor line signal (CS) supplied to the CS lines (CSL(i)) are once decreased (ΔVcs) while the gate lines (GL(i)) are made simultaneously active (period t4, period t10) in the data holding period (T2), and the potential of the storage capacitor line signal (CS) is made back to its original potential while the gate lines (GL(i)) are made simultaneously inactive and the refresh output control lines (RC(i)) are made active (period t5, period t11). This reduces flicker, thereby allowing for improvement in display quality of the memory liquid crystal display device.
摘要翻译：在存储器液晶显示装置中，提供给CS线（CSL（i））的辅助电容配线信号（CS）的电位在制作栅极线（GL（i））时一度减小（＆Dgr; Vcs）数据保持期间（T2）中同时有效（周期t4，期间t10），并且保持电容配线信号（CS）的电位恢复到原来的电位，而同时进行栅极线（GL（i））并且刷新输出控制线（RC（i））被激活（时段t5，周期t11）。这减少了闪烁，从而可以提高存储器液晶显示装置的显示质量。

4. 发明授权

US08791895B2 Liquid crystal display device and drive method therefor 有权
标题翻译：液晶显示装置及其驱动方法
公开(公告)号：US08791895B2
公开(公告)日：2014-07-29
申请号：US13395536
申请日：2010-05-26
申请人： Makoto Yokoyama , Shige Furuta , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
发明人： Makoto Yokoyama , Shige Furuta , Yuhichiroh Murakami , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G02F1/13624 , G09G2300/043 , G09G2300/0819 , G09G2300/0852 , G09G2300/0876 , G09G2310/063 , G09G2310/08 , G09G2320/0219 , G09G2320/0247 , G09G2340/0428
摘要： In a memory liquid crystal display device, a potential of a storage capacitor line signal (CS) supplied to the CS lines (CSL(i)) are once decreased (ΔVcs) while the gate lines (GL(i)) are made simultaneously active (period t4, period t10) in the data holding period (T2), and the potential of the storage capacitor line signal (CS) is made back to its original potential while the gate lines (GL(i)) are made simultaneously inactive and the refresh output control lines (RC(i)) are made active (period t5, period t11). This reduces flicker, thereby allowing for improvement in display quality of the memory liquid crystal display device.
摘要翻译：在存储器液晶显示装置中，提供给CS线（CSL（i））的辅助电容配线信号（CS）的电位在制作栅极线（GL（i））时一度减小（＆Dgr; Vcs）在数据保持期间（T2）中同时有效（周期t4，期间t10），并且保持电容配线信号（CS）的电位恢复到原来的电位，而同时进行栅极线（GL（i））并且刷新输出控制线（RC（i））被激活（时段t5，周期t11）。这减少了闪烁，从而可以提高存储器液晶显示装置的显示质量。

5. 发明申请

US20120200549A1 Display Device And Drive Method For Display Device 审中-公开
标题翻译：显示设备的显示设备和驱动方式
公开(公告)号：US20120200549A1
公开(公告)日：2012-08-09
申请号：US13395518
申请日：2010-04-23
申请人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3659 , G09G2300/0842 , G09G2300/0861 , G09G2320/0219 , G09G2330/022
摘要： Provided is a display device which can prevent screen noise caused such that a potential of a common electrode is reversed after a memory mode enters from a refresh period to an entire write-in period, and a method for driving the display device. The memory mode includes (i) an entire write-in period in which a potential of the common electrode (COM) is fixed and the display data is written into all the memory circuits (node (PIX)) in each row and (ii) a refresh period in which the display data which has been written during the entire write-in period is refreshed at least once while the common electrode (COM) is driven. In the memory mode, the potential of the common electrode during the entire write-in period being a potential which the common electrode having been driven had at the end of a refresh period preceding the entire write-in period.
摘要翻译：提供一种显示装置，其可以防止在从刷新周期进入整个写入周期之后引起公共电极的电位反转的屏幕噪声，以及用于驱动显示装置的方法。存储模式包括：（i）公共电极（COM）的电位固定并将显示数据写入到每行的所有存储电路（节点（PIX））中的整个写入周期，以及（ii）在驱动公共电极（COM）的过程中至少刷新一次整个写入周期期间已写入的显示数据的刷新周期。在存储模式中，公共电极在整个写入周期期间的电位是已经被驱动的公共电极在整个写入周期之前的刷新周期结束时的电位。

6. 发明申请

US20120169753A1 MEMORY DEVICE, DISPLAY DEVICE EQUIPPED WITH MEMORY DEVICE, DRIVE METHOD FOR MEMORY DEVICE, AND DRIVE METHOD FOR DISPLAY DEVICE 有权
标题翻译：存储装置，具有存储装置的显示装置，用于存储装置的驱动方法和用于显示装置的驱动方法
公开(公告)号：US20120169753A1
公开(公告)日：2012-07-05
申请号：US13496027
申请日：2010-04-23
申请人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
发明人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G5/36 , G11C7/00 , G11C5/06
CPC分类号： G09G3/3659 , G09G2300/0417 , G09G2300/0823 , G09G2300/0842 , G09G2300/0861 , G09G2300/088 , G09G2330/022 , G11C11/405
摘要： A memory device is provided which includes a memory circuit that allows a circuit which carries out a refresh operation to suitably carry out an original operation of the circuit even if an off-leakage current occurs in a transfer element used in a transfer section. A memory cell includes a switching circuit, a first retaining section, a transfer section, a second retaining section, a first control section, and a voltage supply, and the first control section is controlled to be in (i) a state in which the first control section carries out a first operation in which the first control section is in an active state or a non-active state and (ii) a state in which the first control section carries out a second operation.
摘要翻译：提供了一种存储器件，其包括一个存储器电路，即使在转印部件中使用的转印元件中出现泄漏电流，允许进行刷新操作的电路适当地执行电路的原始操作。存储单元包括开关电路，第一保持部分，转移部分，第二保持部分，第一控制部分和电压源，并且第一控制部分被控制为处于（i）第一控制部分执行第一操作，其中第一控制部分处于活动状态或非活动状态，以及（ii）第一控制部分执行第二操作的状态。

7. 发明授权

US08866719B2 Memory device and liquid crystal display device equipped with memory device 有权
标题翻译：内存装置和配备有记忆装置的液晶显示装置
公开(公告)号：US08866719B2
公开(公告)日：2014-10-21
申请号：US13395549
申请日：2010-05-18
申请人： Shuji Nishi , Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten
发明人： Shuji Nishi , Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten
IPC分类号： G09G3/36 , H01L27/108 , G11C11/406 , H01L27/12
CPC分类号： H01L27/108 , G09G3/3614 , G09G3/3618 , G09G3/3648 , G09G3/3659 , G09G2300/0823 , G09G2300/0852 , G09G2330/021 , G11C11/406 , G11C2211/4067 , H01L27/12
摘要： A transistor (N1) has a gate terminal connected to a word line (Xi(1)) and a first conduction terminal connected to a bit line (Yj). A transistor (N2) has a gate terminal connected to the word line (Xi(2)) and a first conduction terminal connected to a node (PIX). A transistor (N3) has a gate terminal connected to a node (MRY) and a first conduction terminal connected to the word line (Xi(2)). A transistor (N4) has a gate terminal connected to the word line (Xi(3)), a first conduction terminal connected to a second conduction terminal of the transistor (N3), and a second conduction terminal connected to the node (PIX). Capacitors (Ca1), (Cb1), (Cap1) are formed between the node (PIX) and a reference electric potential wire (RL1), between the node (MRY) and the reference electric potential wire (RL1), and between the first conduction terminal of the transistor (N3) and the node (MRY), respectively.
摘要翻译：晶体管（N1）具有连接到字线（Xi（1））的栅极端子和连接到位线（Yj）的第一导电端子。晶体管（N2）具有连接到字线（Xi（2））的栅极端子和连接到节点（PIX）的第一导电端子。晶体管（N3）具有连接到节点（MRY）的栅极端子和连接到字线（Xi（2））的第一导电端子。晶体管（N4）具有连接到字线（Xi（3））的栅极端子，连接到晶体管（N3）的第二导通端子的第一导电端子和连接到节点（PIX）的第二导电端子，。在节点（MRY）和参考电位线（RL1）之间以及在第一（VI））之间的节点（PIX）和参考电位线（RL1）之间形成电容器（Ca1），（Cb1）晶体管（N3）和节点（MRY）的导通端子。

8. 发明授权

US08775842B2 Memory device, display device equipped with memory device, drive method for memory device, and drive method for display device 有权
标题翻译：存储装置，配备有存储装置的显示装置，存储装置的驱动方法以及显示装置的驱动方法
公开(公告)号：US08775842B2
公开(公告)日：2014-07-08
申请号：US13395739
申请日：2010-05-18
申请人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G06F1/32
CPC分类号： G09G3/3659 , G09G2300/0857 , G09G2310/08 , G09G2320/0219 , G09G2330/022
摘要： A memory device can perform a first operation mode in which a discrete level is supplied to cause the memory cell to retain a logical level, and prevent unnecessary power consumption due to an operation of a power source which is unnecessary in the first operation mode. The memory device includes: a first power source for supplying a first potential level; a second power source for supplying a second potential level, a third power source for supplying a potential higher than a highest potential of discrete levels; and a fourth power source for supplying a potential lower than a lowest potential of the discrete levels, the first and second potential levels being used to supply the discrete levels, when the first operation is carried out, VDD, VSS, and GVDD being caused to be in operation and the fourth power source being stopped from being in operation.
摘要翻译：存储器件可以执行其中提供离散电平以使存储器单元保持逻辑电平的第一操作模式，并且防止由于在第一操作模式中不必要的电源的操作引起的不必要的功耗。存储器件包括：用于提供第一电位电平的第一电源; 用于提供第二电位电平的第二电源，用于提供高于离散电平的最高电位的电位的第三电源; 以及用于提供低于所述离散电平的最低电位的电位的第四电源，所述第一和第二电位电平用于提供所述离散电平，当执行所述第一操作时，引起VDD，VSS和GVDD 运行中，第四个电源停止工作。

9. 发明申请

US20120179923A1 MEMORY DEVICE, DISPLAY DEVICE EQUIPPED WITH MEMORY DEVICE, DRIVE METHOD FOR MEMORY DEVICE, AND DRIVE METHOD FOR DISPLAY DEVICE 有权
标题翻译：存储装置，具有存储装置的显示装置，用于存储装置的驱动方法和用于显示装置的驱动方法
公开(公告)号：US20120179923A1
公开(公告)日：2012-07-12
申请号：US13395739
申请日：2010-03-18
申请人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G06F1/26
CPC分类号： G09G3/3659 , G09G2300/0857 , G09G2310/08 , G09G2320/0219 , G09G2330/022
摘要： A memory device can perform a first operation mode in which a discrete level is supplied to cause the memory cell to retain a logical level, and prevent unnecessary power consumption due to an operation of a power source which is unnecessary in the first operation mode. The memory device includes: a first power source (VDD) for supplying a first potential level; a second power source (VSS) for supplying a second potential level, a third power source (GVDD) for supplying a potential higher than a highest potential of discrete levels; and a fourth power source for supplying a potential lower than a lowest potential of the discrete levels, the first and second potential levels being used to supply the discrete levels, when the first operation is carried out, VDD, VSS, and GVDD being caused to be in operation and the fourth power source being stopped from being in operation.
摘要翻译：存储器件可以执行其中提供离散电平以使存储器单元保持逻辑电平的第一操作模式，并且防止由于在第一操作模式中不必要的电源的操作引起的不必要的功耗。存储器件包括：用于提供第一电位电平的第一电源（VDD）; 用于提供第二电位电平的第二电源（VSS）;用于提供高于离散电平的最高电位的电位的第三电源（GVDD）; 以及用于提供低于所述离散电平的最低电位的电位的第四电源，所述第一和第二电位电平用于提供所述离散电平，当执行所述第一操作时，引起VDD，VSS和GVDD 运行中，第四个电源停止工作。

10. 发明申请

US20120169580A1 Liquid Crystal Display Device 有权
标题翻译：液晶显示装置
公开(公告)号：US20120169580A1
公开(公告)日：2012-07-05
申请号：US13395716
申请日：2010-05-18
申请人： Shuji Nishi , Seijirou Gyouten , Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki
发明人： Shuji Nishi , Seijirou Gyouten , Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki
IPC分类号： G09G3/36
CPC分类号： G09G3/3618 , G09G3/3614 , G09G3/3659 , G09G2300/0823 , G09G2300/0852
摘要： A memory liquid crystal display device includes a transistor (N1), a transistor (N2), a transistor (N3), a transistor (N4), a first storage capacitor (storage capacitor of an overlapping part of a capacitor electrode 37a and a CS line CSL(i)) connected to a pixel electrode (7), and a second storage capacitor (storage capacitor of an overlapping part of a capacitor electrode 37b and a CS extension section 10bb) connected to the pixel electrode (7) via the transistor (N2), the pixel electrode (7) being connected to (a) a source line (SL(j)) via the transistor (N1), (b) a data transfer control line (DT(i)) via the transistor (N4) and the third transistor, (c) a drain electrode (9a) of the transistor (N1) via a contact hole (13), and (d) a source electrode (8b) of the transistor (N2) and to a drain electrode (9c) of the transistor (N4), via a contact hole (14). This allows for improving a yield rate and for reducing malfunction caused by noise generated between signal lines, in a memory liquid crystal display device.
摘要翻译：存储液晶显示装置包括晶体管（N1），晶体管（N2），晶体管（N3），晶体管（N4），第一存储电容器（电容器电极37a的重叠部分的存储电容器和CS 连接到像素电极（7）的线CSL（i））和连接到像素电极（7）的第二存储电容器（电容器电极37b和CS延伸部分10bb的重叠部分的存储电容器）（N2），经由晶体管（N1）与（a）源极线（SL（j））连接的像素电极（7），（b）经由晶体管的数据传输控制线（DT（i） N4）和第三晶体管，（c）经由接触孔（13）的晶体管（N1）的漏电极（9a）和（d）晶体管（N2）的源电极（8b）和漏极晶体管（N4）的电极（9c）经由接触孔（14）。这允许在存储器液晶显示装置中提高成品率并减少由信号线之间产生的噪声引起的故障。

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