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    • 1. 发明授权
    • Memory device having selectable number of output pins
    • 存储器件具有可选择的输出引脚数
    • US5262990A
    • 1993-11-16
    • US729050
    • 1991-07-12
    • Duane F. MillsJahanshir J. JavanifardRodney R. RozmanKevin W. FrarySherif R. B. Sweha
    • Duane F. MillsJahanshir J. JavanifardRodney R. RozmanKevin W. FrarySherif R. B. Sweha
    • G11C7/00G11C7/10G11C8/12G06F13/00
    • G11C8/12G11C7/00G11C7/1006
    • A memory device includes a memory array and a plurality of output pins. A control input is provided for receiving a control signal. The control signal can be in a first voltage state and a second voltage state. When the control signal is in the first voltage state, the memory device is in a first output mode. When the control signal is in the second voltage state, the memory device is in a second output mode. Circuitry is provided for selectively coupling the plurality of output pins to the memory array. An output mode select logic is coupled to receive the control signal for selecting the first output mode and the second output mode for the memory device. When the memory device is in the first output mode, the output mode select logic controls the circuitry to couple all of the plurality of output pins to the memory array. When the memory device is in the second output mode, the output mode select logic controls the circuitry to couple a portion of the plurality of output pins to the memory array. A method of controlling the memory device to switch between the first output mode and the second output mode is also described.
    • 存储器件包括存储器阵列和多个输出引脚。 提供控制输入用于接收控制信号。 控制信号可以处于第一电压状态和第二电压状态。 当控制信号处于第一电压状态时,存储器件处于第一输出模式。 当控制信号处于第二电压状态时,存储器件处于第二输出模式。 提供电路用于选择性地将多个输出引脚耦合到存储器阵列。 输出模式选择逻辑被耦合以接收用于选择存储器件的第一输出模式和第二输出模式的控制信号。 当存储器件处于第一输出模式时,输出模式选择逻辑控制电路将所有多个输出引脚耦合到存储器阵列。 当存储器件处于第二输出模式时,输出模式选择逻辑控制电路将多个输出引脚的一部分耦合到存储器阵列。 还描述了一种控制存储器件在第一输出模式和第二输出模式之间切换的方法。