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1. 发明申请

US20070001890A1 Gain adjust for SAR ADC 有权
标题翻译：增益调整为SAR ADC
公开(公告)号：US20070001890A1
公开(公告)日：2007-01-04
申请号：US11170591
申请日：2005-06-29
申请人： Douglas Piasecki , Michael Odland
发明人： Douglas Piasecki , Michael Odland
IPC分类号： H03M1/38
CPC分类号： H03M1/186 , H03M1/403
摘要： A SAR analog-to-digital Converter (ADC) is disclosed with variable gain having a SAR capacitor array with a plurality of switched capacitors therein with varying weights and a SAR controller for sampling an input voltage thereon in a sampling phase, and redistributing the charge stored thereon in a conversion phase in accordance with a SAR conversion algorithm. A gain adjust register is provided for defining an amount of charge to be added or subtracted from the capacitor array prior to the conversion phase relative to a predetermined amount of charge. A charge control device varies the amount of charge stored in the array prior to the conversion phase in accordance with the contents of the gain adjust register such that the amount of charge redistributed during the conversion phase is adjusted.
摘要翻译：公开了具有可变增益的SAR模数转换器（ADC），其具有其中具有变化权重的多个开关电容器的SAR电容器阵列和用于在采样阶段对其上的输入电压进行采样的SAR控制器，并且重新分配电荷根据SAR转换算法在转换阶段存储。提供增益调整寄存器，用于定义在相对于预定量的电荷的转换阶段之前要从电容器阵列加或减去的电荷量。充电控制装置根据增益调整寄存器的内容改变在转换阶段之前存储在阵列中的电荷量，使得在转换阶段期间重新分配的电荷量被调整。

2. 发明授权

US07271758B2 Gain adjust for SAR ADC 有权
公开(公告)号：US07271758B2
公开(公告)日：2007-09-18
申请号：US11170591
申请日：2005-06-29
申请人： Douglas Piasecki , Michael Odland
发明人： Douglas Piasecki , Michael Odland
IPC分类号： H03M1/12
CPC分类号： H03M1/186 , H03M1/403
摘要： A SAR analog-to-digital Converter (ADC) is disclosed with variable gain having a SAR capacitor array with a plurality of switched capacitors therein with varying weights and a SAR controller for sampling an input voltage thereon in a sampling phase, and redistributing the charge stored thereon in a conversion phase in accordance with a SAR conversion algorithm. A gain adjust register is provided for defining an amount of charge to be added or subtracted from the capacitor array prior to the conversion phase relative to a predetermined amount of charge. A charge control device varies the amount of charge stored in the array prior to the conversion phase in accordance with the contents of the gain adjust register such that the amount of charge redistributed during the conversion phase is adjusted.

3. 发明申请

US20050204224A1 Programmable driver for an I/O pin of an integrated circuit 有权
标题翻译：用于集成电路的I / O引脚的可编程驱动器
公开(公告)号：US20050204224A1
公开(公告)日：2005-09-15
申请号：US11114840
申请日：2005-04-26
申请人： Douglas Piasecki , Alvin Storvik
发明人： Douglas Piasecki , Alvin Storvik
IPC分类号： G01R31/28 , G06F7/38 , G06F13/40 , H03K19/173
CPC分类号： G06F13/4072
摘要： A pin interface for an integrated circuit. The pin interface includes logic gates for processing digital signals, and analog lines for carrying analog signals. The pin interface includes circuits for disabling the digital circuits when configured to carry analog signals. A comparator is associated with at least one of the pins for comparing the analog voltage level thereon with a reference voltage.
摘要翻译：集成电路的引脚接口。引脚接口包括用于处理数字信号的逻辑门和用于承载模拟信号的模拟线。引脚接口包括用于在配置为承载模拟信号时禁用数字电路的电路。比较器与至少一个引脚相关联，用于将其上的模拟电压电平与参考电压进行比较。

4. 发明授权

US07913012B2 System and method for connecting a master device with multiple groupings of slave devices via a LINBUS network 有权
标题翻译：通过LINBUS网络将主设备与多个从设备分组连接的系统和方法
公开(公告)号：US07913012B2
公开(公告)日：2011-03-22
申请号：US11967713
申请日：2007-12-31
申请人： Douglas Piasecki , William Hong
发明人： Douglas Piasecki , William Hong
IPC分类号： G06F13/00
CPC分类号： G06F13/4208
摘要： A LINBUS communication network comprises a microcontroller unit containing processing circuitry for performing predefined digital processing functions. LINBUS communication network hardware is located within the microcontroller unit for digitally communicating with an off-chip LINBUS device for transmitting data thereto and receiving data therefrom. A plurality of LINBUS communication network interfaces selectively connects one of a plurality of groups of slave devices to the LINBUS network communications hardware.
摘要翻译： LINBUS通信网络包括包含用于执行预定义数字处理功能的处理电路的微控制器单元。 LINBUS通信网络硬件位于微控制器单元内，用于与片外LINBUS设备进行数字通信，用于向其发送数据并从中接收数据。多个LINBUS通信网络接口选择性地将多个从设备组中的一个连接到LINBUS网络通信硬件。

5. 发明申请

US20090322410A1 SYSTEM AND METHOD FOR MONITORING A CAPACITIVE SENSOR ARRAY 审中-公开
标题翻译：用于监测电容式传感器阵列的系统和方法
公开(公告)号：US20090322410A1
公开(公告)日：2009-12-31
申请号：US12146352
申请日：2008-06-25
申请人： Thomas S. David , Brian Caloway , Golam Chowdhury , Brent Wilson , Farris Bar , Douglas Piasecki
发明人： Thomas S. David , Brian Caloway , Golam Chowdhury , Brent Wilson , Farris Bar , Douglas Piasecki
IPC分类号： G06F3/044
CPC分类号： G06F3/044 , G06F3/0412 , G06F3/0416
摘要： A capacitive touch sensor circuitry comprises an interface for interconnecting with a plurality of I/O pins that connect to rows and columns of a capacitive sensor array. Monitoring circuitry, responsive to inputs from the plurality of I/O pins, determines when a capacitive switch in the capacitive sensor array has been actuated and stores an indication of the actuation of the capacitive switch. The monitoring circuitry then generates an interrupt responsive to the determined actuation. A control engine controls a manner in which the monitoring circuitry monitors the plurality of I/O pins. The control engine and the monitoring circuitry may be configured to monitor the plurality of I/O pins in a plurality of operating modes.
摘要翻译：电容式触摸传感器电路包括用于与连接到电容式传感器阵列的行和列的多个I / O引脚互连的接口。响应于来自多个I / O引脚的输入的监控电路确定电容式传感器阵列中的电容开关何时已被致动并且存储电容开关的致动指示。监控电路然后响应所确定的致动产生中断。控制引擎控制监视电路监视多个I / O引脚的方式。控制引擎和监控电路可以被配置为以多种操作模式监视多个I / O引脚。

6. 发明授权

US06956518B1 Method and apparatus for subclocking a SAR analog-to-digital converter 有权
标题翻译： SAR模数转换器的次频方法和装置
公开(公告)号：US06956518B1
公开(公告)日：2005-10-18
申请号：US10816564
申请日：2004-03-31
申请人： Douglas Piasecki , Ka Y. Leung , Kenneth Fernald
发明人： Douglas Piasecki , Ka Y. Leung , Kenneth Fernald
IPC分类号： H03M1/12 , H03M1/34 , H03M1/46 , H03M1/50
CPC分类号： H03M1/124 , H03M1/462
摘要： Method and apparatus for subclocking a SAR analog-to-digital converter. A method is disclosed for clocking the operation of a SAR analog-to-digital converter (ADC). A low frequency clock and a high frequency clock are provided. An analog input voltage is then tracked during a tracking phase to sample the value thereof. A conversion cycle referenced to an edge of the low frequency clock is then initiated. The sampled data is then converted in a conversion operation during a data conversion cycle, which conversion operation requires a plurality of conversion clock cycles, the timing of at least a portion of the conversion operation is controlled during the data conversion cycle utilizing the high frequency clock as the conversion clock.
摘要翻译： SAR模数转换器的次频方法和装置。公开了一种用于计时SAR模数转换器（ADC）的操作的方法。提供了低频时钟和高频时钟。然后在跟踪阶段跟踪模拟输入电压以对其值进行采样。然后启动参考低频时钟边沿的转换周期。然后，在数据转换周期期间，在转换操作中转换采样数据，该转换操作需要多个转换时钟周期，在利用高频时钟的数据转换周期期间控制转换操作的至少一部分的定时作为转换时钟。

7. 发明授权

US08913051B2 LCD controller with oscillator prebias control 有权
标题翻译： LCD控制器具有振荡器prebias控制
公开(公告)号：US08913051B2
公开(公告)日：2014-12-16
申请号：US12495600
申请日：2009-06-30
申请人： Douglas Piasecki , Thomas S. David , Timothy Thomas Rueger , Stefan Mastovich , Jia-Hau Liu
发明人： Douglas Piasecki , Thomas S. David , Timothy Thomas Rueger , Stefan Mastovich , Jia-Hau Liu
IPC分类号： G06F3/038 , G06F3/041 , G06F3/044 , G09G3/36 , G09G3/18
CPC分类号： G09G3/18 , G06F3/0412 , G06F3/044 , G09G3/3611 , G09G3/3696 , G09G2310/0278 , G09G2330/02 , G09G2330/022
摘要： An LCD controller includes a charge pump circuit for generating a charge voltage responsive to an external voltage and a clock signal. An oscillator generates the clock signal responsive to at least one bias voltage. The oscillator has a high power mode of operation and a low power mode of operation. Bias circuitry for applies the at least one bias voltage to the oscillator. The at least one bias voltage is applied to the oscillator from an external source in the high power mode of operation and the at least one bias voltage is applied to the oscillator from a source within the oscillator in the low power mode of operation. An LCD driver voltage circuit generates a plurality of LCD driver voltages for driving segments of an LCD display responsive to the charge voltage.
摘要翻译： LCD控制器包括用于产生响应于外部电压和时钟信号的充电电压的电荷泵电路。振荡器响应于至少一个偏置电压产生时钟信号。振荡器具有高功率工作模式和低功耗工作模式。用于将至少一个偏置电压施加到振荡器的偏置电路。在高功率工作模式下，至少一个偏置电压从外部源施加到振荡器，并且至少一个偏置电压在低功耗工作模式下从振荡器内的源施加到振荡器。 LCD驱动器电压电路响应于充电电压产生用于驱动LCD显示器段的多个LCD驱动器电压。

8. 发明申请

US20050219086A1 MIXED SIGNAL PROCESSOR WITH NOISE MANAGEMENT 有权
标题翻译：具有噪声管理的混合信号处理器
公开(公告)号：US20050219086A1
公开(公告)日：2005-10-06
申请号：US10816262
申请日：2004-03-31
申请人： Douglas Piasecki , Ka Leung
发明人： Douglas Piasecki , Ka Leung
IPC分类号： H03M1/00 , H03M1/06 , H03M1/08
CPC分类号： H03M1/0872
摘要： Mixed signal processor with noise management. A method for noise management in a mixed signal processor integrated circuit having a digital processing section and an analog section The digital processing section is clocked at a first clock rate to process digital data. When a conversion operation is to be carried out by the analog section, the clocking of the digital processing section is inhibited during at least a portion of the data conversion operation by the analog section to prevent noise from clock transitions in the digital processing section from being injected into the analog section during the at least a portion of th data conversion operation.
摘要翻译：具有噪声管理的混合信号处理器。一种具有数字处理部分和模拟部分的混合信号处理器集成电路中的噪声管理方法数字处理部分以第一时钟速率被计时以处理数字数据。当要由模拟部分执行转换操作时，数字处理部分的时钟在模拟部分的数据转换操作的至少一部分期间被禁止，以防止数字处理部分中的时钟转换的噪声成为在数据转换操作的至少一部分期间注入模拟部分。

9. 发明授权

US08274466B2 System and method for providing bias voltages to pad logic of an LCD controller 有权
标题翻译：用于向LCD控制器的焊盘逻辑提供偏置电压的系统和方法
公开(公告)号：US08274466B2
公开(公告)日：2012-09-25
申请号：US12397616
申请日：2009-03-04
申请人： Thomas S. David , Douglas Piasecki
发明人： Thomas S. David , Douglas Piasecki
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G3/3611 , G06F3/0412 , G06F3/14 , G06F3/1423 , G09G3/3685 , G09G3/3696 , G09G2310/08 , G09G2330/02 , G09G2330/022
摘要： An LCD controller includes at least one I/O pad for providing an LCD drive voltage in an LCD mode of operation. I/O pad logic drives the at least one I/O pad responsive to a provided bias voltage. Voltage selection logic selects a higher voltage between an LCD drive voltage and an externally provided system voltage as a first voltage. Bias voltage logic selects one of the system voltage or the first voltage as the bias voltage for the I/O pad logic. The system voltage is selected as the bias voltage for the I/O pad logic in a non-LCD mode of operation for the I/O pad and the first voltage is selected for the bias voltage for the I/O pad logic in the LCD mode of operation for the I/O pad.
摘要翻译： LCD控制器包括至少一个用于在LCD操作模式下提供LCD驱动电压的I / O焊盘。 I / O焊盘逻辑根据所提供的偏置电压驱动至少一个I / O焊盘。电压选择逻辑选择LCD驱动电压和外部提供的系统电压之间的较高电压作为第一电压。偏置电压逻辑选择系统电压或第一电压之一作为I / O焊盘逻辑的偏置电压。在I / O焊盘的非LCD操作模式下，系统电压被选择为I / O焊盘逻辑的偏置电压，并且为LCD中的I / O焊盘逻辑的偏置电压选择第一个电压 I / O板的工作模式。

10. 发明授权

US07518325B2 System and method for controlling anti-pinch powered windows 失效
标题翻译：用于控制反夹电动窗的系统和方法
公开(公告)号：US07518325B2
公开(公告)日：2009-04-14
申请号：US11537420
申请日：2006-09-29
申请人： Michael Keith Odland , Douglas Piasecki
发明人： Michael Keith Odland , Douglas Piasecki
IPC分类号： H02P1/00
CPC分类号： H02P3/08 , H02H3/006 , H02H7/0851
摘要： A system and method for an anti-pinch powered window system includes a window and a mechanical drive mechanism for raising and lowering the window. An electric motor drives the mechanical drive mechanism responsive to a command. A microcontroller unit generates the command responsive to a measured load current of the electric motor. A command to change direction of the window is generated responsive to a determination that the measured load current has exceeded a variable threshold level indicating that the window has stopped due to an obstruction. The variable threshold level is determined by the load current data stored within a memory.
摘要翻译：一种用于防夹闭动力窗系统的系统和方法，包括窗和用于升高和降低窗的机械驱动机构。电动机响应于命令驱动机械驱动机构。微控制器单元响应于电动机的测量负载电流产生该命令。响应于测量的负载电流已经超过指示窗口由于阻塞停止的可变阈值电平的确定而产生改变窗口方向的命令。可变阈值电平由存储在存储器内的负载电流数据确定。

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