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1. 发明授权

US08697529B2 Schottky junction source/drain transistor and method of making 失效
标题翻译：肖特基结源极/漏极晶体管及其制造方法
公开(公告)号：US08697529B2
公开(公告)日：2014-04-15
申请号：US13508731
申请日：2011-09-28
申请人： Dongping Wu , Jun Luo , Yinghua Piao , Zhiwei Zhu , Shili Zhang , Wei Zhang
发明人： Dongping Wu , Jun Luo , Yinghua Piao , Zhiwei Zhu , Shili Zhang , Wei Zhang
IPC分类号： H01L21/336 , H01L21/338
CPC分类号： H01L29/7839 , H01L29/6653 , H01L29/66848
摘要： A method of making a transistor, comprising: providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; forming an insulating layer over the semiconductor substrate; forming a depleting layer over the insulating layer; etching the depleting layer and the insulating layer; forming a metal layer over the semiconductor substrate; performing thermal annealing; and removing the metal layer. As advantages of the present invention, an upper outside part of each of the sidewalls include a material that can react with the metal layer, so that metal on two sides of the sidewalls is absorbed during the annealing process, preventing the metal from diffusing toward the semiconductor layer, and ensuring that the formed Schottky junctions can be ultra-thin and uniform, and have controllable and suppressed lateral growth.
摘要翻译：一种制造晶体管的方法，包括：提供半导体衬底; 在所述半导体衬底上形成栅叠层; 在半导体衬底上形成绝缘层; 在绝缘层上形成耗尽层; 蚀刻耗尽层和绝缘层; 在所述半导体衬底上形成金属层; 进行热退火; 并去除金属层。作为本发明的优点，每个侧壁的上部外侧部分包括能够与金属层反应的材料，从而在退火过程中吸收侧壁两侧的金属，从而防止金属朝向半导体层，并且确保形成的肖特基结可以是超薄和均匀的，并且具有可控和抑制的横向生长。

2. 发明申请

US20130270615A1 METHOD FOR MAKING TRANSISTORS 失效
标题翻译：制造晶体管的方法
公开(公告)号：US20130270615A1
公开(公告)日：2013-10-17
申请号：US13508731
申请日：2011-09-28
申请人： Dongping Wu , Jun Luo , Yinghua Piao , Zhiwei Zhu , Shili Zhang , Wei Zhang
发明人： Dongping Wu , Jun Luo , Yinghua Piao , Zhiwei Zhu , Shili Zhang , Wei Zhang
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/7839 , H01L29/6653 , H01L29/66848
摘要： A method of making a transistor, comprising: providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; forming an insulating layer over the semiconductor substrate; forming a depleting layer over the insulating layer; etching the depleting layer and the insulating layer; forming a metal layer over the semiconductor substrate; performing thermal annealing; and removing the metal layer. As advantages of the present invention, an upper outside part of each of the sidewalls include a material that can react with the metal layer, so that metal on two sides of the sidewalls is absorbed during the annealing process, preventing the metal from diffusing toward the semiconductor layer, and ensuring that the formed Schottky junctions can be ultra-thin and uniform, and have controllable and suppressed lateral growth.
摘要翻译：一种制造晶体管的方法，包括：提供半导体衬底; 在所述半导体衬底上形成栅叠层; 在半导体衬底上形成绝缘层; 在绝缘层上形成耗尽层; 蚀刻耗尽层和绝缘层; 在所述半导体衬底上形成金属层; 进行热退火; 并去除金属层。作为本发明的优点，每个侧壁的上部外侧部分包括能够与金属层反应的材料，从而在退火过程中吸收侧壁两侧的金属，从而防止金属朝向半导体层，并且确保形成的肖特基结可以是超薄和均匀的，并且具有可控和抑制的横向生长。

3. 发明申请

US20130295732A1 METHOD FOR MAKING FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：制作场效应晶体管的方法
公开(公告)号：US20130295732A1
公开(公告)日：2013-11-07
申请号：US13390328
申请日：2011-09-28
申请人： Dongping Wu , Yinghua Piao , Zhiwei Zhu , Shili Zhang , Wei Zhang
发明人： Dongping Wu , Yinghua Piao , Zhiwei Zhu , Shili Zhang , Wei Zhang
IPC分类号： H01L29/66
CPC分类号： H01L29/66477 , H01L21/26513 , H01L21/2658 , H01L21/324 , H01L29/517 , H01L29/6659
摘要： The present invention provides a method for making a field effect transistor, comprising of the following steps: providing a silicon substrate with a first type, forming a shallow trench by photolithography and etching processes, and forming silicon dioxide shallow trench isolations inside the shallow trench; forming by deposition a high-K gate dielectric layer and a metal gate electrode layer on the substrate and the shallow trench isolations; forming a gate structure by photolithography and etching processes; forming source/drain extension regions by ion implantation of dopants of a second type; depositing an insulating layer to form sidewalls tightly adhered to the sides of the gate; forming source/drain regions and PN junction interfaces between the source/drain region and the silicon substrate by ion implantation of dopants of the second type; and performing microwave annealing to activate implanted ions. The novel process of making a field effect transistor in the present invention can achieve impurity activation in the source/drain area at a low temperature and can reduce the influence of source/drain annealing on high-K gate dielectric and metal gate electrode.
摘要翻译：本发明提供一种制造场效应晶体管的方法，包括以下步骤：提供具有第一类型的硅衬底，通过光刻和蚀刻工艺形成浅沟槽，以及在浅沟槽内形成二氧化硅浅沟槽隔离; 通过在衬底上沉积高K栅介质层和金属栅电极层并形成浅沟槽隔离; 通过光刻和蚀刻工艺形成栅极结构; 通过第二类掺杂剂的离子注入形成源/漏扩展区; 沉积绝缘层以形成紧密地粘附到栅极侧面的侧壁; 通过第二类掺杂剂的离子注入在源极/漏极区域和硅衬底之间形成源极/漏极区域和PN结界面; 并进行微波退火以激活注入的离子。在本发明中制造场效应晶体管的新颖方法可以在低温下在源极/漏极区域实现杂质活化，并且可以减少源极/漏极退火对高K栅极电介质和金属栅电极的影响。

4. 发明授权

US08969160B2 Asymmetric source-drain field-effect transistor having a mixed schottky/P-N junction and method of making 有权
标题翻译：具有混合肖特基/ P-N结的不对称源极 - 漏极场效应晶体管及其制造方法
公开(公告)号：US08969160B2
公开(公告)日：2015-03-03
申请号：US13641086
申请日：2011-04-19
申请人： Yinghua Piao , Dongping Wu , Shili Zhang
发明人： Yinghua Piao , Dongping Wu , Shili Zhang
IPC分类号： H01L29/00 , G01N27/403 , H01L27/108 , H01L21/70 , H01L29/78 , H01L21/265 , H01L29/66 , H01L29/45 , H01L29/47
CPC分类号： H01L29/7839 , H01L21/26586 , H01L29/45 , H01L29/456 , H01L29/47 , H01L29/66643 , H01L29/66659 , H01L29/7835
摘要： The present invention is related to microelectronic device technologies. A method for making an asymmetric source-drain field-effect transistor is disclosed. A unique asymmetric source-drain field-effect transistor structure is formed by changing ion implantation tilt angles to control the locations of doped regions formed by two ion implantation processes. The asymmetric source-drain field-effect transistor has structurally asymmetric source/drain regions, one of which is formed of a P-N junction while the other one being formed of a mixed junction, the mixed junction being a mixture of a Schottky junction and a P-N junction.
摘要翻译：本发明涉及微电子器件技术。公开了制造不对称源极 - 漏极场效应晶体管的方法。通过改变离子注入倾斜角度来形成唯一的非对称源极 - 漏极场效应晶体管结构，以控制由两个离子注入工艺形成的掺杂区域的位置。不对称源极 - 漏极场效应晶体管具有结构上不对称的源/漏区，其中一个由PN结形成，而另一个由混合结形成，该混合结是肖特基结和PN 交界处

5. 发明申请

US20130032881A1 Asymmetric Source-Drain Field Effect Transistor and Method of Making 有权
标题翻译：不对称源极漏极场效应晶体管及其制作方法
公开(公告)号：US20130032881A1
公开(公告)日：2013-02-07
申请号：US13641086
申请日：2011-04-19
申请人： Yinghua Piao , Dongping Wu , Shili Zhang
发明人： Yinghua Piao , Dongping Wu , Shili Zhang
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L29/7839 , H01L21/26586 , H01L29/45 , H01L29/456 , H01L29/47 , H01L29/66643 , H01L29/66659 , H01L29/7835
摘要： The present invention is related to microelectronic device technologies. A method for making an asymmetric source-drain field-effect transistor is disclosed. A unique asymmetric source-drain field-effect transistor structure is formed by changing ion implantation tilt angles to control the locations of doped regions formed by two ion implantation processes. The asymmetric source-drain field-effect transistor has structurally asymmetric source/drain regions, one of which is formed of a P-N junction while the other one being formed of a mixed junction, the mixed junction being a mixture of a Schottky junction and a P-N junction.
摘要翻译：本发明涉及微电子器件技术。公开了制造不对称源极 - 漏极场效应晶体管的方法。通过改变离子注入倾斜角度来形成唯一的非对称源极 - 漏极场效应晶体管结构，以控制由两个离子注入工艺形成的掺杂区域的位置。不对称源极 - 漏极场效应晶体管具有结构上不对称的源/漏区，其中一个由PN结形成，而另一个由混合结形成，该混合结是肖特基结和PN 交界处

6. 发明申请

US20130140625A1 Field-Effect Transistor and Method of Making 审中-公开
标题翻译：场效应晶体管及制作方法
公开(公告)号：US20130140625A1
公开(公告)日：2013-06-06
申请号：US13642286
申请日：2011-04-25
申请人： Yinghua Piao , Liang Ge , Dongping Wu , Shi-Li Zhang , Wei Zhang
发明人： Yinghua Piao , Liang Ge , Dongping Wu , Shi-Li Zhang , Wei Zhang
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/78 , H01L21/26586 , H01L21/823814 , H01L29/0847 , H01L29/66477 , H01L29/66643 , H01L29/66659 , H01L29/7839
摘要： The present invention belongs to the field of microelectronic device technologies. Specifically, an asymmetric source/drain field-effect transistor and its methods of making are disclosed. A structure of the field-effect transistor comprises: a semiconductor substrate, a gate structure, and a source region and a drain region having a mixed junction and a P-N junction, respectively. The source region and the drain region are asymmetrical structured with respect to each other, one of which comprises a P-N junction, and the other of which comprises a mixed junction, the mixed junction being a combination of a Schottky junction and a P-N junction. According to the present disclosure, a location of a doped region formed by ion implantation is controlled by adjusting an implantation angle, and a unique structure is formed for the asymmetric source/drain field-effect transistor.
摘要翻译：本发明属于微电子器件技术领域。具体地说，公开了非对称源极/漏极场效应晶体管及其制造方法。场效应晶体管的结构包括：半导体衬底，栅极结构，以及分别具有混合结和P-N结的源极区和漏极区。源极区和漏极区彼此不对称地构成，其中之一包括P-N结，另一个包括混合结，该混合结是肖特基结和P-N结的组合。根据本公开，通过调整注入角度来控制通过离子注入形成的掺杂区域的位置，并且为非对称源极/漏极场效应晶体管形成独特的结构。

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