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    • 2. 发明授权
    • Method of manufacturing semiconductor device for formation of pin transistor
    • 用于形成pin晶体管的半导体器件的制造方法
    • US07563654B2
    • 2009-07-21
    • US11647759
    • 2006-12-29
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyeon Ju AnHyun Chul Sohn
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyeon Ju AnHyun Chul Sohn
    • H01L21/335
    • H01L27/0886H01L27/1214
    • A method for manufacturing a semiconductor device is disclosed. The method includes the steps of defining a trench into a field region of a semiconductor substrate having an active region and the field region; partially filing the trench with a flowable insulation layer; completely filling the trench with an isolation structure by depositing a close-packed insulation layer on the flowable insulation layer in the trench; etching through a portion of the close-packed insulation layer and etching into a partial thickness of the flowable insulation layer of the insulation structure to expose a portion of the active region; cleaning the resultant substrate having the active region relatively projected; forming spacers on etched portions of the flowable insulation layer where bowing occurs during the cleaning step; and forming gates on the active region and the insulation structure to border the exposed portion of the active region.
    • 公开了一种制造半导体器件的方法。 该方法包括以下步骤:将沟槽定义为具有有源区域和场区域的半导体衬底的场区域; 用可流动的绝缘层部分地填充沟槽; 通过在沟槽中的可流动绝缘层上沉积紧密堆积的绝缘层,通过隔离结构完全填充沟槽; 蚀刻通过所述紧密封装绝缘层的一部分并蚀刻成所述绝缘结构的可流动绝缘层的部分厚度以暴露所述有源区的一部分; 清洁具有相对投影的活性区域的所得基材; 在清洁步骤中发生弯曲的可流动绝缘层的蚀刻部分上形成间隔物; 以及在所述有源区和所述绝缘结构上形成栅极以与所述有源区的所述暴露部分相接触。
    • 4. 发明申请
    • Method of manufacturing semiconductor device for formation of pin transistor
    • 用于形成pin晶体管的半导体器件的制造方法
    • US20070281454A1
    • 2007-12-06
    • US11647759
    • 2006-12-29
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyeon Ju AnHyun Chul Sohn
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyeon Ju AnHyun Chul Sohn
    • H01L21/3205
    • H01L27/0886H01L27/1214
    • A method for manufacturing a semiconductor device is disclosed. The method includes the steps of defining a trench into a field region of a semiconductor substrate having an active region and the field region; partially filing the trench with a flowable insulation layer; completely filling the trench with an isolation structure by depositing a close-packed insulation layer on the flowable insulation layer in the trench; etching through a portion of the close-packed insulation layer and etching into a partial thickness of the flowable insulation layer of the insulation structure to expose a portion of the active region; cleaning the resultant substrate having the active region relatively projected; forming spacers on etched portions of the flowable insulation layer where bowing occurs during the cleaning step; and forming gates on the active region and the insulation structure to border the exposed portion of the active region.
    • 公开了一种制造半导体器件的方法。 该方法包括以下步骤:将沟槽定义为具有有源区域和场区域的半导体衬底的场区域; 用可流动的绝缘层部分地填充沟槽; 通过在沟槽中的可流动绝缘层上沉积紧密堆积的绝缘层,通过隔离结构完全填充沟槽; 蚀刻通过所述紧密封装绝缘层的一部分并蚀刻成所述绝缘结构的可流动绝缘层的部分厚度以暴露所述有源区的一部分; 清洁具有相对投影的活性区域的所得基材; 在清洁步骤中发生弯曲的可流动绝缘层的蚀刻部分上形成间隔物; 以及在所述有源区和所述绝缘结构上形成栅极以与所述有源区的所述暴露部分相接触。
    • 8. 发明申请
    • Method of forming fin transistor
    • 形成鳍式晶体管的方法
    • US20070148840A1
    • 2007-06-28
    • US11594579
    • 2006-11-08
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyun Chul Sohn
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyun Chul Sohn
    • H01L21/8234
    • H01L21/823437H01L29/66795H01L29/7851
    • A fin transistor is formed by forming a hard mask layer on a substrate having an active region and a field region. The hard mask layer is etched to expose the field region. A trench is formed by etching the exposed field region. The trench is filled with an SOG layer. The hard mask layer is removed to expose the active region. An epi-silicon layer is formed on the exposed active region. The SOG layer is then partially etched from the upper end of the trench, thus filling a lower portion of the trench. A HDP oxide layer is deposited on the etched SOG layer filling the trench, thereby forming a field oxide layer composed of the SOG layer and the HDP oxide. The HDP oxide layer in the field oxide layer is etched to expose both side surfaces of the epi-silicon layer. A gate is then formed on the epi-silicon layer of which both side surfaces are exposed and the field oxide layer.
    • 通过在具有有源区域和场区域的衬底上形成硬掩模层来形成鳍式晶体管。 蚀刻硬掩模层以暴露场区域。 通过蚀刻暴露的场区形成沟槽。 沟槽填充有SOG层。 去除硬掩模层以暴露活性区域。 在暴露的有源区上形成外延硅层。 然后从沟槽的上端部分地蚀刻SOG层,从而填充沟槽的下部。 HDP氧化物层沉积在填充沟槽的蚀刻SOG层上,从而形成由SOG层和HDP氧化物构成的场氧化物层。 蚀刻场氧化物层中的HDP氧化物层以露出外延硅层的两个侧表面。 然后在其两个侧表面暴露的外延硅层和场氧化物层上形成栅极。
    • 9. 发明授权
    • Method of forming fin transistor
    • 形成鳍式晶体管的方法
    • US07655534B2
    • 2010-02-02
    • US11594579
    • 2006-11-08
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyun Chul Sohn
    • Dong Sun SheenSeok Pyo SongSang Tae AhnHyun Chul Sohn
    • H01L21/762
    • H01L21/823437H01L29/66795H01L29/7851
    • A fin transistor is formed by forming a hard mask layer on a substrate having an active region and a field region. The hard mask layer is etched to expose the field region. A trench is formed by etching the exposed field region. The trench is filled with an SOG layer. The hard mask layer is removed to expose the active region. An epi-silicon layer is formed on the exposed active region. The SOG layer is then partially etched from the upper end of the trench, thus filling a lower portion of the trench. A HDP oxide layer is deposited on the etched SOG layer filling the trench, thereby forming a field oxide layer composed of the SOG layer and the HDP oxide. The HDP oxide layer in the field oxide layer is etched to expose both side surfaces of the epi-silicon layer. A gate is then formed on the epi-silicon layer of which both side surfaces are exposed and the field oxide layer.
    • 通过在具有有源区域和场区域的衬底上形成硬掩模层来形成鳍式晶体管。 蚀刻硬掩模层以暴露场区域。 通过蚀刻暴露的场区形成沟槽。 沟槽填充有SOG层。 去除硬掩模层以暴露活性区域。 在暴露的有源区上形成外延硅层。 然后从沟槽的上端部分地蚀刻SOG层,从而填充沟槽的下部。 HDP氧化物层沉积在填充沟槽的蚀刻SOG层上,从而形成由SOG层和HDP氧化物构成的场氧化物层。 蚀刻场氧化物层中的HDP氧化物层以露出外延硅层的两个侧表面。 然后在其两个侧表面暴露的外延硅层和场氧化物层上形成栅极。