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1. 发明授权

US5158900A Method of separately fabricating a base/emitter structure of a BiCMOS device 失效
标题翻译：分别制造BiCMOS器件的基极/发射极结构的方法
公开(公告)号：US5158900A
公开(公告)日：1992-10-27
申请号：US779448
申请日：1991-10-18
申请人： Chi-Kwan Lau , Donald L. Packwood , Chen-Hsi Lin , Ashor Kapoor
发明人： Chi-Kwan Lau , Donald L. Packwood , Chen-Hsi Lin , Ashor Kapoor
IPC分类号： H01L27/06 , H01L21/8249
CPC分类号： H01L21/8249
摘要： A method of fabricating a BiCMOS device in which PMOS and NMOS transistors are formed prior to a base/emitter structure of a bipolar transistor. In forming the base/emitter structure, a blanket implant of a first impurity is introduced into a base region of a semiconductor substrate. An insulating layer is deposited and then patterned to expose a portion of the base region at an emitter window. A polysilicon layer is deposited on the insulating layer and into the emitter window. The polysilicon layer is patterned to provide the desired configuration at the emitter window, whereafter the remaining polysilicon acts as a mask for etching of the insulating layer. Thus, etching of the insulating layer is performed in a self-aligning manner. Self-alignment is also utilized in providing a base-link region and in providing a silicide layer.
摘要翻译：一种制造BiCMOS器件的方法，其中在双极晶体管的基极/发射极结构之前形成PMOS和NMOS晶体管。在形成基极/发射极结构时，将第一杂质的覆盖注入引入到半导体衬底的基极区域中。沉积绝缘层，然后将其图案化以在发射器窗口处暴露基部区域的一部分。多晶硅层沉积在绝缘层上并进入发射极窗口。图案化多晶硅层以在发射极窗口处提供期望的配置，此后剩余的多晶硅用作蚀刻绝缘层的掩模。因此，以自对准的方式进行绝缘层的蚀刻。自对准也用于提供基极连接区域和提供硅化物层。

2. 发明授权

US5358881A Silicon topography control method 失效
标题翻译：硅地形控制方法
公开(公告)号：US5358881A
公开(公告)日：1994-10-25
申请号：US64296
申请日：1993-05-19
申请人： Donald L. Packwood
发明人： Donald L. Packwood
IPC分类号： H01L21/74 , H01L21/265
CPC分类号： H01L21/74
摘要： A semiconductor method for establishing a predetermined, constant-depth recess in a semiconductor structure fabricated on the surface of a silicon substrate or wafer. Fabrication includes first growing a thin screen oxide layer on the surface of the wafer. Next, polysilicon is deposited over the screen oxide. Then, windows are defined for ion implantation of buried dopant layers. The window regions are then etched away to the level of the screen oxide. The patterned window resist layer is retained to shield the implant and to enable dopant ions to penetrate the silicon crystal substrate only within defined window regions. At the end of fabrication, the resist pattern is removed and the semiconductor structure is annealed and oxidized.
摘要翻译：一种用于在制造在硅衬底或晶片的表面上的半导体结构中建立预定的恒定深度凹槽的半导体方法。制造包括首先在晶片的表面上生长薄膜氧化物层。接下来，多晶硅沉积在屏幕氧化物上。然后，定义窗口用于掩埋掺杂剂层的离子注入。然后将窗口区域蚀刻掉到屏幕氧化物的水平面上。保留图案化的窗口抗蚀剂层以屏蔽植入物，并使得掺杂剂离子仅在限定的窗口区域内穿透硅晶体衬底。在制造结束时，去除抗蚀剂图案，并且半导体结构被退火和氧化。

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