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    • 6. 发明授权
    • Displaying video data on a spatial light modulator
    • 在空间光调制器上显示视频数据
    • US06300924B1
    • 2001-10-09
    • US08561223
    • 1995-11-21
    • Vishal MarkandeyStephen W. MarshallDonald B. DohertyVenkat V. EaswarPaul M. UrbanusRobert J. Gove
    • Vishal MarkandeyStephen W. MarshallDonald B. DohertyVenkat V. EaswarPaul M. UrbanusRobert J. Gove
    • G09G334
    • G09G3/34G09G3/2092G09G2310/0205G09G2310/0229G09G2360/18
    • An SLM-based video receiver (10) receives a video input of some standardized format at a signal interface unit (11) and passes the input to a processor (12). The processor (12) performs analog-to-digital conversion if the pixel data is analog and also performs other enhancements to prepare the pixel data for loading into a video memory (14). The pixel data from the processor (12), representing a field of pixel data, is stored into the memory (14) for loading into rows of pixel elements of a spatial light modulator (16). The spatial light modulator (16) receives the pixel data in rows and each individual pixel element responds accordingly. The pixel elements of the spatial light modulator (16) emit light or reflect light from a source (18) and generate a video frame for display on a screen (20). By exploiting the addressing functions of the spatial light modulator (16), the SLM-based video receiver (10) displays a video frame using a field of pixel data.
    • 基于SLM的视频接收器(10)在信号接口单元(11)处接收一些标准格式的视频输入,并将输入传递给处理器(12)。 如果像素数据是模拟的,则处理器(12)执行模数转换,并且还执行其他增强以准备用于加载到视频存储器(14)中的像素数据。 来自处理器(12)的表示像素数据的像素数据被存储到存储器(14)中,用于加载到空间光调制器(16)的像素元件行中。 空间光调制器(16)以行的形式接收像素数据,并且各个像素元件相应地进行响应。 空间光调制器(16)的像素元件发光或反射来自源(18)的光,并产生用于在屏幕(20)上显示的视频帧。 通过利用空间光调制器(16)的寻址功能,基于SLM的视频接收器(10)使用像素数据的场来显示视频帧。
    • 7. 发明授权
    • Video data formatter for a multi-channel digital television system
without overlap
    • 用于多声道数字电视系统的视频数据格式化器,无重叠
    • US5488431A
    • 1996-01-30
    • US407788
    • 1995-03-20
    • Robert J. GoveDonald B. DohertyScott D. HeimbuchPaul M. UrbanusStephen W. Marshall
    • Robert J. GoveDonald B. DohertyScott D. HeimbuchPaul M. UrbanusStephen W. Marshall
    • H04N3/08H04N5/14H04N5/44H04N5/74H04N7/01H04N7/26H04N7/50H04N9/64H04N9/67H04N9/68H04N9/69H04N21/426H04N21/4402
    • H04N9/69H04N19/423H04N19/436H04N19/61H04N21/42638H04N21/4402H04N3/08H04N5/14H04N5/144H04N5/4401H04N5/7458H04N7/012H04N7/0135H04N9/3147H04N9/642H04N9/643H04N9/67H04N9/68H04N19/30H04N2005/7466
    • A digital television system (10) System (10) may receive a video signal at composite video interface and separation circuit (16). The video signal is separated into component form by composite video interface and separation circuit (16). The component video signals are converted to digital component video signals in analog to digital converter circuit (18). Line slicer (14) divides each line of digital component video signal into a plurality of channels such that each channel may be processed in parallel by channel signal processors (22a) through (22d). Each channel signal processor (22a) through (22d) may provide two lines of output for each line of video input. The processed digital component video signals may be formatted for displays (26a) through (26c) in formatters (24a) through (24c). Each formatter (24a) through (24c) may comprise a plurality of first in-first out buffer memories (34a) through (34j). One of each channel signal processors (22a ) through (22d) may be coupled to two of first in-first out buffer memories (34a) through (34j). Additionally, each formatter (24a) through (24c) may comprise channel data format units (38a) through (38d), each associated with a channel of, for example, display (24a). Channel data format units (38a) through (38d) are coupled to appropriate of first in-first out buffer memories (34a) through (34j) via multiplexers (36a) through (36d). Each formatter (24a) through (24c) may remove overlap between channels of system (10) and may format the processed video signal into appropriate channels for displays (26a) through (26c).
    • 数字电视系统(10)系统(10)可以在复合视频接口和分离电路(16)处接收视频信号。 视频信号通过复合视频接口和分离电路(16)分离成组件形式。 分量视频信号在模数转换器电路(18)中被转换成数字分量视频信号。 线路限幅器(14)将数字分量视频信号的每一行分成多个通道,使得各信道可以被信道信号处理器(22a)至(22d)并行处理。 每个通道信号处理器(22a)到(22d)可以为每行视频输入提供两行输出。 经处理的数字分量视频信号可以格式化为格式化器(24a)到(24c)中的显示器(26a)至(26c)。 每个格式化器(24a)到(24c)可以包括多个先进先出缓冲存储器(34a)至(34j)。 每个通道信号处理器(22a)至(22d)中的一个可以耦合到两个先进先出的缓冲存储器(34a)至(34j)。 另外,每个格式器(24a)到(24c)可以包括通道数据格式单元(38a)到(38d),每个与例如显示器(24a)的通道相关联。 信道数据格式单元(38a)至(38d)通过多路复用器(36a)到(36d)耦合到适当的先进先出缓冲存储器(34a)至(34j)。 每个格式化器(24a)到(24c)可以去除系统(10)的通道之间的重叠,并且可以将经处理的视频信号格式化成用于显示器(26a)到(26c)的适当通道。
    • 10. 发明授权
    • Timing circuit for video display having a spatial light modulator
    • 具有空间光调制器的视频显示定时电路
    • US5528317A
    • 1996-06-18
    • US188266
    • 1994-01-27
    • Robert J. GoveDonald B. Doherty
    • Robert J. GoveDonald B. Doherty
    • H04N9/30H04N9/12
    • H04N9/30
    • A method and apparatus for synchronizing display timing in a digital television system with a pixel addressable display having a color wheel is disclosed. The display timing circuit 22 includes phase comparator 40, for comparing the phase of a wheel index signal generated by a color wheel 20 with the phase of a frame synchronization signal indicating that a complete frame is ready to be displayed. Display timing circuit 22 further comprises a color wheel synchronization generator 42 which generates a color wheel synchronization signal in response to a phase difference value produced by phase comparator 40. The color wheel synchronization signal is used to increase, decrease, or maintain the speed of color wheel 20 to achieve a known phase relationship between the frame synchronization signal and the wheel index signal. Display timing circuit 22 further comprises a clock generator applicable to generate a display master clock signal having a known frequency relation to the wheel index signal.
    • 公开了一种用于将数字电视系统中的显示定时与具有色轮的像素可寻址显示器同步的方法和装置。 显示定时电路22包括相位比较器40,用于将由色轮20产生的车轮指标信号的相位与指示完整帧准备显示的帧同步信号的相位进行比较。 显示定时电路22还包括色轮同步发生器42,其根据由相位比较器40产生的相位差产生色轮同步信号。色轮同步信号用于增加,降低或维持颜色速度 以实现帧同步信号和车轮索引信号之间已知的相位关系。 显示定时电路22还包括时钟发生器,其适用于产生与车轮指标信号具有已知频率关系的显示主时钟信号。