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1. 发明授权

US09712171B2 Clocked all-spin logic circuit 有权
公开(公告)号：US09712171B2
公开(公告)日：2017-07-18
申请号：US14129527
申请日：2013-09-11
申请人： Dmitri E. Nikonov , Sasikanth Manipatruni , Ian A. Young , Vehbi Calayir
发明人： Dmitri E. Nikonov , Sasikanth Manipatruni , Ian A. Young , Vehbi Calayir
IPC分类号： H03K19/16 , G06F7/501 , H03K19/20 , B82Y25/00 , H03K3/45
CPC分类号： H03K19/16 , B82Y25/00 , G06F7/501 , G11C11/161 , H03K3/45 , H03K19/20
摘要： Described is a latch comprising: a first all-spin logic (ASL) device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a clock signal; and a third ASL device coupled to the second ASL device, wherein the first and third ASL devices have respective magnets coupled to a power supply terminal. Described is a flip-flop which comprises: a first ASL device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a first clock signal; a third ASL device coupled to the second ASL device, the third ASL device controllable by a second clock signal, the second clock signal being out of phase relative to the first clock signal; and a fourth ASL device coupled to the third ASL device, wherein the first and fourth ASL devices have respective magnets coupled to a power supply terminal.

2. 发明授权

US08988109B2 High speed precessionally switched magnetic logic 有权
标题翻译：高速切换磁逻辑
公开(公告)号：US08988109B2
公开(公告)日：2015-03-24
申请号：US13678877
申请日：2012-11-16
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： H03K17/16 , H03K19/16
CPC分类号： H03K19/16 , G11C11/16 , G11C11/161 , H01F10/3268 , H03K17/80
摘要： High speed precessionally switched magnetic logic devices and architectures are described. In a first example, a magnetic logic device includes an input electrode having a first nanomagnet and an output electrode having a second nanomagnet. The spins of the second nanomagnet are non-collinear with the spins of the first nanomagnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. In a second example, a magnetic logic device includes an input electrode having an in-plane nanomagnet and an output electrode having a perpendicular magnetic anisotropy (PMA) magnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes.
摘要翻译：描述了高速开关磁逻辑器件和架构。在第一示例中，磁逻辑器件包括具有第一纳米磁体的输入电极和具有第二纳米磁体的输出电极。第二纳米磁体的自旋与第一纳米磁体的自旋不共线。沟道区域和对应的接地电极设置在输入和输出电极之间。在第二示例中，磁逻辑器件包括具有面内纳米磁体的输入电极和具有垂直磁各向异性（PMA）磁体的输出电极。沟道区域和对应的接地电极设置在输入和输出电极之间。

3. 发明申请

US20140139265A1 HIGH SPEED PRECESSIONALLY SWITCHED MAGNETIC LOGIC 有权
标题翻译：高速预切换磁性逻辑
公开(公告)号：US20140139265A1
公开(公告)日：2014-05-22
申请号：US13678877
申请日：2012-11-16
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： H03K19/16
CPC分类号： H03K19/16 , G11C11/16 , G11C11/161 , H01F10/3268 , H03K17/80
摘要： High speed precessionally switched magnetic logic devices and architectures are described. In a first example, a magnetic logic device includes an input electrode having a first nanomagnet and an output electrode having a second nanomagnet. The spins of the second nanomagnet are non-collinear with the spins of the first nanomagnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. In a second example, a magnetic logic device includes an input electrode having an in-plane nanomagnet and an output electrode having a perpendicular magnetic anisotropy (PMA) magnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes.
摘要翻译：描述了高速开关磁逻辑器件和架构。在第一示例中，磁逻辑器件包括具有第一纳米磁体的输入电极和具有第二纳米磁体的输出电极。第二纳米磁体的自旋与第一纳米磁体的自旋不共线。沟道区域和对应的接地电极设置在输入和输出电极之间。在第二示例中，磁逻辑器件包括具有面内纳米磁体的输入电极和具有垂直磁各向异性（PMA）磁体的输出电极。沟道区域和对应的接地电极设置在输入和输出电极之间。

4. 发明授权

US09195787B2 Methods and apparatus for modeling and simulating spintronic integrated circuits 有权
标题翻译：用于建模和模拟自旋电子集成电路的方法和设备
公开(公告)号：US09195787B2
公开(公告)日：2015-11-24
申请号：US13682358
申请日：2012-11-20
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Described are apparatus and method for simulating spintronic integrated circuit (SPINIC), the method comprising: generating a spin netlist indicating connections of spin nodes of spin circuits and nodes of general circuits; and modifying a modified nodal analysis (MNA) matrix for general circuits to generate a spin MNA matrix for solving spin circuits and general circuits of the spin netlist.
摘要翻译：描述了用于模拟自旋电子集成电路（SPINIC）的装置和方法，所述方法包括：产生指示自旋电路的自旋节点和通用电路节点的连接的自旋网表; 并修改用于通用电路的修改的节点分析（MNA）矩阵以产生用于求解自旋网络的自旋电路和一般电路的自旋MNA矩阵。

5. 发明申请

US20140142915A1 METHODS AND APPARATUS FOR MODELING AND SIMULATING SPINTRONIC INTEGRATED CIRCUITS 有权
标题翻译：用于建模和仿真磁电子集成电路的方法和装置
公开(公告)号：US20140142915A1
公开(公告)日：2014-05-22
申请号：US13682358
申请日：2012-11-20
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Described are apparatus and method for simulating spintronic integrated circuit (SPINIC), the method comprising: generating a spin netlist indicating connections of spin nodes of spin circuits and nodes of general circuits; and modifying a modified nodal analysis (MNA) matrix for general circuits to generate a spin MNA matrix for solving spin circuits and general circuits of the spin netlist.
摘要翻译：描述了用于模拟自旋电子集成电路（SPINIC）的装置和方法，所述方法包括：产生指示自旋电路的自旋节点和通用电路节点的连接的自旋网表; 并修改用于通用电路的修改的节点分析（MNA）矩阵以产生用于求解自旋网络的自旋电路和一般电路的自旋MNA矩阵。

6. 发明申请

US20150341036A1 HIGH SPEED PRECESSIONALLY SWITCHED MAGNETIC LOGIC 审中-公开
标题翻译：高速预切换磁性逻辑
公开(公告)号：US20150341036A1
公开(公告)日：2015-11-26
申请号：US14813934
申请日：2015-07-30
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： H03K19/16 , H03K17/80
CPC分类号： H03K19/16 , G11C11/16 , G11C11/161 , H01F10/3268 , H03K17/80
摘要： High speed precessionally switched magnetic logic devices and architectures are described. In a first example, a magnetic logic device includes an input electrode having a first nanomagnet and an output electrode having a second nanomagnet. The spins of the second nanomagnet are non-collinear with the spins of the first nanomagnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. In a second example, a magnetic logic device includes an input electrode having an in-plane nanomagnet and an output electrode having a perpendicular magnetic anisotropy (PMA) magnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes.
摘要翻译：描述了高速开关磁逻辑器件和架构。在第一示例中，磁逻辑器件包括具有第一纳米磁体的输入电极和具有第二纳米磁体的输出电极。第二纳米磁体的自旋与第一纳米磁体的自旋不共线。沟道区域和对应的接地电极设置在输入和输出电极之间。在第二示例中，磁逻辑器件包括具有面内纳米磁体的输入电极和具有垂直磁各向异性（PMA）磁体的输出电极。沟道区域和对应的接地电极设置在输入和输出电极之间。

7. 发明授权

US09136848B2 High speed precessionally switched magnetic logic 有权
公开(公告)号：US09136848B2
公开(公告)日：2015-09-15
申请号：US14659349
申请日：2015-03-16
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： H03K19/16 , H03K17/80
CPC分类号： H03K19/16 , G11C11/16 , G11C11/161 , H01F10/3268 , H03K17/80
摘要： High speed precessionally switched magnetic logic devices and architectures are described. In a first example, a magnetic logic device includes an input electrode having a first nanomagnet and an output electrode having a second nanomagnet. The spins of the second nanomagnet are non-collinear with the spins of the first nanomagnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. In a second example, a magnetic logic device includes an input electrode having an in-plane nanomagnet and an output electrode having a perpendicular magnetic anisotropy (PMA) magnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes.

8. 发明申请

US20140269034A1 INTEGRATED CAPACITOR BASED POWER DISTRIBUTION 有权
标题翻译：基于集成电容器的功率分配
公开(公告)号：US20140269034A1
公开(公告)日：2014-09-18
申请号：US13976053
申请日：2013-03-15
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： G11C11/16
CPC分类号： G11C11/1697 , G11C5/14 , G11C11/16
摘要： An embodiment provides power (having low voltage, high current, and high current density) to ultra low voltage non-CMOS based devices using a distributed capacitor that is integrated onto the same chip as the non-CMOS devices. For example, an embodiment provides a spin logic gate adjacent dielectric material and first and second plates of a capacitor. The capacitor discharges low voltage/high current to the spin logic gate using a step down switched mode power supply that charges numerous capacitors during one clock cycle (using a switching element configured in a first orientation) and discharges power from the capacitors during the opposite clock cycle (using the switching element configured in a second orientation). The capacitors discharge the current out of plane and to the spin logic devices without having to traverse long power dissipating interconnect paths. Other embodiments are described herein.
摘要翻译：实施例使用集成到与非CMOS器件相同的芯片上的分布式电容器向超低压非CMOS器件提供功率（具有低电压，高电流和高电流密度）。例如，实施例提供了一个自旋逻辑门，邻近电介质材料和电容器的第一和第二平板。电容器使用降压开关模式电源将低电压/高电流放电到自旋逻辑门，该降压开关模式电源在一个时钟周期（使用以第一方向配置的开关元件）充电多个电容器，并在相对时钟内从电容器放电循环（使用以第二方向配置的开关元件）。电容器将电流从平面外转移到自旋逻辑器件，而不必横穿长的功率耗散互连路径。本文描述了其它实施例。

9. 发明授权

US09070468B2 Magnetic state element and circuits 有权
标题翻译：磁状态元件和电路
公开(公告)号：US09070468B2
公开(公告)日：2015-06-30
申请号：US13996998
申请日：2012-03-29
申请人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
发明人： Sasikanth Manipatruni , Dmitri E. Nikonov , Ian A. Young
IPC分类号： G11C11/00 , G11C11/16 , H03K19/16
CPC分类号： H01L29/66984 , G11C11/16 , G11C11/161 , G11C11/1653 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , H01L27/226 , H01L43/08 , H01L43/10 , H01L43/12 , H03K19/16
摘要： Described is an apparatus, for spin state element device, which comprises: a variable resistive magnetic (VRM) device to receive a magnetic control signal to adjust resistance of the VRM device; and a magnetic logic gating (MLG) device, coupled to the VRM device, to receive a magnetic logic input and perform logic operation on the magnetic logic input and to drive an output magnetic signal based on the resistance of the VRM device. Described is a magnetic demultiplexer which comprises: a first VRM device to receive a magnetic control signal to adjust resistance of the first VRM; a second VRM device to receive the magnetic control signal to adjust resistance of the second VRM device; and an MLG device, coupled to the first and second VRM devices, the MLG device having at least two output magnets to output magnetic signals based on the resistances of the first and second VRM devices.
摘要翻译：描述了一种用于自旋状态元件器件的装置，其包括：可变电阻磁极（VRM）器件，用于接收磁控制信号以调节VRM器件的电阻; 以及耦合到VRM装置的磁逻辑门控（MLG）装置，以接收磁逻辑输入并对磁逻辑输入执行逻辑运算，并且基于VRM装置的电阻来驱动输出磁信号。描述了一种磁解多路复用器，其包括：第一VRM装置，用于接收磁控制信号以调整第一VRM的电阻; 第二VRM装置，用于接收所述磁控信号以调整所述第二VRM装置的电阻; 以及耦合到第一和第二VRM装置的MLG装置，MLG装置具有至少两个输出磁体，以基于第一和第二VRM装置的电阻输出磁信号。

10. 发明申请

US20190087717A1 FOUR STABLE STATE NEURON 审中-公开
公开(公告)号：US20190087717A1
公开(公告)日：2019-03-21
申请号：US16081575
申请日：2016-04-01
申请人： Sasikanth Manipatruni , Ian A. Young , Dmitri E. Nikonov
发明人： Sasikanth Manipatruni , Ian A. Young , Dmitri E. Nikonov
IPC分类号： G06N3/063 , G06N3/08
摘要： One embodiment provides a four stable state neuron. The four stable state neuron includes a plurality of input elements and a plurality of coupling channels. Each input element is coupled to a respective coupling channel and each input element is to scale a respective two-dimensional input signal by a weight. The four stable state neuron further includes a first output element coupled to the plurality of coupling channels. The first output element is to receive the plurality of weighted two-dimensional input signals and to generate a two-dimensional output signal based, at least in part, on a threshold value.

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