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1. 发明授权

US07825031B2 Method of fabricating a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07825031B2
公开(公告)日：2010-11-02
申请号：US11855809
申请日：2007-09-14
申请人： Dirk Manger , Rolf Weis , Christoph Noelscher
发明人： Dirk Manger , Rolf Weis , Christoph Noelscher
IPC分类号： H01L21/302
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338 , H01L21/32139 , H01L21/76816
摘要： The invention relates to a method of fabricating an integrated circuit, including the steps of providing at least one layer; performing a first implantation step, wherein particles are implanted into the layer under a first direction of incidence; performing a second implantation step, wherein particles are implanted into the layer under a second direction of incidence which is different from the first direction of incidence; performing a removal step, wherein the layer is partially removed depending on the local implant dose generated by the first and the second implantation step.
摘要翻译：本发明涉及一种制造集成电路的方法，包括提供至少一层的步骤; 执行第一注入步骤，其中在第一入射方向上将颗粒注入所述层中; 执行第二注入步骤，其中在与所述第一入射方向不同的第二入射方向上将颗粒注入所述层中; 执行去除步骤，其中根据由第一和第二植入步骤产生的局部植入剂量部分去除该层。

2. 发明申请

US20090033362A1 Method for Forming a Structure on a Substrate and Device 失效
标题翻译：在基板和设备上形成结构的方法
公开(公告)号：US20090033362A1
公开(公告)日：2009-02-05
申请号：US11831504
申请日：2007-07-31
申请人： Dirk Manger , Stephan Wege , Rolf Weis , Christoph Noelscher
发明人： Dirk Manger , Stephan Wege , Rolf Weis , Christoph Noelscher
IPC分类号： H01R43/00 , H01L21/02 , H01L21/31
CPC分类号： H01L21/266 , H01L21/0332 , H01L21/0337 , H01L21/31111 , H01L21/31144 , H01L21/32134 , H01L21/32135 , H01L21/32137 , H01L21/32139
摘要： In one aspect, a method of forming a structure on a substrate is disclosed. For example, the method includes forming a first mask layer and a second mask layer, modifying a material property in regions of the first and second mask layers, and forming the structure based on the modified regions.
摘要翻译：一方面，公开了一种在衬底上形成结构的方法。例如，该方法包括形成第一掩模层和第二掩模层，改变第一和第二掩模层的区域中的材料特性，以及基于改质区域形成结构。

3. 发明授权

US07737049B2 Method for forming a structure on a substrate and device 失效
标题翻译：在基板和装置上形成结构的方法
公开(公告)号：US07737049B2
公开(公告)日：2010-06-15
申请号：US11831504
申请日：2007-07-31
申请人： Dirk Manger , Stephan Wege , Rolf Weis , Christoph Noelscher
发明人： Dirk Manger , Stephan Wege , Rolf Weis , Christoph Noelscher
IPC分类号： H01R43/00 , H01L21/02 , H01L21/31
CPC分类号： H01L21/266 , H01L21/0332 , H01L21/0337 , H01L21/31111 , H01L21/31144 , H01L21/32134 , H01L21/32135 , H01L21/32137 , H01L21/32139
摘要： In one aspect, a method of forming a structure on a substrate is disclosed. For example, the method includes forming a first mask layer and a second mask layer, modifying a material property in regions of the first and second mask layers, and forming the structure based on the modified regions.
摘要翻译：一方面，公开了一种在衬底上形成结构的方法。例如，该方法包括形成第一掩模层和第二掩模层，改变第一和第二掩模层的区域中的材料特性，以及基于改质区域形成结构。

4. 发明申请

US20090075462A1 Method of Fabricating a Semiconductor Device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090075462A1
公开(公告)日：2009-03-19
申请号：US11855809
申请日：2007-09-14
申请人： Dirk Manger , Rolf Weis , Christoph Noelscher
发明人： Dirk Manger , Rolf Weis , Christoph Noelscher
IPC分类号： H01L21/425
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338 , H01L21/32139 , H01L21/76816
摘要： The invention relates to a method of fabricating an integrated circuit, including the steps of providing at least one layer; performing a first implantation step, wherein particles are implanted into the layer under a first direction of incidence; performing a second implantation step, wherein particles are implanted into the layer under a second direction of incidence which is different from the first direction of incidence; performing a removal step, wherein the layer is partially removed depending on the local implant dose generated by the first and the second implantation step.
摘要翻译：本发明涉及一种制造集成电路的方法，包括提供至少一层的步骤; 执行第一注入步骤，其中在第一入射方向上将颗粒注入所述层中; 执行第二注入步骤，其中在与所述第一入射方向不同的第二入射方向上将颗粒注入所述层中; 执行去除步骤，其中根据由第一和第二植入步骤产生的局部植入剂量部分去除该层。

5. 发明授权

US07794614B2 Methods for generating sublithographic structures 有权
标题翻译：用于生成亚光刻结构的方法
公开(公告)号：US07794614B2
公开(公告)日：2010-09-14
申请号：US11754813
申请日：2007-05-29
申请人： Rolf Weis , Christoph Noelscher
发明人： Rolf Weis , Christoph Noelscher
IPC分类号： H01L21/302
CPC分类号： H01L21/0334 , H01L21/28132 , H01L27/105 , H01L27/1052 , H01L27/10894 , Y10S438/942 , Y10S438/947
摘要： One possible embodiment is a method of manufacturing a structure on or in a substrate with the following steps a) positioning at least one spacer structure by a spacer technique on the substrate, b) using at least one of the groups of the spacer structure and a structure generated by the spacer structure as a mask for a subsequent particle irradiation step for generating a latent image in the substrate c) using the latent image for further processing the substrate.
摘要翻译：一个可能的实施例是在以下步骤中在衬底上或衬底中制造结构的方法：a）通过间隔物技术将至少一个间隔物结构定位在衬底上，b）使用间隔结构的组中的至少一个和由间隔结构生成的结构作为用于随后的用于在基板中产生潜像的颗粒照射步骤的掩模c）使用潜像进一步处理基板。

6. 发明申请

US20100048023A1 Methods for Manufacturing a Structure on a Substrate and Intermediate Product 审中-公开
标题翻译：制造基板和中间产品结构的方法
公开(公告)号：US20100048023A1
公开(公告)日：2010-02-25
申请号：US12196474
申请日：2008-08-22
申请人： Christoph Noelscher , Rolf Weis
发明人： Christoph Noelscher , Rolf Weis
IPC分类号： H01L21/311 , G03F7/00
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338 , H01L21/32139
摘要： Among other implementations, a method for manufacturing a structure on a substrate is described wherein at least one carrier structure is positioned on a substrate and at least one spacer structure is positioned on the sidewalls of the at least one carrier structure, the at least one carrier structure or the at least one spacer structure is subsequently removed and before or after the removal of the at least one spacer structure or the removal of the at least one carrier structure, an etch resistant layer is positioned in at least one of the following regions: a region not covered by the at least one carrier structure, a region not covered by the at least one spacer structure and a region not covered by the at least one carrier structure and the at least one spacer structure.
摘要翻译：在其它实施方式中，描述了一种在衬底上制造结构的方法，其中至少一个载体结构位于衬底上，并且至少一个间隔结构位于至少一个载体结构的侧壁上，该至少一个载体结构或至少一个间隔结构随后被去除，并且在移除所述至少一个间隔结构或移除所述至少一个载体结构之前或之后，将耐蚀刻层定位在以下区域中的至少一个区域中：未被所述至少一个载体结构覆盖的区域，未被所述至少一个间隔物结构覆盖的区域和未被所述至少一个载体结构和所述至少一个间隔物结构覆盖的区域。

7. 发明申请

US20090053892A1 Method of Fabricating an Integrated Circuit 失效
标题翻译：制造集成电路的方法
公开(公告)号：US20090053892A1
公开(公告)日：2009-02-26
申请号：US11843052
申请日：2007-08-22
申请人： Steffen Meyer , Rolf Weis , Burkhard Ludwig , Christoph Noelscher
发明人： Steffen Meyer , Rolf Weis , Burkhard Ludwig , Christoph Noelscher
IPC分类号： H01L21/44
CPC分类号： H01L21/76816 , G03F1/00 , G03F7/70466 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139 , H01L21/76229
摘要： A method of fabricating an integrated circuit, including the steps of forming a first mask layer in the form of a hard mask layer including a plurality of first openings and a second mask layer with at least one second opening which at least partially overlaps with one of the first openings, wherein the at least one second opening is generated lithographically; and at least two neighboring first openings are distanced from each other with a center to center pitch smaller than the resolution limit of the lithography used for generating the second opening.
摘要翻译：一种制造集成电路的方法，包括以下步骤：形成包括多个第一开口的硬掩模层形式的第一掩模层和具有至少一个第二开口的第二掩模层，所述至少一个第二开口至少部分地与所述第一开口，其中所述至少一个第二开口是光刻地产生的; 并且至少两个相邻的第一开口彼此间隔开，中心至中心节距小于用于产生第二开口的光刻的分辨率极限。

8. 发明申请

US20090127722A1 Method for Processing a Spacer Structure, Method of Manufacturing an Integrated Circuit, Semiconductor Device and Intermediate Structure with at Least One Spacer Structure 审中-公开
标题翻译：用于处理间隔结构的方法，制造集成电路的方法，具有至少一个间隔结构的半导体器件和中间结构
公开(公告)号：US20090127722A1
公开(公告)日：2009-05-21
申请号：US11943445
申请日：2007-11-20
申请人： Christoph Noelscher , Ulrich Egger , Rolf Weis , Stephan Wege , Burkhard Ludwig
发明人： Christoph Noelscher , Ulrich Egger , Rolf Weis , Stephan Wege , Burkhard Ludwig
IPC分类号： H01L23/544 , H01L21/306
CPC分类号： H01L21/0337 , B81C1/00111 , H01L21/0334 , H01L21/31144
摘要： Method for processing at least one spacer structure in a manufacturing process of a semiconductor device, wherein the at least one spacer structure is subjected to at least one etch process step with an isotropic component and the spacer structure comprises at least one point on the surface with a large solid angle opening towards the environment. Method of manufacturing an integrated circuit, including a regional removal of a spacer structure, wherein the removal is determined by a pattern density in the vicinity of the spacer structure.
摘要翻译：用于在半导体器件的制造工艺中处理至少一个间隔结构的方法，其中所述至少一个间隔结构经受至少一个具有各向同性组分的蚀刻工艺步骤，并且所述间隔物结构包括在所述表面上的至少一个点，朝向环境开放的大立体角。制造集成电路的方法，包括间隔结构的局部去除，其中去除由间隔结构附近的图案密度确定。

9. 发明授权

US07759242B2 Method of fabricating an integrated circuit 失效
标题翻译：制造集成电路的方法
公开(公告)号：US07759242B2
公开(公告)日：2010-07-20
申请号：US11843052
申请日：2007-08-22
申请人： Steffen Meyer , Rolf Weis , Burkhard Ludwig , Christoph Noelscher
发明人： Steffen Meyer , Rolf Weis , Burkhard Ludwig , Christoph Noelscher
IPC分类号： H01L21/20
CPC分类号： H01L21/76816 , G03F1/00 , G03F7/70466 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139 , H01L21/76229
摘要： A method of fabricating an integrated circuit, including the steps of forming a first mask layer in the form of a hard mask layer including a plurality of first openings and a second mask layer with at least one second opening which at least partially overlaps with one of the first openings, wherein the at least one second opening is generated lithographically; and at least two neighboring first openings are distanced from each other with a center to center pitch smaller than the resolution limit of the lithography used for generating the second opening.
摘要翻译：一种制造集成电路的方法，包括以下步骤：形成包括多个第一开口的硬掩模层形式的第一掩模层和具有至少一个第二开口的第二掩模层，所述至少一个第二开口至少部分地与所述第一开口，其中所述至少一个第二开口是光刻地产生的; 并且至少两个相邻的第一开口彼此间隔开，中心至中心节距小于用于产生第二开口的光刻的分辨率极限。

10. 发明申请

US20090219496A1 Methods of Double Patterning, Photo Sensitive Layer Stack for Double Patterning and System for Double Patterning 审中-公开
标题翻译：双重图案的方法，双重图案的感光层堆栈和双重图案的系统
公开(公告)号：US20090219496A1
公开(公告)日：2009-09-03
申请号：US12040389
申请日：2008-02-29
申请人： Frank-Michael Kamm , Christoph Noelscher , Stephan Wege , Rolf Weis
发明人： Frank-Michael Kamm , Christoph Noelscher , Stephan Wege , Rolf Weis
IPC分类号： G03B27/42 , G03F7/004 , G03F7/00
CPC分类号： G03F7/095 , G03F7/203 , G03F7/265 , G03F7/70466 , H01L21/0273
摘要： Double patterning a photo sensitive layer stack, is disclosed including providing a substrate being coated with a first and a second photo resist layer, exposing both photo resist layers by employing lithographic projection steps, wherein a second lithographic projection step illuminates a latent image with a focal depth at least partially covering the second photo resist layer.
摘要翻译：公开了双重图案化感光层堆叠，包括提供涂覆有第一和第二光致抗蚀剂层的衬底，通过采用光刻投影步骤曝光两个光致抗蚀剂层，其中第二光刻投影步骤用焦点照射潜像深度至少部分地覆盖第二光致抗蚀剂层。

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