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1. 发明授权

US07788670B2 Performance-based workload scheduling in multi-core architectures 有权
标题翻译：多核架构中基于性能的工作负载调度
公开(公告)号：US07788670B2
公开(公告)日：2010-08-31
申请号：US10973707
申请日：2004-10-26
申请人： Devadatta V. Bodas , Jun Nakajima
发明人： Devadatta V. Bodas , Jun Nakajima
IPC分类号： G06F9/46 , G06F15/00 , G06F1/00
CPC分类号： G06F9/5044 , Y02D10/22
摘要： Systems and methods of managing workloads provide for detecting a workload for a system having a first processor core with a first performance indicator and a second processor core with a second performance indicator. The workload is scheduled based on the first and second performance indicator settings. In one embodiment, a performance feasibility index is calculated for each core based on the core's frequency setting and utilization and the workload is assigned to the core associated with the highest index.
摘要翻译：管理工作负载的系统和方法提供用于检测具有带有第一性能指示符的第一处理器核心和具有第二性能指示符的第二处理器核心的系统的工作负载。根据第一和第二个性能指标设置安排工作量。在一个实施例中，基于核心的频率设置和利用率为每个核心计算性能可行性指数，并且将工作负载分配给与最高索引相关联的核心。

2. 发明授权

US07526661B2 Performance state-based thread management 有权
标题翻译：基于状态的线程管理
公开(公告)号：US07526661B2
公开(公告)日：2009-04-28
申请号：US11003561
申请日：2004-12-02
申请人： Jun Nakajima , Devadatta V. Bodas
发明人： Jun Nakajima , Devadatta V. Bodas
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/329 , G06F9/505 , G06F9/5094 , Y02D10/22 , Y02D10/24
摘要： Systems and methods of managing threads provide for selecting a thread for execution and identifying a target performance state of a processor core based on the thread. Identifying the target performance state may include applying a priority of the thread to a mapping policy to obtain the target performance state. In one embodiment, a transition of the selected core to the target performance state can be initiated and the thread can be scheduled for execution by the processor core.
摘要翻译：管理线程的系统和方法提供了选择用于执行的线程，并且基于线程来识别处理器核心的目标性能状态。识别目标性能状态可以包括将线程的优先级应用于映射策略以获得目标性能状态。在一个实施例中，可以启动所选核心到目标性能状态的转换，并且线程可被调度以供处理器核心执行。

3. 发明授权

US09063785B2 Temperature-based thread scheduling 有权
标题翻译：基于温度的线程调度
公开(公告)号：US09063785B2
公开(公告)日：2015-06-23
申请号：US11096976
申请日：2005-03-31
申请人： Devadatta V. Bodas , Jun Nakajima
发明人： Devadatta V. Bodas , Jun Nakajima
IPC分类号： G06F9/46 , G06F1/00 , G06F9/50
CPC分类号： G06F9/5027 , G06F9/5094 , Y02D10/22
摘要： Systems and methods of managing software threads provide for selecting a software thread for execution by a processing architecture having a plurality of processing cores and a cooling module. A target core is selected from the plurality of cores based on the effectiveness of the cooling module with regard to each of the plurality of cores, and the selected thread is scheduled for execution by the target core.
摘要翻译：管理软件线程的系统和方法提供了通过具有多个处理核心和冷却模块的处理架构来选择用于执行的软件线程。基于对于多个核心中的每一个的冷却模块的有效性，从多个核心中选择目标核心，并且所选择的线程被调度以由目标核心执行。

4. 发明申请

US20150241949A1 MECHANISM TO PROVIDE WORKLOAD AND CONFIGURATION-AWARE DETERMINISTIC PERFORMANCE FOR MICROPROCESSORS 有权
标题翻译：为微处理器提供工作负载和配置 - 确定性能的机制
公开(公告)号：US20150241949A1
公开(公告)日：2015-08-27
申请号：US14697541
申请日：2015-04-27
申请人： Ankush Varma , Krishnakanth V. Sistla , Martin T. Rowland , Chris Poirier , Eric J. Dehaemer , Avinash N. Ananthakrishnan , Jeremy J. Shrall , Xiuting C. Man , Stephen H. Gunther , Krishna K. Rangan , Devadatta V. Bodas , Don Soltis , Hang T. Nguyen , Cyprian W. Woo , Thi Dang
发明人： Ankush Varma , Krishnakanth V. Sistla , Martin T. Rowland , Chris Poirier , Eric J. Dehaemer , Avinash N. Ananthakrishnan , Jeremy J. Shrall , Xiuting C. Man , Stephen H. Gunther , Krishna K. Rangan , Devadatta V. Bodas , Don Soltis , Hang T. Nguyen , Cyprian W. Woo , Thi Dang
IPC分类号： G06F1/32 , G06F1/20
CPC分类号： G06F1/3243 , G06F1/206 , G06F1/28 , G06F1/3206 , Y02D10/152
摘要： One embodiment of an apparatus includes a semiconductor chip having a processor and an on-die non-volatile storage resource. The on-die non-volatile storage may store different, appropriate performance related information for different configurations and usage cases of the processor for a same performance state of the processor.
摘要翻译：装置的一个实施例包括具有处理器和裸片上非易失性存储资源的半导体芯片。片上非易失性存储器可以为处理器的相同性能状态的不同配置和处理器的使用情况存储不同的适当的性能相关信息。

5. 发明申请

US20140181555A1 MANAGING A POWER STATE OF A PROCESSOR 有权
标题翻译：管理加工商的电源状态
公开(公告)号：US20140181555A1
公开(公告)日：2014-06-26
申请号：US13724594
申请日：2012-12-21
申请人： Devadatta V. Bodas , Eric K. Mann
发明人： Devadatta V. Bodas , Eric K. Mann
IPC分类号： G06F1/32
CPC分类号： G06F1/3243 , G06F1/324 , G06F9/4812 , Y02D10/126 , Y02D10/152 , Y02D10/24
摘要： A method and system for managing a power state of a processor are described herein. The method includes receiving, at the processor, a signal indicating that an interrupt is to be sent to the processor. The method also includes transitioning the processor from the deep idle state to the shallow idle state in response to receiving the signal and transitioning the processor from the shallow idle state to an active state in response to receiving the interrupt.
摘要翻译：本文描述了用于管理处理器的电源状态的方法和系统。该方法包括在处理器处接收指示要向处理器发送中断的信号。该方法还包括响应于接收到信号并将处理器从浅空闲状态转换到活动状态以响应于接收到中断而将处理器从深空闲状态转换到浅空闲状态。

6. 发明申请

US20130007475A1 EFFICIENT FREQUENCY BOOST OPERATION 有权
标题翻译：有效的频率提升操作
公开(公告)号：US20130007475A1
公开(公告)日：2013-01-03
申请号：US13174958
申请日：2011-07-01
申请人： Baskaran Ganesan , James S. Burns , Suresh Sugumar , Devadatta V. Bodas , Sundaravarathan R. Iyengar , Feranak Nelson , Dheemanth Nagaraj , Russell J. Fenger
发明人： Baskaran Ganesan , James S. Burns , Suresh Sugumar , Devadatta V. Bodas , Sundaravarathan R. Iyengar , Feranak Nelson , Dheemanth Nagaraj , Russell J. Fenger
IPC分类号： G06F1/26
CPC分类号： G06F1/324 , G06F1/08 , Y02D10/126
摘要： Systems and methods of operating a computing system may involve identifying a plurality of state values, wherein each state value corresponds to a computing thread associated with a processor. An average value can be determined for the plurality of state values, wherein a determination may be made as to whether to grant a frequency boost request based at least in part on the average value.
摘要翻译：操作计算系统的系统和方法可以涉及识别多个状态值，其中每个状态值对应于与处理器相关联的计算线程。可以针对多个状态值确定平均值，其中可以至少部分地基于平均值来确定是否授予频率提升请求。

7. 发明申请

US20120331310A1 Increasing Power Efficiency Of Turbo Mode Operation In A Processor 有权
标题翻译：在处理器中提高Turbo模式操作的功率效率
公开(公告)号：US20120331310A1
公开(公告)日：2012-12-27
申请号：US13169260
申请日：2011-06-27
申请人： James S. Burns , Baskaran Ganesan , Russell J. Fenger , Devadatta V. Bodas , Sundaravarathan R. Iyengar , Feranak Nelson , John M. Powell, JR. , Suresh Sugumar
发明人： James S. Burns , Baskaran Ganesan , Russell J. Fenger , Devadatta V. Bodas , Sundaravarathan R. Iyengar , Feranak Nelson , John M. Powell, JR. , Suresh Sugumar
IPC分类号： G06F1/26
CPC分类号： G06F1/3287 , G06F1/26 , G06F1/329 , G06F9/5094 , Y02D10/22 , Y02D10/24
摘要： In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器具有多个核来执行线程。处理器还包括功率控制逻辑，用于基于存储核心功率计数的计数器的阈值和识别至少一个线程的turbo模式请求的性能组合之间的比较来进入turbo模式。以这种方式，可以在提供高功率效率的处理器的利用水平上输入turbo模式。描述和要求保护其他实施例。

8. 发明申请

US20090172423A1 METHOD, SYSTEM, AND APPARATUS FOR REROUTING INTERRUPTS IN A MULTI-CORE PROCESSOR 有权
标题翻译：用于在多核处理器中进行中断的方法，系统和设备
公开(公告)号：US20090172423A1
公开(公告)日：2009-07-02
申请号：US11967799
申请日：2007-12-31
申请人： Justin Song , Devadatta V. Bodas , Ohad Falik , Alon Naveh , Ilan Pardo , Anil Aggarwal , Sridhar Muthrasanallur , James B. Crossland
发明人： Justin Song , Devadatta V. Bodas , Ohad Falik , Alon Naveh , Ilan Pardo , Anil Aggarwal , Sridhar Muthrasanallur , James B. Crossland
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3243 , G06F1/3287 , G06F9/4812 , G06F9/5044 , G06F9/5094 , Y02D10/152 , Y02D10/171 , Y02D10/22 , Y02D10/24
摘要： A method, system, and apparatus may route an interrupt to a first core of a plurality of cores of a multi-core system. If the first core is in an idle or low power state, or operating in a power state at or below a threshold power state, a core in a least idle state may be found. The interrupt may be rerouted to and processed by the core in the least idle state. Cores in a multi-core system may be rated based on for example, power states or other characteristics, and interrupts may be assigned based on these ratings. Other embodiments are described and claimed.
摘要翻译：方法，系统和装置可以将中断路由到多核系统的多个核心的第一核心。如果第一核心处于空闲或低功率状态，或处于等于或低于阈值功率状态的功率状态，则可以找到处于最小空闲状态的核心。中断可以在最不空闲状态下由核心重新路由到并处理。可以基于例如功率状态或其他特性对多核系统中的核进行额定，并且可以基于这些额定值分配中断。描述和要求保护其他实施例。

9. 发明授权

US07210048B2 Enterprise power and thermal management 有权
标题翻译：企业电力和热力管理
公开(公告)号：US07210048B2
公开(公告)日：2007-04-24
申请号：US10367387
申请日：2003-02-14
申请人： Devadatta V. Bodas
发明人： Devadatta V. Bodas
IPC分类号： G06F1/26
CPC分类号： G06F1/305 , G06F1/206 , G06F1/3203 , H05K7/1498 , Y02D10/16
摘要： Power consumption by a computer system may vary all the time based upon software and the workload. Facility such as data centers host multiple of computer systems. With continuous growing demand for power and cooling of computer systems, data centers face limitations on their ability to provide the power and cooling capability. These limitations are occasionally exasperated by problems in either power or cooling systems. The computer systems may have a method to maintain total power consumption below a set target level. An enterprise power and thermal manager, EPTM, may change this setting dynamically to improve efficiency of supporting power and cooling infrastructure. In addition, the EPTM may use this ability to improve performance, availability and to provide ability to implement various administrative policies.
摘要翻译：计算机系统的功耗可能会随着软件和工作负载而不断变化。数据中心等设施托管计算机系统的多个。随着对计算机系统的电力和冷却需求的不断增长，数据中心面临着提供电力和冷却能力的能力的限制。这些限制偶尔会因电源或冷却系统中的问题而感到恼火。计算机系统可以具有将总功耗维持在设定目标水平以下的方法。企业电力和热管理器EPTM可以动态地改变这个设置，以提高支持电力和冷却基础设施的效率。此外，EPTM可以使用这种能力来提高性能，可用性，并提供实施各种管理策略的能力。

10. 发明授权

US07174471B2 System and method for adjusting I/O processor frequency in response to determining that a power set point for a storage device has not been reached 有权
标题翻译：响应于确定尚未到达存储设备的功率设定点，来调整I / O处理器频率的系统和方法
公开(公告)号：US07174471B2
公开(公告)日：2007-02-06
申请号：US10745828
申请日：2003-12-24
申请人： Eshwari P. Komarla , Vincent J. Zimmer , Devadatta V. Bodas
发明人： Eshwari P. Komarla , Vincent J. Zimmer , Devadatta V. Bodas
IPC分类号： G06F1/26 , G06F1/04
CPC分类号： G06F3/0625 , G06F1/3203 , G06F1/325 , G06F1/3268 , G06F3/0634 , G06F3/067 , G06F12/0866 , Y02D10/126 , Y02D10/154
摘要： Provided is a technique for power and performance management of one or more storage devices. With a power and performance management agent, a power change notification identifying a power set point is received and a power state of at least one storage device is adjusted.
摘要翻译：提供了一种用于一个或多个存储设备的功率和性能管理的技术。利用功率和性能管理代理，接收到识别功率设定点的功率变化通知，并调整至少一个存储设备的功率状态。

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