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    • 1. 发明申请
    • Metal to Metal Low-K Antifuse
    • 金属与金属Low-K防腐剂
    • US20080157270A1
    • 2008-07-03
    • US11618757
    • 2006-12-30
    • Deok-kee KimAnil K. ChinthakindiSon Van NguyenKelly MaloneByeongju Park
    • Deok-kee KimAnil K. ChinthakindiSon Van NguyenKelly MaloneByeongju Park
    • H01L29/00
    • H01L23/5252H01L2924/0002H01L2924/00
    • The embodiments of the invention generally relate to fuse and anti-fuse structures and include a copper conductor positioned within a substrate and a metal cap on the first conductor. A low-k dielectric is on the substrate and the metal cap. A tantalum nitride resistor is on the dielectric, and the resistor is positioned above the metal cap such that an antifuse element region of the dielectric is positioned between the resistor and the metal cap. The antifuse element region of the dielectric is adapted to change resistance values by application of a voltage difference between the resistor and the copper conductor/metal cap. The antifuse element region has a first higher resistance (more closely matching an insulator) before application of the voltage and a second lower resistance (more closely matching a conductor) after application of such voltage. In one embodiment herein the voltage can be supplemented by heating through application of voltage through the first conductor which helps change the resistance of the antifuse element region.
    • 本发明的实施例一般涉及熔丝和反熔丝结构,并且包括定位在基板内的铜导体和第一导体上的金属盖。 低k电介质位于基板和金属盖上。 电介质上的氮化钽电阻器,电阻器位于金属帽的上方,使得电介质的反熔丝元件区域位于电阻器和金属帽之间。 电介质的反熔丝元件区域适于通过施加电阻器和铜导体/金属帽之间的电压差来改变电阻值。 在施加电压之后,反熔丝元件区域具有第一高电阻(更紧密地匹配绝缘体)和施加电压之后的第二较低电阻(更接近地匹配导体)。 在本文的一个实施例中,可以通过施加通过第一导体的电压进行加热来补充电压,这有助于改变反熔丝元件区域的电阻。
    • 2. 发明申请
    • Fuse Element Using Low-K Dielectric
    • 使用低K电介质的保险丝元件
    • US20080157268A1
    • 2008-07-03
    • US11618749
    • 2006-12-30
    • Deok-kee KimAnil K. ChinthakindiKelly MaloneSon Van NguyenByeongju Park
    • Deok-kee KimAnil K. ChinthakindiKelly MaloneSon Van NguyenByeongju Park
    • H01L23/525
    • H01L23/5256H01L2924/0002H01L2924/00
    • A programmable structure such as a write once read many (WORM) or one time programmable read only memories (OTPROM) is disclosed herein. The structure includes a first conductor (such as copper) positioned within a substrate and a metal cap on the first conductor. A low-k dielectric is on the substrate and the metal cap. A tantalum nitride resistor is on the dielectric, and the resistor is positioned above the metal cap such that a programmable region of the dielectric is positioned between the resistor and the metal cap. The first conductor (including the metal cap), the programmable region of the dielectric, and the resistor form a metal-insulator-metal capacitor. Further, the programmable region of the dielectric is adapted to be permanently changed from heat produced by the resistor when a voltage difference is applied to the first and second ends of the resistor, respectively, through the first and second contacts. Thus, the capacitor comprises a first capacitance before the programmable region is permanently changed by the heat from the resistor and comprises a second capacitance after the programmable region is permanently changed by the heat from the resistor.
    • 这里公开了诸如一次写入一次读取(WORM)或一次可编程只读存储器(OTPROM)的可编程结构。 该结构包括位于基板内的第一导体(例如铜)和第一导体上的金属盖。 低k电介质位于基板和金属盖上。 电介质上有一个氮化钽电阻器,电阻器位于金属帽的上方,使电介质的可编程区域位于电阻器和金属帽之间。 第一导体(包括金属盖),电介质的可编程区域和电阻器形成金属 - 绝缘体 - 金属电容器。 此外,电介质的可编程区域分别适用于当通过第一和第二触点将电压差分别施加到电阻器的第一和第二端时由电阻器产生的热量永久地改变。 因此,电容器包括在可编程区域被来自电阻器的热量永久地变化之前的第一电容,并且在可编程区域被来自电阻器的热量永久地改变之后包括第二电容。
    • 8. 发明授权
    • Single crystal fuse on air in bulk silicon
    • 单晶保险丝在散装硅中的空气中
    • US07745855B2
    • 2010-06-29
    • US11867268
    • 2007-10-04
    • William K. HensonDeok-Kee KimChandrasekharan KothandaramanByeongju Park
    • William K. HensonDeok-Kee KimChandrasekharan KothandaramanByeongju Park
    • H01L27/10
    • H01L23/5256H01L28/20H01L2924/0002H01L2924/00
    • An integrated eFUSE device is formed by forming a silicon “floating beam” on air, whereupon the fusible portion of the eFUSE device resides. This beam extends between two larger, supporting terminal structures. “Undercutting” techniques are employed whereby a structure is formed atop a buried layer, and that buried layer is removed by selective etching. Whereby a “floating” silicide eFUSE conductor is formed on a silicon beam structure. In its initial state, the eFUSE silicide is highly conductive, exhibiting low electrical resistance (the “unblown state of the eFUSE). When a sufficiently large current is passed through the eFUSE conductor, localized heating occurs. This heating causes electromigration of the silicide into the silicon beam (and into surrounding silicon, thereby diffusing the silicide and greatly increasing its electrical resistance. When the current source is removed, the silicide remains permanently in this diffused state, the “blown” state of the eFUSE.
    • 通过在空气中形成硅“浮动光束”形成集成eFUSE装置,于是eFUSE装置的可熔部分驻留。 该梁在两个较大的支撑端子结构之间延伸。 采用“底切”技术,由此在掩埋层顶部形成结构,并且通过选择性蚀刻去除掩埋层。 由此在硅梁结构上形成“浮动”硅化物eFUSE导体。 在其初始状态下,eFUSE硅化物具有高导电性,表现出低电阻(eFUSE的未吹出状态)。 当足够大的电流通过eFUSE导体时,发生局部加热。 这种加热导致硅化物的电迁移到硅束(并进入周围的硅,从而扩散硅化物,并大大增加其电阻。当电流源被去除时,硅化物永久地保持在这种扩散状态,“吹”状态 eFUSE。
    • 9. 发明授权
    • Transistor based antifuse with integrated heating element
    • 具有集成加热元件的基于晶体管的反熔丝
    • US07723820B2
    • 2010-05-25
    • US11616965
    • 2006-12-28
    • Deok-kee KimByeongju ParkJohn M. Safran
    • Deok-kee KimByeongju ParkJohn M. Safran
    • H01L29/00
    • H01L23/5252G11C17/16G11C17/18H01L27/105H01L27/112H01L27/11206H01L2924/0002H01L2924/00
    • The present invention provides structures for an integrated antifuse that incorporates an integrated sensing transistor with an integrated heater. Two terminals connected to the upper plate allow the heating of the upper plate, accelerating the breakdown of the antifuse dielectric at a lower bias voltage. Part of the upper plate also serves as the gate of the integrated sensing transistor. The antifuse dielectric serves as the gate dielectric of the integrated transistor. The lower plate comprises a channel, a drain, and a source of a transistor. While intact, the integrated sensing transistor allows a passage of transistor current through the drain. When programmed, the antifuse dielectric, which is the gate of the integrated transistor, is subjected to a gate breakdown, shorting the gate to the channel and resulting in a decreased drain current. The integrated antifuse structure can also be wired in an array to provide a compact OTP memory array.
    • 本发明提供了一种集成反熔丝的结构,该结构集成了具有集成加热器的集成感测晶体管。 连接到上板的两个端子允许上板的加热,加速在更低偏压下的反熔丝电介质的击穿。 上板的一部分也用作集成感测晶体管的栅极。 反熔丝电介质用作集成晶体管的栅极电介质。 下板包括晶体管的沟道,漏极和源极。 虽然完整,集成感测晶体管允许晶体管电流通过漏极。 当编程时,作为集成晶体管的栅极的反熔丝电介质受到栅极击穿,使栅极短路到沟道并导致漏极电流降低。 集成的反熔丝结构也可以以阵列布线,以提供紧凑的OTP存储器阵列。