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    • 2. 发明申请
    • Double-Layer Injection Molding Casing and Method for Manufacturing the Same,Electronic Apparatus
    • 双层注射成型套管及其制造方法,电子设备
    • US20130038992A1
    • 2013-02-14
    • US13642517
    • 2011-12-23
    • Dejun WangWangjun ZhangHaode Jiang
    • Dejun WangWangjun ZhangHaode Jiang
    • A47B55/00A47B96/04B29C45/16H05K5/02
    • B29C45/16B29C33/42B29C2045/0093B29L2031/3475B29L2031/3481B29L2031/445
    • A double-layer injection molding casing and a method for manufacturing the same, an electronic apparatus are provided by this invention, which adapts to an injection molding field and can solve the problems of a conventional double-layer injection molding casing such as complicated manufacturing process and low production efficiency. The double-layer injection molding casing of this invention includes an outer layer and an inner layer. A locating structure integrally formed with the inner layer is located at an inner surface of the inner layer. The method for manufacturing the double-layer injection molding casing includes: applying a multiple injection molding process, wherein the locating structure of the double-layer injection molding casing is integrally formed with the inner layer in the same injection molding step. The electronic apparatus of this invention includes the double-layer injection molding casing. The double-layer injection molding casing can be used as a casing of the electronic apparatus.
    • 本发明提供了一种双层注射成型壳体及其制造方法,电子设备适用于注射成型领域,并且可以解决传统的双层注射成型壳体的问题,例如复杂的制造过程 生产效率低。 本发明的双层注射成型外壳包括外层和内层。 与内层一体形成的定位结构位于内层的内表面。 制造双层注射成型壳体的方法包括:施加多次注射成型工艺,其中双层注射成型壳体的定位结构在相同的注塑步骤中与内层一体地形成。 本发明的电子设备包括双层注射成型壳体。 双层注塑壳体可以用作电子设备的外壳。
    • 3. 发明授权
    • High linearity voltage to current conversion
    • 高线性电压到电流转换
    • US07915928B2
    • 2011-03-29
    • US12115015
    • 2008-05-05
    • Dejun Wang
    • Dejun Wang
    • H03F3/45
    • G05F1/561
    • A system and method for performing voltage to current conversion, the system comprising of a first set of devices that senses the input voltage signal through its input terminal and replicates said input voltage across a second set of devices which then converts said replicated input voltage signal to an output current signal; a third set of devices that transfers the output current signal to output terminals; a differential feedback loop comprising an amplifier positioned between a first one of the first set of devices and a first one of the third set of devices; and a common mode feedback loop that regulates the output average voltage to a reference voltage.
    • 一种用于执行电压到电流转换的系统和方法,所述系统包括通过其输入端感测输入电压信号的第一组装置,并且跨越第二组装置复制所述输入电压,然后将所述复制输入电压信号转换成 输出电流信号; 将输出电流信号传送到输出端的第三组装置; 差分反馈回路,包括位于所述第一组装置中的第一组和所述第三组装置中的第一组之间的放大器; 以及将输出平均电压调节到参考电压的共模反馈回路。
    • 4. 发明授权
    • Apparatus for and method of feature extraction for image recognition
    • 用于图像识别的特征提取的装置和方法
    • US07715659B2
    • 2010-05-11
    • US10893346
    • 2004-07-19
    • Jiali ZhaoDejun WangHaibing RenSeokcheol Kee
    • Jiali ZhaoDejun WangHaibing RenSeokcheol Kee
    • G06K9/54
    • G06K9/00248G06K9/00288
    • An apparatus for and method of performing a most informative feature extraction (MIFE) method in which a facial image is separated into sub-regions, and each sub-region makes individual contribution for performing facial recognition. Specifically, each sub-region is subjected to a sub-region based adaptive gamma (SadaGamma) correction or sub-region based histogram equalization (SHE) in order to account for different illuminations and expressions. A set of reference images is also divided into sub-regions and subjected to the SadaGamma correction or SHE. A comparison is made between the each corrected sub-region and each corresponding sub-region of the reference images. Based upon the comparisons made individually for the sub-regions of the facial image, one of the stored reference images having the greatest correspondence is chosen. While usable individually, using the MIFE and/or SadaGamma correction or SHE together achieves a lower error ratio in face recognition under different expressions, illuminations and occlusions.
    • 一种用于执行其中将面部图像分成子区域的最具信息特征提取(MIFE)方法的装置和方法,并且每个子区域对进行面部识别作出个人贡献。 具体地说,为了解决不同的照明和表达,每个子区域经历基于子区域的自适应伽马(SadaGamma)校正或基于子区域的直方图均衡(SHE)。 一组参考图像也被划分成子区域并进行SadaGamma校正或SHE。 在每个校正子区域和参考图像的每个相应子区域之间进行比较。 基于针对面部图像的子区域的单独比较,选择具有最大对应关系的所存储的参考图像之一。 虽然可以单独使用,但使用MIFE和/或SadaGamma校正或SHE一起可以在不同表达,照明和遮挡下的脸部识别中实现较低的误差比。
    • 5. 发明授权
    • High voltage electrostatic discharge clamp using deep submicron CMOS technology
    • 采用深亚微米CMOS技术的高压静电放电钳
    • US08654490B2
    • 2014-02-18
    • US13398638
    • 2012-02-16
    • Dejun Wang
    • Dejun Wang
    • H02H9/00
    • H01L27/0285H02H9/046
    • An ESD circuit includes a plurality of MOS devices arranged in a stack, wherein each of the MOS devices comprises a source, a drain, and a gate; a voltage source inputting a supply voltage to the stack of MOS devices; a first plurality of resistors dividing the supply voltage to each source and each drain of the MOS devices in the stack; a second plurality of resistors biasing the supply voltage to each gate of the MOS devices in the stack; an inverter device operatively connected to the second plurality of resistors; a time lag circuit that turns the inverter device on and off; and a plurality of capacitors pulling the voltage to each gate of the MOS devices in the stack to the supply voltage upon the inverter device turning off.
    • ESD电路包括布置在堆叠中的多个MOS器件,其中每个MOS器件包括源极,漏极和栅极; 电压源,向MOS器件堆叠输入电源电压; 第一多个电阻器,用于将电源电压划分为堆叠中的MOS器件的每个源极和每个漏极; 第二多个电阻器,用于将电源电压偏置到堆叠中的MOS器件的每个栅极; 可操作地连接到第二多个电阻器的逆变器装置; 一个使逆变器装置打开和关闭的时滞电路; 以及多个电容器,其将逆变器装置关闭时将堆叠中的MOS器件的各栅极的电压拉至电源电压。
    • 6. 发明授权
    • Continuous time sigma-delta analog-to-digital converter with stability
    • 具有稳定性的连续时间Σ-Δ模数转换器
    • US07626527B1
    • 2009-12-01
    • US12169763
    • 2008-07-09
    • Dejun WangHassan Elwan
    • Dejun WangHassan Elwan
    • H03M3/00
    • H03M3/366H03M3/424
    • A continuous time sigma-delta analog-to-digital converter (CT ΣΔADC) including an integrator, which includes an operational amplifier having at least one input terminal that receives an input signal, a feedback mechanism operatively connected to the operational amplifier, at least one capacitor coupled to the operational amplifier and the feedback mechanism, a reset switch coupled to the at least one capacitor, the operational amplifier, and the feedback mechanism, and a single directional voltage-to-current converter coupled to the input terminal. The single directional voltage-to-current converter translates a differential signal voltage only to a differential signal current. The reset switch resets the feedback mechanism. The single directional voltage-to-current converter behaves a one-directional resistor. The integrator prevents current generation when there is a non-linear disturbance at the input terminal of the operational amplifier. The single directional voltage-to-current converter clips an input current that exceeds a threshold value.
    • 包括积分器的连续时间Σ-Δ模数转换器(CT SigmaDeltaADC),其包括具有接收输入信号的至少一个输入端的运算放大器,可操作地连接到运算放大器的反馈机构,至少一个 耦合到运算放大器和反馈机构的电容器,耦合到至少一个电容器,运算放大器和反馈机构的复位开关,以及耦合到输入端子的单向电压 - 电流转换器。 单向电压 - 电流转换器将差分信号电压转换为差分信号电流。 复位开关复位反馈机制。 单向电压 - 电流转换器采用单向电阻器。 当在运算放大器的输入端处存在非线性干扰时,积分器防止电流产生。 单向电压 - 电流转换器将超过阈值的输入电流钳位。