会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明授权
    • Logic analyzer systems and methods for programmable logic devices
    • 用于可编程逻辑器件的逻辑分析仪系统和方法
    • US07743296B1
    • 2010-06-22
    • US11691040
    • 2007-03-26
    • David PierceMichael HammerBrian M. Caslis
    • David PierceMichael HammerBrian M. Caslis
    • G01R31/28G06F11/00G06F9/455G06F7/38G06F17/50G06F9/45H03K17/693H03K19/177H03K19/173H03K19/00
    • G06F17/5027H03K19/177
    • A method of programming a programmable logic device (PLD), in accordance with an embodiment, includes receiving trigger unit information of a logic analyzer via a software interface for monitoring internal PLD signals and providing trigger unit output signals based on the internal PLD signals for the corresponding trigger units; and receiving trigger expression information of the logic analyzer via the software interface as a text string of logic operators and operands, wherein the operands represent the trigger unit output signals. The method may further include generating configuration data based on the trigger unit information and the trigger expression information; and providing the configuration data to the PLD, wherein a trigger expression based on the trigger expression information is stored within memory of the PLD.
    • 根据实施例的编程可编程逻辑器件(PLD)的方法包括经由用于监视内部PLD信号的软件接口接收逻辑分析器的触发单元信息,并且基于用于所述内部PLD信号的内部PLD信号提供触发单元输出信号 相应的触发单位; 并通过软件接口作为逻辑运算符和操作数的文本串接收逻辑分析仪的触发表达式信息,其中操作数表示触发单元输出信号。 该方法还可以包括:基于触发单元信息和触发表情信息生成配置数据; 以及向PLD提供配置数据,其中基于触发表达信息的触发表达式被存储在PLD的存储器内。
    • 6. 发明授权
    • Logic analyzer systems and methods for programmable logic devices
    • 用于可编程逻辑器件的逻辑分析仪系统和方法
    • US07536615B1
    • 2009-05-19
    • US11691003
    • 2007-03-26
    • David PierceMichael HammerBrian M. Caslis
    • David PierceMichael HammerBrian M. Caslis
    • G01R31/28
    • G01R31/3177
    • A programmable logic device includes, in accordance with one embodiment, a plurality of logic blocks; an interconnect structure adapted to route signals among the logic blocks; and a memory for storing data within the programmable logic device. A first set of the logic blocks are configured as logic analyzer trigger units adapted to each receive one or more input signals from within the programmable logic device and provide a corresponding trigger unit output signal. A portion of the memory stores a logic analyzer trigger expression, with the trigger unit output signals provided to the memory as address signals for the trigger expression.
    • 根据一个实施例,可编程逻辑器件包括多个逻辑块; 适于在逻辑块之间路由信号的互连结构; 以及用于在可编程逻辑器件内存储数据的存储器。 第一组逻辑块被配置为逻辑分析器触发单元,其适于每个从可编程逻辑器件中接收一个或多个输入信号,并提供相应的触发单元输出信号。 存储器的一部分存储逻辑分析器触发表达式,触发单元输出信号作为触发表达式的地址信号提供给存储器。