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1. 发明授权

US5961658A PR4 equalization and an EPR4 remod/demod sequence detector in a sampled amplitude read channel 失效
标题翻译： PR4均衡和EPR4重调/解调序列检测器
公开(公告)号：US5961658A
公开(公告)日：1999-10-05
申请号：US862492
申请日：1997-05-23
申请人： David E. Reed , William G. Bliss , Lisa C. Sundell
发明人： David E. Reed , William G. Bliss , Lisa C. Sundell
IPC分类号： G11B20/18 , H03M13/00 , H03M13/12
CPC分类号： H03M13/6343 , G11B20/10277 , H03M13/098 , H03M13/3776 , H03M13/41 , H03M5/145 , G11B20/10064 , G11B20/10074 , G11B20/10175 , G11B2020/1446 , G11B2220/2516
摘要： A sampled amplitude read channel is disclosed for disk storage systems that employs an EPR4 remod/demod sequence detector. To reduce the complexity of timing recovery, gain control and adaptive equalization, the channel samples are initially equalized into a PR4 partial response so that a simple slicer circuit can generate estimated sample values. The PR4 equalized channel samples are then passed through a 1+D filter to generate EPR4 equalized channel samples which are processed by an EPR4 Viterbi sequence detector to generate a preliminary binary sequence. The preliminary binary sequence is remodulated into an estimated or ideal PR4 sample sequence which is subtracted from the PR4 equalized channel samples to generate an error sample sequence. An error pattern detector processes the error sample sequence to detect the dominant error events associated with the EPR4 Viterbi sequence detector.
摘要翻译：公开了采用EPR4重构/解调序列检测器的磁盘存储系统的采样幅度读取通道。为了降低定时恢复的复杂度，增益控制和自适应均衡，信道样本最初被均衡为PR4部分响应，使得简单的限幅电路可以产生估计的采样值。然后将PR4均衡信道样本通过1 + D滤波器以产生由EPR4维特比序列检测器处理以产生初步二进制序列的EPR4均衡信道样本。将初步二进制序列重新调制成从PR4均衡信道样本中减去的估计或理想PR4采样序列，以生成误差采样序列。误差模式检测器处理误差采样序列以检测与EPR4维特比序列检测器相关的主要误差事件。

2. 发明授权

US5926490A Sampled amplitude read channel employing a remod/demod sequence detector guided by an error syndrome 失效
标题翻译：采用由误差综合征引导的重构/解调序列检测器的采样幅度读取通道
公开(公告)号：US5926490A
公开(公告)日：1999-07-20
申请号：US862493
申请日：1997-05-23
申请人： David E. Reed , William G. Bliss , Lisa C. Sundell
发明人： David E. Reed , William G. Bliss , Lisa C. Sundell
IPC分类号： G11B20/10 , G06F11/00
CPC分类号： G11B20/1403 , G11B20/10009 , G11B20/10037 , G11B20/10055
摘要： A sampled amplitude read channel is disclosed for disk storage systems that employs a remod/demod sequence detector guided by an error syndrome of an error detection code (EDC). The remod/demod sequence detector comprises: a conventional trellis type maximum likelihood sequence detector, such as a Viterbi detector, for detecting a preliminary binary sequence from the channel sample values; a syndrome generator for generating an error syndrome in response to the preliminary binary sequence; a remodulator for remodulating the detected binary sequence into a sequence of estimated ideal sample values; a sample error generator for subtracting the channel samples from the estimated samples to generate a sample error sequence; an error pattern detector for detecting potential error events in the sample error sequence; and an error corrector for correcting the preliminary binary sequence when the error syndrome indicates that an error occurred. In the embodiment disclosed herein, the error syndrome is generated as the parity over a predetermined number of bits. When a parity error occurs, a correction is made corresponding to the most likely error event detected. Guiding the remod/demod sequence detector with an error syndrome avoids miscorrections that may otherwise occur in conventional remod/demod sequence detectors.
摘要翻译：公开了采用由错误检测码（EDC）的误差综合征引导的重构/解调序列检测器的磁盘存储系统的采样幅度读取通道。重构/解调序列检测器包括：常规网格型最大似然序列检测器，例如维特比检测器，用于从信道样本值检测初步二进制序列; 一种用于响应于初步二进制序列产生误差综合征的综合征发生器; 用于将所检测的二进制序列重新调制成估计的理想样本值的序列的再调制器; 用于从估计样本中减去信道样本以产生样本误差序列的采样误差发生器; 用于检测样本误差序列中的潜在误差事件的误差模式检测器; 以及错误校正器，用于当错误校正器指示发生错误时校正初步二进制序列。在本文公开的实施例中，错误校正器被生成为超过预定位数的奇偶校验。当发生奇偶校验错误时，对应于检测到的最可能的错误事件进行校正。引导具有错误综合征的重构/解调序列检测器避免了传统的重构/解调序列检测器可能发生的误差。

3. 发明授权

US5771127A Sampled amplitude read channel employing interpolated timing recovery and a remod/demod sequence detector 失效
标题翻译：采用内插定时恢复的采样幅度读取通道和重构/解调序列检测器
公开(公告)号：US5771127A
公开(公告)日：1998-06-23
申请号：US681678
申请日：1996-07-29
申请人： David E. Reed , William R. Foland, Jr. , William G. Bliss , Richard T. Behrens , Lisa C. Sundell
发明人： David E. Reed , William R. Foland, Jr. , William G. Bliss , Richard T. Behrens , Lisa C. Sundell
IPC分类号： G11B20/10 , G11B20/14 , G11B5/09
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/1426
摘要： In a computer disk storage system for recording binary data, a sampled amplitude read channel comprises a sampling device for asynchronously sampling pulses in an analog read signal from a read head positioned over a disk storage medium, interpolated timing recovery for generating synchronous sample values, and a sequence detector for detecting the binary data from the synchronous sample values. The sequence detector comprises a demodulator for detecting a preliminary binary sequence which may contain bit errors, a remodulator for remodulating to estimated sample values, a means for generating sample error values, an error pattern detector for detecting the bit errors, an error detection validator, and an error corrector for correcting the bit errors. The remodulator comprises a partial erasure circuit which compensates for the non-linear reduction in amplitude of a primary pulse caused by secondary pulses located near the primary pulse. The error pattern detector comprises a peak error pattern detector and, if an error pattern is detected, a means for disabling the error pattern detector until the detected error pattern has been fully processed. The error detection validator checks the validity of a detected error event and, if valid, enables operation of the error corrector.
摘要翻译：在用于记录二进制数据的计算机磁盘存储系统中，采样幅度读取通道包括用于从位于盘存储介质上的读取头的模拟读取信号中异步采样脉冲的采样装置，用于产生同步采样值的内插定时恢复，以及序列检测器，用于从同步样本值检测二进制数据。序列检测器包括用于检测可能包含位错误的初步二进制序列的解调器，用于重新调制到估计样本值的再调制器，用于产生采样误差值的装置，用于检测位错误的误差模式检测器，错误检测验证器，以及用于校正位错误的纠错器。再调制器包括部分擦除电路，其补偿由位于主脉冲附近的次级脉冲引起的初级脉冲的幅度的非线性减小。误差模式检测器包括峰值误差模式检测器，并且如果检测到错误模式，则用于禁止错误模式检测器的装置，直到检测到的错误模式被完全处理为止。错误检测验证器检查检测到的错误事件的有效性，如果有效，则允许错误校正器的操作。

4. 发明授权

US06507546B1 2,2,1 Asymmetric partial response target in a sampled amplitude read channel for disk storage systems 有权
标题翻译： 2,2,1个磁盘存储系统采样振幅读通道中的非对称部分响应目标
公开(公告)号：US06507546B1
公开(公告)日：2003-01-14
申请号：US09439560
申请日：1999-11-12
申请人： William G. Bliss , Sian She , Lisa C. Sundell
发明人： William G. Bliss , Sian She , Lisa C. Sundell
IPC分类号： G11B7005
CPC分类号： G11B20/10287 , G11B20/10 , G11B20/10009 , G11B20/10055
摘要： A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated data sequence from a sequence of read signal sample values generated by an analog read signal emanating from a read head positioned over the disk storage medium. A sampling device samples the analog read signal to generate the read signal sample values, and a discrete-time equalizer equalizes the read signal sample values according to an asymmetric partial response target comprising a dipulse response of the form: (. . . , 0, 0,+X0,+X1,−X2,−X3,−X4, 0, 0, . . . ) where X0−X4 are non-zero to thereby generate equalized sample values. In the embodiments disclosed herein, X0−X4 are 2,2,1,2,1 respectively. A discrete-time sequence detector detects the estimated data sequence from the equalized sample values.
摘要翻译：公开了一种采样幅度读取通道，用于通过从由位于盘存储介质上的读取头发出的模拟读取信号产生的读取信号样本值的序列中检测估计的数据序列来读取记录在盘存储介质上的数据。采样设备对模拟读取信号进行采样以产生读取信号采样值，并且离散时间均衡器根据包括以下形式的二次脉冲响应的不对称部分响应目标来均衡读取信号采样值：其中X0-X4是非 - 从而产生均衡的样本值。在本文公开的实施方案中，X0-X4分别为2,2,1,2,1。离散时间序列检测器从均衡的样本值检测估计的数据序列。

5. 发明授权

US06707627B1 Error checking in a disk drive system using a modulo code 有权
标题翻译：使用模数代码检查磁盘驱动器系统时出错
公开(公告)号：US06707627B1
公开(公告)日：2004-03-16
申请号：US09518655
申请日：2000-03-03
申请人： David E. Reed , Lisa C. Sundell
发明人： David E. Reed , Lisa C. Sundell
IPC分类号： G11B509
CPC分类号： G11B20/18 , G11B5/012 , G11B5/09 , G11B20/10009 , G11B20/1426 , G11B20/1833
摘要： A disk drive system is disclosed that includes a disk device coupled to control circuitry. The control circuitry encodes data using a modulo code. The control circuitry separates the data into blocks and encodes the data by inserting stuff bits between blocks according to the modulo code. The control circuitry converts the encoded data into a write signal and transfers the write signal to the disk device. The control circuitry also receives a read signal from the disk device and converts the read signal into a data signal. The data signal represents blocks of data separated by stuff bits. The control circuitry detects errors in a block of data by determining the modulo value of the block of data and the following stuff bits.
摘要翻译：公开了一种包括耦合到控制电路的盘装置的磁盘驱动器系统。控制电路使用模数码对数据进行编码。控制电路将数据分成块并通过根据模数码在块之间插入填充位来对数据进行编码。控制电路将编码数据转换为写信号，并将写入信号传送到磁盘设备。控制电路还从盘装置接收读取信号，并将读取的信号转换为数据信号。数据信号表示由填充位分隔的数据块。控制电路通过确定数据块的模数值和以下填充位来检测数据块中的错误。

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