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    • 1. 发明授权
    • Method of repeater insertion for hierarchical integrated circuit design
    • 用于分层集成电路设计的中继器插入方法
    • US06662349B2
    • 2003-12-09
    • US10086232
    • 2002-02-27
    • David A. MorganRichard D. BlinneJames A. JensenChristopher J. Tremel
    • David A. MorganRichard D. BlinneJames A. JensenChristopher J. Tremel
    • G06F1750
    • G06F17/5068
    • A method of repeater insertion in a hierarchical integrated circuit includes defining an initial floorplan for a parent macro at a parent level in a hierarchical circuit design; passing outline and pin locations from the parent macro to a child macro sharing a common area with the parent macro; defining or modifying a floor plan for the child macro at a child level in the hierarchical circuit design in response to the outline and pin locations passed from the parent macro; passing physical restrictions in the child macro from the child macro to the parent macro; determining a location for a cell at the parent level of the hierarchical circuit design in an area of the parent macro shared by the child macro in response to the physical restrictions passed from the child macro; passing physical constraints in the parent macro associated with placement and routing of the cell from the parent level to the child macro; and generating an abstract representation for the child macro at the child level that includes an area cut out of the child macro corresponding to the location of the cell.
    • 在分级集成电路中插入中继器的方法包括:在分级电路设计中,在父级别定义母宏的初始平面图; 将轮廓和引脚位置从父宏传递到与父宏共享公共区域的子宏; 响应于从父宏传送的轮廓和针位置,在分级电路设计中定义或修改子级别的子宏的平面图; 将子宏中的子宏中的物理限制从子宏传递到父宏; 响应于从所述子宏中传递的物理限制,在所述子宏宏共享的所述母宏的区域中确定所述分级电路设计的所述母级的单元的位置; 在与从父级别到子宏的单元的放置和路由相关联的父宏中传递物理约束; 以及生成子级别的子宏的抽象表示,该子宏包括从对应于该单元的位置的子宏中切出的区域。