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1. 发明授权

US5467295A Bus arbitration with master unit controlling bus and locking a slave unit that can relinquish bus for other masters while maintaining lock on slave unit 失效
标题翻译：总线仲裁与主控单元控制总线和锁定从属单元，可以放弃其他主机的总线，同时保持从单元的锁定
公开(公告)号：US5467295A
公开(公告)日：1995-11-14
申请号：US876577
申请日：1992-04-30
申请人： Bruce Young , Dave Carson , Norman Rasmussen , Stephen Fischer , Jeffrey Rabe
发明人： Bruce Young , Dave Carson , Norman Rasmussen , Stephen Fischer , Jeffrey Rabe
IPC分类号： G06F13/364 , G06F13/36
CPC分类号： G06F13/364
摘要： A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it. Signal line LOCK# is owned by only one master agent at a time. Although the LOCK# signal must be obtained by acquiring the bus while LOCK# is high, ownership of the line is maintained as long as LOCK# is held low. Therefore, a master agent can own the lock while another master uses the bus.
摘要翻译：一种计算机总线，其使得总线主控代理能够向/从从属代理发送/接收数据的突发，而不事先确定要传送的数据字的数量，或甚至可以传送的最大数量的数据字。主机，从机或总线仲裁器可以随时以最小的开销终止突发。此外，主机或从机可以通过添加等待状态来抑制数据传输的速度。分布式地址解码由耦合到总线的每个代理执行。每个代理人必须要求主人指示的交易。如果没有代理人在预定数量的时钟周期内要求交易，减法解码设备可以默认地要求交易。总线还包括总线锁，其中每个总线从属代理可能能够进入锁定状态，并且一旦处于锁定状态，则拒绝除了被锁定的主代理发起的所有访问之外的所有访问。信号线LOCK＃一次只由一个主代理拥有。虽然LOCK＃信号必须通过在LOCK＃为高电平时获取总线而获得，但只要LOCK＃保持低电平，就保持线路的所有权。因此，主代理可以拥有锁，而另一个主机使用总线。

2. 发明授权

US5740376A Signaling protocol for a peripheral component interconnect 失效
标题翻译：用于外围组件互连的信令协议
公开(公告)号：US5740376A
公开(公告)日：1998-04-14
申请号：US799526
申请日：1997-02-12
申请人： Dave Carson , Bruce Young , Norman Rasmussen , Stephen Fischer , Jeffrey Rabe
发明人： Dave Carson , Bruce Young , Norman Rasmussen , Stephen Fischer , Jeffrey Rabe
IPC分类号： G06F13/364 , G06F13/372
CPC分类号： G06F13/364
摘要： A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it. Signal line LOCK# is owned by only one master agent at a time. Although the LOCK# signal must be obtained by acquiring the bus while LOCK# is high, ownership of the line is maintained as long as LOCK# is held low. Therefore, a master agent can own the lock while another master uses the bus.
摘要翻译：一种计算机总线，其使得总线主控代理能够向/从从属代理发送/接收数据的突发，而不事先确定要传送的数据字的数量，或甚至可以传送的最大数量的数据字。主机，从机或总线仲裁器可以随时以最小的开销终止突发。此外，主机或从机可以通过添加等待状态来抑制数据传输的速度。分布式地址解码由耦合到总线的每个代理执行。每个代理人必须要求主人指示的交易。如果没有代理人在预定数量的时钟周期内要求交易，减法解码设备可以默认地要求交易。总线还包括总线锁，其中每个总线从属代理可能能够进入锁定状态，并且一旦处于锁定状态，则拒绝除了被锁定的主代理发起的所有访问之外的所有访问。信号线LOCK＃一次只由一个主代理拥有。虽然LOCK＃信号必须通过在LOCK＃为高电平时获取总线而获得，但只要LOCK＃保持低电平，就保持线路的所有权。因此，主代理可以拥有锁，而另一个主机使用总线。

3. 发明授权

US5887194A Locking protocol for peripheral component interconnect utilizing master device maintaining assertion of lock signal after relinquishing control of bus such that slave device remains locked 失效
标题翻译：使用主设备的外围组件互连的锁定协议，在放弃总线控制之后保持锁定信号的断言，使得从设备保持锁定
公开(公告)号：US5887194A
公开(公告)日：1999-03-23
申请号：US472069
申请日：1995-06-05
申请人： Dave Carson , Bruce Young , Norman Rasmussen , Stephen Fischer , Jeffrey Rabe
发明人： Dave Carson , Bruce Young , Norman Rasmussen , Stephen Fischer , Jeffrey Rabe
IPC分类号： G06F13/364 , G06F13/14 , G06F13/20
CPC分类号： G06F13/364
摘要： A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it. Signal line LOCK# is owned by only one master agent at a time. Although the LOCK# signal must be obtained by acquiring the bus while LOCK# is high, ownership of the line is maintained as long as LOCK# is held low. Therefore, a master agent can own the lock while another master uses the bus.
摘要翻译：一种计算机总线，其使得总线主控代理能够向/从从属代理发送/接收数据的突发，而不事先确定要传送的数据字的数量，或甚至可以传送的最大数量的数据字。主机，从机或总线仲裁器可以随时以最小的开销终止突发。此外，主机或从机可以通过添加等待状态来抑制数据传输的速度。分布式地址解码由耦合到总线的每个代理执行。每个代理人必须要求主人指示的交易。如果没有代理人在预定数量的时钟周期内要求交易，减法解码设备可以默认地要求交易。总线还包括总线锁，其中每个总线从属代理可能能够进入锁定状态，并且一旦处于锁定状态，则拒绝除了被锁定的主代理发起的所有访问之外的所有访问。信号线LOCK＃一次只由一个主代理拥有。虽然LOCK＃信号必须通过在LOCK＃为高电平时获取总线而获得，但只要LOCK＃保持低电平，就保持线路的所有权。因此，主代理可以拥有锁，而另一个主机使用总线。

4. 发明授权

US07160096B2 Perforation mechanism for a foam-in-bag cushion and method of use 有权
标题翻译：泡沫袋衬垫的穿孔机构和使用方法
公开(公告)号：US07160096B2
公开(公告)日：2007-01-09
申请号：US10692579
申请日：2003-10-24
申请人： Michael Knaak , Andy Tyler , Dave Carson , Daniel C. George
发明人： Michael Knaak , Andy Tyler , Dave Carson , Daniel C. George
IPC分类号： B26F1/24
CPC分类号： B29C44/588 , B26D3/085 , B26D5/02 , B26D7/20 , B26D7/22 , B26D2007/202 , B26F1/24 , B29C44/182 , Y10T83/04 , Y10T83/9314 , Y10T83/9377
摘要： A perforation apparatus particularly useful for creating perforations in a foam-in-bag cushion and methods of using such apparatus are provided. The perforation apparatus is comprised of a frame, a main shaft mounted in the frame so as to be rotatable about a central axis, at least one needle roller coupled to the main shaft such that rotation of the main shaft moves the needle roller through a predetermined arc of motion out of and into an operative position adjacent to and perforating a plastic film advancing past the needle roller, and an actuator coupled with the main shaft and operable to rotate the main shaft so as to move the needle roller. Optionally, the apparatus is further comprised of at least one backup roller. Methods of preparing and perforating a foam-in bag cushion using the perforating apparatus are also provided.
摘要翻译：提供了特别适用于在泡沫袋衬垫中产生穿孔的穿孔装置以及使用这种装置的方法。所述穿孔装置包括框架，主轴安装在所述框架中以能够围绕中心轴线旋转;至少一个滚针，其联接到所述主轴，使得所述主轴的旋转使所述滚针移动通过预定的运动的弧线离开并进入与穿过滚针的塑料薄膜相邻并穿孔的操作位置，以及与主轴相结合并可操作以使主轴旋转以便使滚针移动的致动器。可选地，该装置还包括至少一个支撑辊。还提供了使用穿孔装置制备和穿孔泡沫袋垫的方法。

5. 发明申请

US20050087048A1 Perforation mechanism for a foam-in-bag cushion and method of use 有权
标题翻译：泡沫袋衬垫的穿孔机构和使用方法
公开(公告)号：US20050087048A1
公开(公告)日：2005-04-28
申请号：US10692579
申请日：2003-10-24
申请人： Michael Knaak , Andy Tyler , Dave Carson , Daniel George
发明人： Michael Knaak , Andy Tyler , Dave Carson , Daniel George
IPC分类号： B26D3/08 , B26D5/02 , B26D7/20 , B26F1/24 , B29C44/18 , B29C44/34 , B26D1/00
CPC分类号： B29C44/588 , B26D3/085 , B26D5/02 , B26D7/20 , B26D7/22 , B26D2007/202 , B26F1/24 , B29C44/182 , Y10T83/04 , Y10T83/9314 , Y10T83/9377
摘要： A perforation apparatus particularly useful for creating perforations in a foam-in-bag cushion and methods of using such apparatus are provided. The perforation apparatus is comprised of a frame, a main shaft mounted in the frame so as to be rotatable about a central axis, at least one needle roller coupled to the main shaft such that rotation of the main shaft moves the needle roller through a predetermined arc of motion out of and into an operative position adjacent to and perforating a plastic film advancing past the needle roller, and an actuator coupled with the main shaft and operable to rotate the main shaft so as to move the needle roller. Optionally, the apparatus is further comprised of at least one backup roller. Methods of preparing and perforating a foam-in bag cushion using the perforating apparatus are also provided.
摘要翻译：提供了特别适用于在泡沫袋衬垫中产生穿孔的穿孔装置以及使用这种装置的方法。所述穿孔装置包括框架，主轴安装在所述框架中以能够围绕中心轴线旋转;至少一个滚针，其联接到所述主轴，使得所述主轴的旋转使所述滚针移动通过预定的运动的弧线离开并进入与穿过滚针的塑料薄膜相邻并穿孔的操作位置，以及与主轴相结合并可操作以使主轴旋转以便使滚针移动的致动器。可选地，该装置还包括至少一个支撑辊。还提供了使用穿孔装置制备和穿孔泡沫袋垫的方法。

6. 发明授权

US6125158A Phase locked loop and multi-stage phase comparator 失效
标题翻译：锁相环和多级相位比较器
公开(公告)号：US6125158A
公开(公告)日：2000-09-26
申请号：US996771
申请日：1997-12-23
申请人： Dave Carson , Alan Dunne , Matthew Vea , Scott Guest , Robert Wyatt
发明人： Dave Carson , Alan Dunne , Matthew Vea , Scott Guest , Robert Wyatt
IPC分类号： H03D13/00 , H03L7/087 , H03L7/091 , H04L7/033 , H03D3/24 , H04L7/00 , H04L25/00 , H04L25/40
CPC分类号： H03L7/087 , H03D13/003 , H04L7/0337 , H03L7/091
摘要： The disclosure describes a multi-stage phase comparator and a phase-locked loop incorporating such a comparator. The comparator measures a phase difference between a reference signal and an output signal using a periodic clock. The comparator is a two stage comparator comprising a fine and coarse comparator. The coarse comparator measures the number of full clock periods between a transition of the reference signal and the output signal. The fine comparator comprises a delay line generator that generates a plurality of delayed clocks. The delayed clocks are used to over sample the reference signal to determine a fine phase difference representing a remaining fraction of the clock period, between transitions of the reference and output signals. A phase locked loop using the multi-stage comparator allows for more accurate phase locking.
摘要翻译：本公开描述了一种多级相位比较器和包含这种比较器的锁相环。比较器使用周期性时钟测量参考信号和输出信号之间的相位差。比较器是包括精细和粗略比较器的两级比较器。粗略比较器测量参考信号和输出信号的转换之间的全部时钟周期数。精细比较器包括产生多个延迟时钟的延迟线发生器。延迟时钟用于对参考信号进行过采样，以确定在参考和输出信号的转换之间表示时钟周期的剩余部分的精细相位差。使用多级比较器的锁相环允许更准确的相位锁定。

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