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    • 1. 发明授权
    • Latch-up free ESD protection
    • 免维护ESD保护
    • US08710545B2
    • 2014-04-29
    • US13533959
    • 2012-06-26
    • Da-Wei LaiHandoko Linewih
    • Da-Wei LaiHandoko Linewih
    • H01L29/74
    • H01L27/0262H01L29/7436
    • An ESD module having a first portion (FP) and a second portion (SP) in a substrate is presented. The FP includes a FP well of a second polarity type and first and second FP contact regions. The first FP contact region is of a first polarity type and the second FP contact region is of a second polarity type. The SP includes a SP well of a first polarity type and first and second SP contact regions. The first SP contact region is of a first polarity type and the second SP contact region is of a second polarity type. An intermediate portion (IP) is disposed in the substrate between the FP and SP in the substrate. The IP includes a well of the second polarity type. The IP increases trigger current and holding voltage of the module to prevent latch up during normal device operation.
    • 提出了一种在衬底中具有第一部分(FP)和第二部分(SP)的ESD模块。 FP包括第二极性类型的FP阱和第一和第二FP接触区域。 第一FP接触区域是第一极性类型,第二FP接触区域是第二极性类型。 SP包括第一极性类型和第一和第二SP接触区域的SP阱。 第一SP接触区域是第一极性类型,第二SP接触区域是第二极性类型。 在衬底中的FP和SP之间的衬底中设置中间部分(IP)。 IP包括第二极性类型的阱。 IP增加模块的触发电流和保持电压,以防止在正常设备操作期间锁定。
    • 4. 发明授权
    • Latch-up immune ESD protection
    • 锁定免疫ESD保护
    • US08913358B2
    • 2014-12-16
    • US13535314
    • 2012-06-27
    • Da-Wei LaiMahadeva Iyer Natarajan
    • Da-Wei LaiMahadeva Iyer Natarajan
    • H02H9/00
    • H01L27/0262
    • An ESD module is presented. The ESD module includes an ESD circuit and a latch-up (LU) control circuit. The ESD circuit has a pad terminal and a low power source terminal. The LU control circuit includes a first LU terminal coupled to a high power source and an LU output terminal coupled to the ESD circuit. The ESD module has first and second operating modes. In the first operating mode, the LU control circuit is deactivated and the ESD circuit has a first triggering current It1 which is less than 100 mA. In the second operating mode, the LU control circuit is activated and the ESD circuit has a second triggering current It2 which is greater than 100 mA.
    • 介绍了ESD模块。 ESD模块包括ESD电路和闭锁(LU)控制电路。 ESD电路具有焊盘端子和低电源端子。 LU控制电路包括耦合到高电源的第一LU端子和耦合到ESD电路的LU输出端子。 ESD模块具有第一和第二操作模式。 在第一种工作模式下,LU控制电路被停用,ESD电路具有小于100mA的第一触发电流It1。 在第二种工作模式下,LU控制电路被激活,ESD电路具有大于100mA的第二触发电流It2。
    • 7. 发明授权
    • Electrostatic discharge (ESD) protection and operating method thereof
    • 静电放电(ESD)保护及其操作方法
    • US08797698B2
    • 2014-08-05
    • US13770544
    • 2013-02-19
    • Da-Wei LaiWade Ma
    • Da-Wei LaiWade Ma
    • H02H9/00
    • H02H9/046
    • An electrostatic discharge (ESD) protection circuit includes a clamp transistor, and inverter, a resistance-capacitance (RC) circuit, and a current mirror. The clamp transistor is coupled between a first supply node and a second supply node. The inverter has an input end and an output end, and the output end of the inverter is coupled with a gate of the clamp transistor. The RC circuit is coupled to the first supply node. The current mirror includes a first transistor and a second transistor. The first transistor is coupled between the input end of the inverter and the second supply node, and the second transistor is coupled between the RC circuit and the second supply node.
    • 静电放电(ESD)保护电路包括钳位晶体管,反相器,电阻电容(RC)电路和电流镜。 钳位晶体管耦合在第一电源节点和第二电源节点之间。 逆变器具有输入端和输出端,反相器的输出端与钳位晶体管的栅极耦合。 RC电路耦合到第一电源节点。 电流镜包括第一晶体管和第二晶体管。 第一晶体管耦合在反相器的输入端和第二电源节点之间,第二晶体管耦合在RC电路和第二电源节点之间。
    • 8. 发明授权
    • ESD protection device for circuits with multiple power domains
    • 具有多个电源域的电路的ESD保护装置
    • US08767360B2
    • 2014-07-01
    • US13482413
    • 2012-05-29
    • Ying-Chang LinDa-Wei Lai
    • Ying-Chang LinDa-Wei Lai
    • H02H9/00
    • H02H9/046H01L2924/0002Y10T29/49117H01L2924/00
    • A ESD protection scheme is disclosed for circuits with multiple power domains. Embodiments include: coupling a first power clamp to a first power rail and a first ground rail of a first domain; coupling a second power clamp to a second power rail and a second ground rail of a second domain; providing a blocking circuit for blocking current from an ESD event; providing an I/O interface connection in the first domain for transmitting signals from the first domain to the blocking circuit; providing a core interface connection in the second domain for transmitting signals from the blocking circuit to the second domain; coupling an input connection of the blocking circuit to the I/O interface connection; and coupling an output connection of the blocking circuit to a core interface connection.
    • 公开了具有多个电源域的电路的ESD保护方案。 实施例包括:将第一电源钳连接到第一电源轨和第一磁畴的第一接地轨; 将第二电力钳耦合到第二电力轨道和第二区域的第二接地轨道; 提供阻塞来自ESD事件的电流的阻塞电路; 在第一域中提供I / O接口连接,用于将信号从第一域传输到阻塞电路; 在第二域中提供核心接口连接,用于将信号从阻塞电路传输到第二域; 将阻塞电路的输入连接耦合到I / O接口连接; 并将阻塞电路的输出连接耦合到核心接口连接。
    • 9. 发明申请
    • ESD-ROBUST I/O DRIVER CIRCUITS
    • ESD-ROBUST I / O驱动电路
    • US20130321962A1
    • 2013-12-05
    • US13482423
    • 2012-05-29
    • Da-Wei LaiYing-Chang Lin
    • Da-Wei LaiYing-Chang Lin
    • H02H9/04H01L21/60
    • H01L27/0292H01L2924/0002H02H9/046H01L2924/00
    • An ESD-robust I/O driver circuit is disclosed. Embodiments include providing a first NMOS transistor having a first source, a first drain, and a first gate; coupling the first source is coupled to a ground rail, and the first drain to an I/O pad; providing a gate driver control circuit including a second NMOS transistor having a second source, a second drain, and a second gate; and coupling the second drain to the first gate, the second source to the ground rail, wherein the gate driver control circuit provides a ground potential to the first gate during an ESD event occurring from the I/O pad to the ground rail.
    • 公开了一种ESD稳健的I / O驱动器电路。 实施例包括提供具有第一源极,第一漏极和第一栅极的第一NMOS晶体管; 耦合第一源耦合到接地导轨,并且第一漏极耦合到I / O焊盘; 提供包括具有第二源极,第二漏极和第二栅极的第二NMOS晶体管的栅极驱动器控制电路; 以及将所述第二漏极耦合到所述第一栅极,所述第二源极耦合到所述接地导轨,其中所述栅极驱动器控制电路在从所述I / O焊盘发生到所述接地导轨的ESD事件期间向所述第一栅极提供接地电位。
    • 10. 发明申请
    • ESD PROTECTION DEVICE FOR CIRCUITS WITH MULTIPLE POWER DOMAINS
    • 具有多个电源域的电路的ESD保护装置
    • US20130321961A1
    • 2013-12-05
    • US13482413
    • 2012-05-29
    • Ying-Chang LinDa-Wei Lai
    • Ying-Chang LinDa-Wei Lai
    • H02H9/04H05K13/00
    • H02H9/046H01L2924/0002Y10T29/49117H01L2924/00
    • A ESD protection scheme is disclosed for circuits with multiple power domains. Embodiments include: coupling a first power clamp to a first power rail and a first ground rail of a first domain; coupling a second power clamp to a second power rail and a second ground rail of a second domain; providing a blocking circuit for blocking current from an ESD event; providing an I/O interface connection in the first domain for transmitting signals from the first domain to the blocking circuit; providing a core interface connection in the second domain for transmitting signals from the blocking circuit to the second domain; coupling an input connection of the blocking circuit to the I/O interface connection; and coupling an output connection of the blocking circuit to a core interface connection.
    • 公开了具有多个电源域的电路的ESD保护方案。 实施例包括:将第一电源钳连接到第一电源轨和第一磁畴的第一接地轨; 将第二电力钳耦合到第二电力轨道和第二区域的第二接地轨道; 提供阻塞来自ESD事件的电流的阻塞电路; 在第一域中提供I / O接口连接,用于将信号从第一域传输到阻塞电路; 在第二域中提供核心接口连接,用于将信号从阻塞电路传输到第二域; 将阻塞电路的输入连接耦合到I / O接口连接; 并将阻塞电路的输出连接耦合到核心接口连接。