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1. 发明申请

US20060200510A1 Precision cordic processor 审中-公开
标题翻译：精密线性处理器
公开(公告)号：US20060200510A1
公开(公告)日：2006-09-07
申请号：US11346754
申请日：2006-01-30
申请人： Cindy Wang , Xiangyang Xu , Xiaochun Chen
发明人： Cindy Wang , Xiangyang Xu , Xiaochun Chen
IPC分类号： G06F15/00
CPC分类号： G06F7/4818 , G06F7/49921 , G06F7/49947 , G06F7/5446 , H04L27/227 , H04L2027/0026 , H04L2027/003
摘要： A CORDIC angle calculator for a baseband IC receiver incorporates a CORDIC algorithm calculating processor with an input scaling means receiving input data, scaling the input data and providing it to the CORDIC processor. An output scaling means receives output data from the CORDIC processor and rescales the output data to provide a calculated angle. In an exemplary embodiment, the input scaling means includes means for shifting the input data for bit reduction and providing a shift signal corresponding to the input data shift and wherein the output scaling means is responsive to the shift signal.
摘要翻译：用于基带IC接收机的CORDIC角度计算器包括CORDIC算法计算处理器和输入缩放装置接收输入数据，缩放输入数据并将其提供给CORDIC处理器。输出缩放装置从CORDIC处理器接收输出数据并重新调整输出数据以提供计算出的角度。在示例性实施例中，输入缩放装置包括用于移位用于比特减少的输入数据并提供对应于输入数据移位的移位信号的装置，并且其中输出缩放装置响应于移位信号。

2. 发明申请

US20060222137A1 STORAGE EFFICIENT SLIDING WINDOW SUM 失效
标题翻译：存储高效滑动窗口SUM
公开(公告)号：US20060222137A1
公开(公告)日：2006-10-05
申请号：US11306986
申请日：2006-01-18
申请人： Cindy Wang , Xiangyang Xu , Xiaochun Chen
发明人： Cindy Wang , Xiangyang Xu , Xiaochun Chen
IPC分类号： H04L7/00
CPC分类号： H04L27/22 , H03K2005/00241 , H04L27/2275 , H04L2025/03401 , H04L2027/0046 , H04L2027/0063
摘要： A delay buffer includes a first shift register receiving input data and having a shift signal input port. The first shift register right shifts the input data responsive to a shift signal on the shift signal input port. The shift signal is determined based on an effective bit width of the input data. A first delay line receives the shifted data from the first shift register while a second delay line of equal length to the first delay line receives the shift signal. A second shift register receives the output from the first delay line and receives the output of the second delay line on a shift signal input port. The second shift register then left shifts the data contained therein according to the shift signal.
摘要翻译：延迟缓冲器包括接收输入数据并具有移位信号输入端口的第一移位寄存器。第一移位寄存器根据移位信号输入端口上的移位信号，右移位输入数据。基于输入数据的有效位宽来确定移位信号。第一延迟线接收来自第一移位寄存器的移位数据，而与第一延迟线等长的第二延迟线接收移位信号。第二移位寄存器接收来自第一延迟线的输出，并接收移位信号输入端口上的第二延迟线的输出。然后，第二移位寄存器根据移位信号移位其中包含的数据。

3. 发明申请

US20150279277A1 Pixel Driving Circuit of OLED Display and the Driving Method Thereof 审中-公开
标题翻译： OLED显示器的像素驱动电路及其驱动方法
公开(公告)号：US20150279277A1
公开(公告)日：2015-10-01
申请号：US14374269
申请日：2014-04-17
申请人： Xiangyang Xu
发明人： Xiangyang Xu
IPC分类号： G09G3/32
CPC分类号： G09G3/3233 , G09G3/3291 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/0251 , G09G2310/061 , G09G2320/0233 , G09G2320/043
摘要： The present invention discloses a pixel driving circuit of OLED display, which utilizes a 6T2C structure, at least comprising: a scanning transistor TFT1, a driving transistor TFT2, a first compensation transistor TFT3, a second compensation transistor TFT4, a first reset transistor TFT5, a second reset transistor TFT6, an organic light emitting diode OLED, a coupling capacitor C1, and a storage capacitor C2. Correspondingly, the embodiment of the present invention further discloses a driving method of the pixel driving circuit of OLED display. The embodiment of the present invention can compensate the shift of the threshold voltage of the driving transistor, which improves the grayscale and image uniformity of OLED.
摘要翻译：本发明公开了一种利用6T2C结构的OLED显示器的像素驱动电路，至少包括：扫描晶体管TFT1，驱动晶体管TFT2，第一补偿晶体管TFT3，第二补偿晶体管TFT4，第一复位晶体管TFT5，第二复位晶体管TFT6，有机发光二极管OLED，耦合电容器C1和存储电容器C2。相应地，本发明的实施例还公开了OLED显示器的像素驱动电路的驱动方法。本发明的实施例可以补偿驱动晶体管的阈值电压的偏移，这改善了OLED的灰度和图像均匀性。

4. 发明授权

US09118526B2 Method and apparatus for controlling data storage 有权
标题翻译：用于控制数据存储的方法和装置
公开(公告)号：US09118526B2
公开(公告)日：2015-08-25
申请号：US13588389
申请日：2012-08-17
申请人： Xiangyang Xu , Guangyu Shi , Hongbo Zhang , Liufei Wen
发明人： Xiangyang Xu , Guangyu Shi , Hongbo Zhang , Liufei Wen
IPC分类号： G06F12/00 , H04L29/08 , G06F12/08
CPC分类号： H04L29/08729 , G06F12/0893
摘要： Disclosed are a method and an apparatus for controlling data storage. The method includes: obtaining the number of copies of to-be-placed media content; inputting user set information, server set information, media traffic demand information, and network topology information that are collected into a joint optimization model that is based on server selection and traffic engineering to perform joint optimization, and obtaining output information; performing statistics collection on the output information to obtain user access statistics of the to-be-placed media content on each cache device; and placing, according to the user access statistics of the media content and the number of copies, the copies of the to-be-placed media content so that the copies of the to-be-placed media content are preferentially placed on a cache device having large user access statistics. Embodiments of the present invention also provide an apparatus for controlling data storage.
摘要翻译：公开了一种用于控制数据存储的方法和装置。该方法包括：获得要被放置的媒体内容的份数; 输入用户集信息，服务器集信息，媒体流量需求信息和网络拓扑信息，收集到基于服务器选择和流量工程的联合优化模型中进行联合优化，获得输出信息; 对输出信息进行统计收集，以获得每个缓存设备上待定媒体内容的用户访问统计信息; 以及根据所述媒体内容的用户访问统计信息和所述份数来放置所述要被放置的媒体内容的副本，使得所述要被放置的媒体内容的副本优先地放置在高速缓存设备上具有大量用户访问统计信息。本发明的实施例还提供了一种用于控制数据存储的装置。

5. 发明申请

US20150102354A1 ANTISTATIC STRUCTURE OF ARRAY SUBSTRATE 审中-公开
标题翻译：阵列基板的抗静电结构
公开(公告)号：US20150102354A1
公开(公告)日：2015-04-16
申请号：US14345731
申请日：2013-10-13
申请人： Xiangyang Xu , Weimin Chang , Zhiyang Song , Liang Wang
发明人： Xiangyang Xu , Weimin Chang , Zhiyang Song , Liang Wang
IPC分类号： G02F1/1362 , H01L27/12 , H01L27/02 , G02F1/1368
CPC分类号： G02F1/136204 , H01L27/0288 , H01L27/124
摘要： The present invention provides an antistatic structure of an array substrate, which includes: an effective zone (60) of an array substrate and a plurality of dummy wires (26) surrounding the effective zone (60). The effective zone (60) includes a plurality of signal wires (22) and a plurality of shorting bars (24) respectively in electrical connection with the plurality of signal wires (22). The dummy wires (26) are set to be respectively corresponding to and adjacent to outermost ones of the shorting bars (24) of the effective zone (60). The dummy wires (26) each include an inner side (28) that is close to the shorting bars (24) and forms a saw-toothed arrangement. The present invention arranges a dummy wire adjacent to each of the outermost ones of shorting bars and the dummy wire has one side that is close to the shorting bar and forms a saw-toothed arrangement. As such, during a manufacturing process of the array substrate, particularly in dry etching operations of an insulation protection layer and an active layer, metal intersections of the shorting bar can be well protected from static electricity damage caused by abnormal discharge resulting from plasma so as to improve product quality.
摘要翻译：本发明提供了阵列基板的抗静电结构，其包括：阵列基板的有效区域（60）和围绕有效区域（60）的多个虚拟布线（26）。有效区域（60）包括分别与多条信号线（22）电连接的多条信号线（22）和多条短路棒（24）。虚拟线（26）分别设置成与有效区域（60）的短路棒（24）的最外侧相对应并相邻。虚拟线（26）各自包括靠近短路棒（24）的内侧（28）并且形成锯齿形布置。本发明将虚拟线配置在与短路棒的最外侧的每一个相邻的位置，并且虚设线具有靠近短路棒的一侧，并且形成锯齿状的布置。因此，在阵列基板的制造工序中，特别是在绝缘保护层和有源层的干式蚀刻操作中，可以很好地保护短路棒的金属交叉点免受由等离子体引起的异常放电引起的静电损坏，从而提高产品质量。

6. 发明申请

US20120002542A1 Traffic Engineering and Server Selection for Content Distribution 有权
标题翻译：内容分发的流量工程和服务器选择
公开(公告)号：US20120002542A1
公开(公告)日：2012-01-05
申请号：US13012500
申请日：2011-01-24
申请人： Xiangyang Xu , Ravishankar Ravindran , Haiyong Xie , Jianyun Zhu , Liufei Wen , Guangyu Shi , Guoqiang Wang , Pengwei Wang
发明人： Xiangyang Xu , Ravishankar Ravindran , Haiyong Xie , Jianyun Zhu , Liufei Wen , Guangyu Shi , Guoqiang Wang , Pengwei Wang
IPC分类号： H04L12/56
CPC分类号： H04L67/1004 , H04L47/10 , H04L47/70
摘要： An apparatus comprising a traffic engineering (TE) and server selection (SS) component configured to couple to an SS component and operate at a first time scale based on SS policies from the SS component, wherein the SS is configured to operate at a second timescale based on TE policies from the TE and SS component, and wherein the second timescale has a finer time granularity than the first time scale by at least one order of magnitude. Also disclosed is a network component comprising a receiver configured to receive one or more SS policies from a content provider or customer node, a logic circuit configured to compute a plurality of joint TE and SS policies for a plurality of network nodes based on the received SS policies, and a transmitter configured to send the joint TE and SS components to the content provider or customer node.
摘要翻译：一种包括业务工程（TE）和服务器选择（SS）组件的设备，其被配置为耦合到SS组件并且基于来自所述SS组件的SS策略以第一时标操作，其中所述SS被配置为在第二时间尺度基于来自TE和SS分量的TE策略，并且其中所述第二时间尺度具有比所述第一时间尺度更精细的时间粒度至少一个数量级。还公开了一种网络组件，包括被配置为从内容提供商或客户节点接收一个或多个SS策略的接收器，逻辑电路，被配置为基于所接收的SS来计算多个网络节点的多个联合TE和SS策略策略和被配置为将联合TE和SS组件发送到内容提供商或客户节点的发射机。

7. 发明申请

US20150205156A1 IN-CELL TOUCH DEVICE FOR DOUBLE-GRID PANEL 有权
标题翻译：用于双面板的小型触摸装置
公开(公告)号：US20150205156A1
公开(公告)日：2015-07-23
申请号：US14241818
申请日：2014-01-20
申请人： Xiangyang Xu
发明人： Xiangyang Xu
IPC分类号： G02F1/1333 , G02F1/1362 , G02F1/1335
CPC分类号： G02F1/13338 , G06F3/0412 , G06F3/042 , G06F3/045
摘要： The present disclosure discloses a double-grid panel in-cell touch device, comprising a touch panel which includes a plurality of base units with two grid scanning lines being arranged between every two adjacent rows of base units. Each base unit includes three pixel electrodes respectively selected as red, green, and blue, with a data line arranged between every two adjacent columns of pixel electrodes, so that four data lines are provided at each column of base units with two of the four data lines respectively placed at both sides of the column thereof, wherein each pixel electrode has a pixel switch connected to one of the four data lines, and the pixel switches at each column of pixel units are distributed in such a manner that at least one of said four data lines is vacant. Each base unit is connected to a touch unit which is further connected to one of the grid scanning lines, and the grid scanning line connected to the touch unit serves as a touch scanning line, while one of the vacant data lines serves as a touch receiving line which is connected to the touch unit. The touch device achieves the touch function without addition of extra wires or processing difficulties based on the structure of the existing double-grid panels.
摘要翻译：本公开公开了一种双栅板面板内单元触摸装置，包括触摸面板，其包括多个基座单元，其中两个相邻行的基本单元之间布置有两个格栅扫描线。每个基本单元包括分别选择为红色，绿色和蓝色的三个像素电极，其中数据线布置在每两个相邻列的像素电极之间，使得四个数据线在基本单元的每一列处被提供，其中四个数据中的两个分别放置在其列的两侧的线，其中每个像素电极具有连接到四条数据线中的一条的像素开关，并且像素单元的每列的像素切换以如下方式分布，使得至少一个所述四条数据线空缺。每个基本单元连接到触摸单元，该触摸单元进一步连接到一个网格扫描线，并且连接到触摸单元的网格扫描线用作触摸扫描线，而空中数据线之一用作触摸接收连接到触摸单元的线。触摸装置可以实现触摸功能，而不会因现有双栅板的结构而增加额外的电线或处理困难。

8. 发明申请

US20150187245A1 Light Sensing Touch Panel and Low-Power Driving Control Method Thereof 有权
标题翻译：光感应触摸屏及其低功耗驱动控制方法
公开(公告)号：US20150187245A1
公开(公告)日：2015-07-02
申请号：US14240713
申请日：2014-01-09
申请人： Xiangyang Xu
发明人： Xiangyang Xu
IPC分类号： G09G3/06 , G06F3/041
CPC分类号： G06F3/0416 , G06F1/3262 , G06F3/041 , G06F3/0412 , G06F3/0421 , G09G3/06
摘要： The present invention discloses a low-power driving control method of light sensing touch panel, which comprises the following steps: measuring the ambient light field intensity of the light sensing touch panel, and outputting a light field signal; outputting an amplification signal adapting to a touch signal according to the intensity of the light field signal; amplifying the touch signal according to the amplification signal, and driving the light sensing touch panel. The present invention further discloses a light sensing touch panel. The light sensing touch panel and the low-power driving control method thereof according to the present invention can reduce the power consumption of the touch panel without affecting the touch sensitivity.
摘要翻译：本发明公开了一种感光触摸屏的低功耗驱动控制方法，包括以下步骤：测量感光触摸屏的环境光场强度，并输出光场信号; 根据光场信号的强度输出适合于触摸信号的放大信号; 根据放大信号放大触摸信号，驱动感光触摸面板。本发明还公开了一种感光触摸面板。根据本发明的感光触摸面板和低功率驱动控制方法可以在不影响触摸灵敏度的情况下降低触摸面板的功耗。

9. 发明申请

US20150185522A1 THREE-LEVEL-DRIVEN ARRAY SUBSTRATE ROW DRIVING CIRCUIT 有权
标题翻译：三级驱动阵列驱动电路
公开(公告)号：US20150185522A1
公开(公告)日：2015-07-02
申请号：US14347608
申请日：2014-01-09
申请人： Xiangyang Xu
发明人： Xiangyang Xu
IPC分类号： G02F1/133
CPC分类号： G02F1/13306 , G09G3/3677 , G09G2310/0286 , G09G2310/067 , G09G2320/0219
摘要： A three-level-driven array substrate row driving circuit includes cascaded multi-level array substrate row driving units. The n-th level array substrate row driving unit includes a clock signal input, a (n−1)-th level signal input, a (n+1)-th level signal input, a (n+3)-th level signal input, a first low level input, a second low level input, and a signal output. The n-th level array substrate row driving unit further includes a pull-up driving unit, a pull-up unit, a first pull-down unit, and a second pull-down unit. The three-level-driven array substrate row driving circuit contributes to reduce the manufacturing cost of the liquid crystal panel and the narrow border design. By adopting the three-level-driven method, the impact caused by the feed-through voltage, which is generated by the data line and the gate line, toward the TFT LCD is effectively eliminated such that the display performance is enhanced.
摘要翻译：三电平驱动的阵列衬底行驱动电路包括级联的多级阵列衬底行驱动单元。第n级阵列衬底行驱动单元包括时钟信号输入，第（n-1）电平信号输入，第（n + 1）电平信号输入，第（n + 3）电平信号输入，第一低电平输入，第二低电平输入和信号输出。第n级阵列基板行驱动单元还包括上拉驱动单元，上拉单元，第一下拉单元和第二下拉单元。三电平驱动的阵列基板行驱动电路有助于降低液晶面板的制造成本和窄边框设计。通过采用三电平驱动方法，有效地消除了由数据线和栅极线产生的馈通电压对TFT LCD的影响，从而提高了显示性能。

10. 发明申请

US20150214158A1 GATE METAL STRUCTURE AND FORMING METHID OF THE SAME 有权
标题翻译：门金属结构及其形成甲基
公开(公告)号：US20150214158A1
公开(公告)日：2015-07-30
申请号：US14239353
申请日：2014-01-06
申请人： Xiangyang Xu
发明人： Xiangyang Xu
IPC分类号： H01L23/532 , H01L21/02 , H01L21/285 , H01L29/49 , H01L21/768
CPC分类号： H01L23/53238 , G02F2001/136295 , H01L21/0214 , H01L21/02164 , H01L21/28008 , H01L21/28556 , H01L21/28568 , H01L21/76841 , H01L29/4908 , H01L2924/0002 , H01L2924/00
摘要： A gate metal structure and a forming method of the same are provided. The gate metal structure includes: a substrate and a copper metal layer; and a barrier layer disposed between the substrate and the copper metal layer, the barrier layer being formed of silicon oxynitride SiON or silicon oxide SiOx. By disposing a SiON or SiOx barrier layer between the substrate and the copper metal layer, conductivity and adhesion can be enhanced while reducing diffusion of copper when copper is used as the conductive metal layer material.
摘要翻译：提供栅极金属结构及其形成方法。栅极金属结构包括：基板和铜金属层; 以及设置在所述基板和所述铜金属层之间的阻挡层，所述阻挡层由氮氧化硅SiON或氧化硅SiO x形成。通过在衬底和铜金属层之间设置SiON或SiO x阻挡层，当铜用作导电金属层材料时，可以减少导电性和粘合性，同时减少铜的扩散。

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