专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20130214820A1 APPARATUS AND METHOD TO TOLERATE FLOATING INPUT PIN FOR INPUT BUFFER 有权
标题翻译：用于输入输入缓冲器的浮动输入引脚的装置和方法
公开(公告)号：US20130214820A1
公开(公告)日：2013-08-22
申请号：US13845576
申请日：2013-03-18
申请人： Chun-Hsiung Hung , Kuen-Long Chang , Nai-Ping Kuo , Ming-Chih Hsieh
发明人： Chun-Hsiung Hung , Kuen-Long Chang , Nai-Ping Kuo , Ming-Chih Hsieh
IPC分类号： H03K3/00
CPC分类号： H03K3/00 , H03K19/0002 , H03K19/09425
摘要： An integrated circuit device includes a pad adapted to receive a signal from an internal or external driver, and an input buffer circuit including an input terminal coupled to the pad. The input buffer circuit includes a pass transistor having a control terminal, a first conduction terminal connected to the pad, and a second conduction terminal connected to a first voltage. The input buffer circuit also includes a latch having a terminal electrically coupled to the control terminal of the pass transistor. The input buffer circuit further includes circuitry coupled to the latch, the circuitry including a feedback transistor having a control terminal electrically coupled to the pad, a first conduction terminal electrically coupled to a second voltage, and a second conduction terminal coupled to the latch.
摘要翻译：集成电路装置包括适于从内部或外部驱动器接收信号的焊盘以及包括耦合到焊盘的输入端的输入缓冲电路。输入缓冲器电路包括具有控制端子的传输晶体管，连接到焊盘的第一导电端子和连接到第一电压的第二导电端子。输入缓冲电路还包括具有电耦合到传输晶体管的控制端的端子的锁存器。所述输入缓冲器电路还包括耦合到所述锁存器的电路，所述电路包括反馈晶体管，所述反馈晶体管具有电耦合到所述焊盘的控制端子，电耦合到第二电压的第一导电端子以及耦合到所述锁存器的第二导电端子。

2. 发明授权

US09092649B2 Data protecting method capable of effectively recording protection information and memory using thereof 有权
标题翻译：数据保护方法能够有效地记录保护信息和使用其的存储器
公开(公告)号：US09092649B2
公开(公告)日：2015-07-28
申请号：US12395776
申请日：2009-03-02
申请人： Kuen-Long Chang , Nai-Ping Kuo , Ming-Chih Hsieh
发明人： Kuen-Long Chang , Nai-Ping Kuo , Ming-Chih Hsieh
IPC分类号： G06F13/00 , G06F21/79 , G06F12/06 , G06F12/02 , G06F3/06 , G06F13/42
CPC分类号： G06F21/79 , G06F3/062 , G06F3/0646 , G06F3/0668 , G06F3/0688 , G06F12/0238 , G06F12/0623 , G06F13/4234
摘要： A data protecting method for a memory, which comprising a volatile memory and a non-volatile memory for storing data and data protection information, comprises the following steps. Firstly, load the data protection information to the volatile memory from the non-volatile memory. Next, protect the data stored in the memory according to the data protection information stored in the volatile memory.
摘要翻译：一种用于存储器的数据保护方法，包括易失性存储器和用于存储数据和数据保护信息的非易失性存储器，包括以下步骤。首先，将数据保护信息从非易失性存储器加载到易失性存储器。接下来，根据存储在易失性存储器中的数据保护信息保护存储在存储器中的数据。

3. 发明授权

US08687438B2 Method and apparatus of changing device identification codes of a memory integrated circuit device 有权
标题翻译：改变存储器集成电路器件的器件识别码的方法和装置
公开(公告)号：US08687438B2
公开(公告)日：2014-04-01
申请号：US13052343
申请日：2011-03-21
申请人： Nai-Ping Kuo , Kuen-Long Chang , Ken-Hui Chen , Ming-Chih Hsieh
发明人： Nai-Ping Kuo , Kuen-Long Chang , Ken-Hui Chen , Ming-Chih Hsieh
IPC分类号： G11C7/00 , G11C7/22
CPC分类号： G11C7/00 , G11C7/10 , G11C7/20
摘要： In the disclosed technology, the device identification code of a memory integrated circuit is changeable. In some cases, multiple device identification codes are stored on the memory integrated circuit, and multiple device identification code selection data are stored on the memory integrated circuit. A device identification code register can store a selected device identification code.
摘要翻译：在所公开的技术中，存储器集成电路的器件识别码是可变的。在一些情况下，多个设备识别码存储在存储器集成电路上，并且多个设备识别码选择数据被存储在存储器集成电路上。设备识别码寄存器可以存储所选择的设备标识码。

4. 发明申请

US20120243348A1 Method and Apparatus of Changing Device Identification Codes of a Memory Integrated Circuit Device 有权
标题翻译：更改存储器集成电路器件的器件识别代码的方法和装置
公开(公告)号：US20120243348A1
公开(公告)日：2012-09-27
申请号：US13052343
申请日：2011-03-21
申请人： Nai-Ping Kuo , Kuen-Long Chang , Ken-Hui Chen , Ming-Chih Hsieh
发明人： Nai-Ping Kuo , Kuen-Long Chang , Ken-Hui Chen , Ming-Chih Hsieh
IPC分类号： G11C7/00 , H01L21/8239
CPC分类号： G11C7/00 , G11C7/10 , G11C7/20
摘要： In the disclosed technology, the device identification code of a memory integrated circuit is changeable. In some cases, multiple device identification codes are stored on the memory integrated circuit, and multiple device identification code selection data are stored on the memory integrated circuit.
摘要翻译：在所公开的技术中，存储器集成电路的器件识别码是可变的。在一些情况下，多个设备识别码存储在存储器集成电路上，并且多个设备识别码选择数据被存储在存储器集成电路上。

5. 发明申请

US20100223439A1 DATA PROTECTING METHOD AND MEMORY USING THEREOF 有权
标题翻译：数据保护方法及其使用的存储器
公开(公告)号：US20100223439A1
公开(公告)日：2010-09-02
申请号：US12395776
申请日：2009-03-02
申请人： Kuen-Long Chang , Nai-Ping Kuo , Ming-Chih Hsieh
发明人： Kuen-Long Chang , Nai-Ping Kuo , Ming-Chih Hsieh
IPC分类号： G06F12/14 , G06F12/00
CPC分类号： G06F21/79 , G06F3/062 , G06F3/0646 , G06F3/0668 , G06F3/0688 , G06F12/0238 , G06F12/0623 , G06F13/4234
摘要： A data protecting method for a memory, which comprising a volatile memory and a non-volatile memory for storing data and data protection information, comprises the following steps. Firstly, load the data protection information to the volatile memory from the non-volatile memory. Next, protect the data stored in the memory according to the data protection information stored in the volatile memory.
摘要翻译：一种用于存储器的数据保护方法，包括易失性存储器和用于存储数据和数据保护信息的非易失性存储器，包括以下步骤。首先，将数据保护信息从非易失性存储器加载到易失性存储器。接下来，根据存储在易失性存储器中的数据保护信息保护存储在存储器中的数据。

6. 发明申请

US20090225607A1 APPARATUS AND METHOD FOR DETECTING WORD LINE LEAKAGE IN MEMORY DEVICES 有权
标题翻译：用于检测存储器件中的字线泄漏的装置和方法
公开(公告)号：US20090225607A1
公开(公告)日：2009-09-10
申请号：US12421523
申请日：2009-04-09
申请人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
发明人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
IPC分类号： G11C7/00 , G11C5/14
CPC分类号： G11C29/02 , G11C8/08 , G11C29/025 , G11C2029/1202 , G11C2029/5006
摘要： Some embodiments of the present invention provide a memory device including a first memory array having a first word line and a comparator circuit having a first terminal coupled to a reference voltage and a second terminal coupled to a first switch selectively coupling the first word line to a power source or the second terminal. In an embodiment, the reference voltage is selected for identifying a leakage condition associated with the first word line. In another embodiment, the first switch is configured to couple the first word line to the power source for a first predetermined period of time to allow charging of the first word line. In another embodiment, the first switch is configured to couple the first word line to the second terminal of the comparator for at least a second predetermined period of time.
摘要翻译：本发明的一些实施例提供了一种存储器件，其包括具有第一字线的第一存储器阵列和具有耦合到参考电压的第一端子的比较器电路，以及耦合到选择性地将第一字线耦合到第一字线的第一开关的第二端子电源或第二终端。在一个实施例中，选择参考电压以识别与第一字线相关联的泄漏状况。在另一个实施例中，第一开关被配置为将第一字线耦合到电源第一预定时间段以允许对第一字线充电。在另一个实施例中，第一开关被配置为将第一字线耦合到比较器的第二端子至少第二预定时间段。

7. 发明授权

US07835178B2 Apparatus and method for detecting word line leakage in memory devices 有权
标题翻译：用于检测存储器件中的字线泄漏的装置和方法
公开(公告)号：US07835178B2
公开(公告)日：2010-11-16
申请号：US12421523
申请日：2009-04-09
申请人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
发明人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
IPC分类号： G11C16/04
CPC分类号： G11C29/02 , G11C8/08 , G11C29/025 , G11C2029/1202 , G11C2029/5006
摘要： Some embodiments of the present invention provide a memory device including a first memory array having a first word line and a comparator circuit having a first terminal coupled to a reference voltage and a second terminal coupled to a first switch selectively coupling the first word line to a power source or the second terminal. In an embodiment, the reference voltage is selected for identifying a leakage condition associated with the first word line. In another embodiment, the first switch is configured to couple the first word line to the power source for a first predetermined period of time to allow charging of the first word line. In another embodiment, the first switch is configured to couple the first word line to the second terminal of the comparator for at least a second predetermined period of time.
摘要翻译：本发明的一些实施例提供了一种存储器件，其包括具有第一字线的第一存储器阵列和具有耦合到参考电压的第一端子的比较器电路，以及耦合到选择性地将第一字线耦合到第一字线的第一开关的第二端子电源或第二终端。在一个实施例中，选择参考电压以识别与第一字线相关联的泄漏状况。在另一个实施例中，第一开关被配置为将第一字线耦合到电源第一预定时间段以允许对第一字线充电。在另一个实施例中，第一开关被配置为将第一字线耦合到比较器的第二端子至少第二预定时间段。

8. 发明授权

US08018772B2 Apparatus and method for detecting word line leakage in memory devices 有权
标题翻译：用于检测存储器件中的字线泄漏的装置和方法
公开(公告)号：US08018772B2
公开(公告)日：2011-09-13
申请号：US12899439
申请日：2010-10-06
申请人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
发明人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
IPC分类号： G11C11/34
CPC分类号： G11C29/02 , G11C8/08 , G11C29/025 , G11C2029/1202 , G11C2029/5006
摘要： According to an embodiment of the present invention, a method for detecting word line leakage in a memory device includes coupling a first word line in the memory device to a voltage source while coupling a second word line in the memory device to a ground level voltage. Next, the first word line is decoupled from the voltage source. The method also includes comparing a current of the first word line with a predetermined reference current for determining a leakage condition of the word line.
摘要翻译：根据本发明的实施例，一种用于检测存储器件中的字线泄漏的方法包括将存储器件中的第一字线耦合到电压源，同时将存储器件中的第二字线耦合到地电平电压。接下来，第一个字线与电压源去耦。该方法还包括将第一字线的电流与用于确定字线的泄漏状况的预定参考电流进行比较。

9. 发明申请

US20090063918A1 APPARATUS AND METHOD FOR DETECTING WORD LINE LEAKAGE IN MEMORY DEVICES 有权
标题翻译：用于检测存储器件中的字线泄漏的装置和方法
公开(公告)号：US20090063918A1
公开(公告)日：2009-03-05
申请号：US11845690
申请日：2007-08-27
申请人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
发明人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
IPC分类号： G11C29/08
CPC分类号： G11C29/02 , G11C8/08 , G11C29/025 , G11C2029/1202 , G11C2029/5006
摘要： A method for detecting word line leakage in a memory device includes coupling a first plurality of word lines in the memory device to a voltage source while grounding a second plurality of word lines. Each of the second plurality of word lines is adjacent to a corresponding one of the first plurality of word lines. The method includes waiting for a period of time to allow the word lines to reach a predetermined read voltage level. The method also includes decoupling the first plurality of word lines from the voltage source and waiting for a second predetermined period of time to allow the first plurality of word lines to discharge. The method further includes sensing a current associated with the word lines, and comparing the current with a predetermined reference current which is selected for identifying a word line leakage condition associated with the first plurality of word lines.
摘要翻译：一种用于检测存储器件中的字线泄漏的方法，包括：将所述存储器件中的第一多个字线耦合到电压源，同时接地第二多个字线。第二多个字线中的每一个与第一多个字线中的相应一个字线相邻。该方法包括等待一段时间以允许字线达到预定的读取电压电平。该方法还包括将第一多个字线与电压源去耦，并等待第二预定时间段以允许第一个多个字线放电。该方法还包括感测与字线相关联的电流，以及将电流与为了识别与第一多个字线相关联的字线泄漏状况而被选择的预定参考电流进行比较。

10. 发明申请

US20110019487A1 APPARATUS AND METHOD FOR DETECTING WORD LINE LEAKAGE IN MEMORY DEVICES 有权
标题翻译：用于检测存储器件中的字线泄漏的装置和方法
公开(公告)号：US20110019487A1
公开(公告)日：2011-01-27
申请号：US12899439
申请日：2010-10-06
申请人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
发明人： Han-Sung Chen , Su-Chueh Lo , Chun-Hsiung Hung , Nai-Ping Kuo , Ming-Chih Hsieh , Wen-Pin Tsai
IPC分类号： G11C7/00
CPC分类号： G11C29/02 , G11C8/08 , G11C29/025 , G11C2029/1202 , G11C2029/5006
摘要： According to an embodiment of the present invention, a method for detecting word line leakage in a memory device includes coupling a first word line in the memory device to a voltage source while coupling a second word line in the memory device to a ground level voltage. Next, the first word line is decoupled from the voltage source. The method also includes comparing a current of the first word line with a predetermined reference current for determining a leakage condition of the word line.
摘要翻译：根据本发明的实施例，一种用于检测存储器件中的字线泄漏的方法包括将存储器件中的第一字线耦合到电压源，同时将存储器件中的第二字线耦合到地电平电压。接下来，第一个字线与电压源去耦。该方法还包括将第一字线的电流与用于确定字线的泄漏状况的预定参考电流进行比较。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式