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1. 发明申请

US20050104647A1 Level shifter circuit and method for controlling voltage levels of clock signal and inverted clock signal for driving gate lines of amorphous silicon gate-thin film transistor liquid crystal display 有权
标题翻译：用于控制非晶硅栅极薄膜晶体管液晶显示器驱动栅极线的时钟信号和反相时钟信号电压电平的电平移位电路及方法
公开(公告)号：US20050104647A1
公开(公告)日：2005-05-19
申请号：US10987430
申请日：2004-11-12
申请人： Chul Choi , Jae-Goo Lee , Byung-Hun Han
发明人： Chul Choi , Jae-Goo Lee , Byung-Hun Han
IPC分类号： G09G3/36 , G02F1/133 , G06F1/04 , G09G3/20 , H03K17/687 , H03K19/0175 , H03K19/0185 , H04N5/66
CPC分类号： G06F1/04
摘要： Provided are a level shifter circuit and a corresponding method for controlling voltage levels of a clock signal and an inverted clock signal for driving gate lines of a ASG thin film transistor liquid crystal display panel, where the level shifter circuit includes first and second level shifters, the first level shifter controls the voltage level of the clock signal to swing between a negative external voltage level and a positive external voltage level in response to a clock activating signal, and increases the voltage level of the clock signal from the negative external voltage level to a power supply voltage level or decreases it from the positive external voltage level to a ground voltage level while a pre-charge clock activating signal is activated, the second level shifter controls the voltage level of the inverted clock signal to swing between the negative external voltage level and the positive external voltage level in response to an inverted clock activating signal, and increases the voltage level of the inverted clock signal from the negative external voltage level to the power supply voltage level or decreases it from the positive external voltage level to the ground voltage level while an inverted pre-charge clock activating signal is activated, and the level shifter circuit increases or decreases the voltage levels of the clock signal and inverted clock signal using a battery voltage or a ground voltage, thereby reducing current consumption caused by the increase or decrease in the voltage level.
摘要翻译：提供了一种用于控制用于驱动ASG薄膜晶体管液晶显示面板的栅极线的时钟信号和反相时钟信号的电压电平的电平移位器电路和相应方法，其中电平移位器电路包括第一和第二电平移位器，第一电平移位器响应于时钟激活信号控制时钟信号的电压电平在负的外部电压电平和正的外部电压电平之间摆动，并且将时钟信号的电压电平从负的外部电压电平提高到电源电压电平或者从正的外部电压电平降低到接地电压电平，同时预充电时钟激活信号被激活，第二电平移位器控制反相时钟信号的电压电平在负外部电压之间摆动电平和正的外部电压电平响应于反相时钟激活信号，并且包括将反相时钟信号的电压电平从负外部电压电平降低到电源电压电平，或将其从正外部电压电平降低到接地电压电平，同时反相的预充电时钟激活信号被激活，并且电平移位器电路使用电池电压或接地电压来增加或减少时钟信号和反相时钟信号的电压电平，由此降低由电压电平的增加或减少引起的电流消耗。

2. 发明授权

US07466312B2 Level shifter circuit and method for controlling voltage levels of clock signal and inverted clock signal for driving gate lines of amorphous silicon gate-thin film transistor liquid crystal display 有权
标题翻译：用于控制非晶硅栅极薄膜晶体管液晶显示器驱动栅极线的时钟信号和反相时钟信号电压电平的电平移位电路及方法
公开(公告)号：US07466312B2
公开(公告)日：2008-12-16
申请号：US10987430
申请日：2004-11-12
申请人： Chul Choi , Jae-Goo Lee , Byung-Hun Han
发明人： Chul Choi , Jae-Goo Lee , Byung-Hun Han
IPC分类号： G09G3/36 , G09G3/38
CPC分类号： G06F1/04
摘要： Provided are a level shifter circuit and a corresponding method for controlling voltage levels of a clock signal and an inverted clock signal for driving gate lines of a ASG thin film transistor liquid crystal display panel, where the level shifter circuit includes first and second level shifters, the first level shifter controls the voltage level of the clock signal to swing between a negative external voltage level and a positive external voltage level in response to a clock activating signal, and increases the voltage level of the clock signal from the negative external voltage level to a power supply voltage level or decreases it from the positive external voltage level to a ground voltage level while a pre-charge clock activating signal is activated, the second level shifter controls the voltage level of the inverted clock signal to swing between the negative external voltage level and the positive external voltage level in response to an inverted clock activating signal, and increases the voltage level of the inverted clock signal from the negative external voltage level to the power supply voltage level or decreases it from the positive external voltage level to the ground voltage level while an inverted pre-charge clock activating signal is activated, and the level shifter circuit increases or decreases the voltage levels of the clock signal and inverted clock signal using a battery voltage or a ground voltage, thereby reducing current consumption caused by the increase or decrease in the voltage level.
摘要翻译：提供了一种用于控制用于驱动ASG薄膜晶体管液晶显示面板的栅极线的时钟信号和反相时钟信号的电压电平的电平移位器电路和相应方法，其中电平移位器电路包括第一和第二电平移位器，第一电平移位器响应于时钟激活信号控制时钟信号的电压电平在负的外部电压电平和正的外部电压电平之间摆动，并且将时钟信号的电压电平从负的外部电压电平提高到电源电压电平或者从正的外部电压电平降低到接地电压电平，同时预充电时钟激活信号被激活，第二电平移位器控制反相时钟信号的电压电平在负外部电压之间摆动电平和正的外部电压电平响应于反相时钟激活信号，并且包括将反相时钟信号的电压电平从负外部电压电平降低到电源电压电平，或将其从正外部电压电平降低到接地电压电平，同时反相的预充电时钟激活信号被激活，并且电平移位器电路使用电池电压或接地电压来增加或减少时钟信号和反相时钟信号的电压电平，由此降低由电压电平的增加或减少引起的电流消耗。

3. 发明授权

US07230471B2 Charge pump circuit of LCD driver including driver having variable current driving capability 失效
标题翻译： LCD驱动器的电荷泵电路，包括具有可变电流驱动能力的驱动器
公开(公告)号：US07230471B2
公开(公告)日：2007-06-12
申请号：US11121540
申请日：2005-05-04
申请人： Chul Choi , Jae-Hyuck Woo , Jae-Goo Lee
发明人： Chul Choi , Jae-Hyuck Woo , Jae-Goo Lee
IPC分类号： G05F1/10
CPC分类号： G09G3/3696 , G09G2340/0428 , H02M3/07
摘要： A charge pump circuit of a liquid crystal display driver integrated circuit (LDI) is provided, which can reduce unnecessary current consumption when a load of an output node varies is provided, where, in a gradient mode of a display-on mode, in which an output node of the charge pump circuit has a maximum load, the current driving capability of a driver in the charge pump circuit is increased, and where, in a binary mode, in which the output node of the charge pump circuit has a smaller load than in the gradient mode, the current driving capability of the driver is lower, to prevent unnecessary current consumption caused by too large driving transfer transistors in the driver and to maintain boost efficiency at a proper level.
摘要翻译：提供了一种液晶显示驱动器集成电路（LDI）的电荷泵电路，其可以在输出节点的负载变化时减少不必要的电流消耗，其中，在显示模式的梯度模式中，其中电荷泵电路的输出节点具有最大负载，电荷泵电路中的驱动器的电流驱动能力增加，并且在二进制模式中，电荷泵电路的输出节点具有较小的负载与梯度模式相比，驱动器的电流驱动能力较低，以防止由驱动器中的过大的驱动转换晶体管引起的不必要的电流消耗，并将升压效率保持在适当的水平。

4. 发明申请

US20050248388A1 Charge pump circuit of LCD driver including driver having variable current driving capability 失效
标题翻译： LCD驱动器的电荷泵电路，包括具有可变电流驱动能力的驱动器
公开(公告)号：US20050248388A1
公开(公告)日：2005-11-10
申请号：US11121540
申请日：2005-05-04
申请人： Chul Choi , Jae-Hyuck Woo , Jae-Goo Lee
发明人： Chul Choi , Jae-Hyuck Woo , Jae-Goo Lee
IPC分类号： G09G3/36 , H02M1/00
CPC分类号： G09G3/3696 , G09G2340/0428 , H02M3/07
摘要： A charge pump circuit of a liquid crystal display driver integrated circuit (LDI) is provided, which can reduce unnecessary current consumption when a load of an output node varies is provided, where, in a gradient mode of a display-on mode, in which an output node of the charge pump circuit has a maximum load, the current driving capability of a driver in the charge pump circuit is increased, and where, in a binary mode, in which the output node of the charge pump circuit has a smaller load than in the gradient mode, the current driving capability of the driver is lower, to prevent unnecessary current consumption caused by too large driving transfer transistors in the driver and to maintain boost efficiency at a proper level.
摘要翻译：提供了一种液晶显示驱动器集成电路（LDI）的电荷泵电路，其可以在输出节点的负载变化时减少不必要的电流消耗，其中，在显示模式的梯度模式中，其中电荷泵电路的输出节点具有最大负载，电荷泵电路中的驱动器的电流驱动能力增加，并且在二进制模式中，电荷泵电路的输出节点具有较小的负载与梯度模式相比，驱动器的电流驱动能力较低，以防止由驱动器中的过大的驱动转换晶体管引起的不必要的电流消耗，并将升压效率保持在适当的水平。

5. 发明授权

US08525765B2 Display driver circuit and display device that outputs symmetrical grayscale voltages 失效
标题翻译：显示输出对称灰度电压的驱动电路和显示装置
公开(公告)号：US08525765B2
公开(公告)日：2013-09-03
申请号：US12766508
申请日：2010-04-23
申请人： In-Suk Kim , Jae-Goo Lee
发明人： In-Suk Kim , Jae-Goo Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/2007 , G09G3/3696 , G09G2320/0252 , G09G2320/0276 , G09G2330/021
摘要： A display driver circuit and a display device are provided. The display driver circuit may have positive and negative resistor strings that are symmetrically formed and include a plurality of resistors, and applies a gamma voltage to one of the positive and negative resistor strings in response to a polarity selection signal, thereby generating and outputting a positive grayscale voltage and a negative grayscale voltage.
摘要翻译：提供显示驱动电路和显示装置。显示驱动器电路可以具有对称地形成并且包括多个电阻器的正和负电阻器串，并且响应于极性选择信号，向正电阻器串和负电阻器串中的一个施加伽马电压，从而产生并输出正灰度电压和负灰度电压。

6. 发明授权

US08405119B2 Organic light emitting diode lighting apparatus 有权
标题翻译：有机发光二极管照明装置
公开(公告)号：US08405119B2
公开(公告)日：2013-03-26
申请号：US13272043
申请日：2011-10-12
申请人： Young-Mo Koo , Ok-Keun Song , Hyuk-Sang Jun , Yong-Han Lee , Jae-Goo Lee
发明人： Young-Mo Koo , Ok-Keun Song , Hyuk-Sang Jun , Yong-Han Lee , Jae-Goo Lee
IPC分类号： H01L33/00
CPC分类号： H01L51/529 , H01L51/524
摘要： An organic light emitting diode (OLED) lighting apparatus is disclosed. In one embodiment, the apparatus includes i) a substrate main body including a light emitting area and a sealing area surrounding the light emitting area, ii) an OLED disposed on the light emitting area of the substrate main body, iii) a sealant disposed on the sealing area of the substrate main body and iv) an encapsulation substrate encapsulating the OLED, wherein the encapsulation substrate comprises first and second surfaces opposing each other. The apparatus may further include a heat dissipating wire configured to dissipate heat generated by the OLED. The heat dissipating wire includes a heat absorption portion disposed on the first surface of the encapsulation substrate and contacting the sealant, a heat dissipating portion disposed on the second surface, and a coupling portion interconnecting the absorption portion and the heat dissipating portion.
摘要翻译：公开了一种有机发光二极管（OLED）照明装置。在一个实施例中，该设备包括：i）包括发光区域和围绕发光区域的密封区域的衬底主体，ii）设置在衬底主体的发光区域上的OLED，iii）所述衬底主体的密封区域和iv）封装所述OLED的封装衬底，其中所述封装衬底包括彼此相对的第一和第二表面。该装置还可以包括散热线，该散热线被配置成散发由OLED产生的热量。散热线包括设置在封装基板的第一表面上并接触密封剂的热吸收部分，设置在第二表面上的散热部分和将吸收部分和散热部分互连的耦合部分。

7. 发明申请

US20120261710A1 ORGANIC LIGHT EMITTING DIODE LIGHTING APPARATUS 有权
标题翻译：有机发光二极管照明设备
公开(公告)号：US20120261710A1
公开(公告)日：2012-10-18
申请号：US13429783
申请日：2012-03-26
申请人： Jae-Goo Lee , Doo-Hwan Kim , Min-Woo Lee , Sung-Jin Choi , Young-Mo Koo
发明人： Jae-Goo Lee , Doo-Hwan Kim , Min-Woo Lee , Sung-Jin Choi , Young-Mo Koo
IPC分类号： H01L33/48
CPC分类号： H01L51/5237 , H01L51/5203 , H01L51/524 , H01L2251/5361
摘要： An organic light emitting diode (OLED) lighting apparatus includes a light emitting panel including an organic light emitting diode, a housing for housing the light emitting panel, a cover coupled to the housing and covering a front-side edge of the light emitting panel, a plurality of pins disposed between the housing and the light emitting panel and supporting an edge of the light emitting panel, and at least one contact bar disposed between the plurality of pins and a back-side edge of the light emitting panel.
摘要翻译：有机发光二极管（OLED）照明装置包括：发光面板，其包括有机发光二极管，用于容纳发光面板的壳体;联接到壳体并覆盖发光面板的前侧边缘的盖; 设置在所述壳体和所述发光面板之间并支撑所述发光面板的边缘的多个销以及设置在所述多个销之间的至少一个接触杆和所述发光面板的后侧边缘。

8. 发明申请

US20120072773A1 Panel Driving Circuit That Generates Panel Test Pattern and Panel Test Method Thereof 有权
标题翻译：生成面板测试图案和面板测试方法的面板驱动电路
公开(公告)号：US20120072773A1
公开(公告)日：2012-03-22
申请号：US13290790
申请日：2011-11-07
申请人： Won Sik Kang , Jae-Goo Lee
发明人： Won Sik Kang , Jae-Goo Lee
IPC分类号： G06F11/263
CPC分类号： G01R31/318378 , G09G3/006 , G09G3/3611 , G09G3/3648 , G09G5/006 , G09G2330/02 , G09G2340/125 , H04N5/06 , H04N17/04
摘要： A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.
摘要翻译：提供了产生面板测试图案的面板驱动电路和测试面板的方法。驱动电路包括图案生成单元和选择单元。图案生成单元响应系统时钟并产生模式测试数据和模式测试信号。选择单元响应于测试信号，并且选择并输出（a）从模式生成单元输出的模式测试数据和模式测试信号，或者（b）直接应用的模式测试数据和模式测试信号从外部。驱动电路和面板测试方法使用系统时钟产生驱动电路内的面板测试数据，水平同步信号，垂直同步信号和数据激活信号，从而可以执行面板的测试而不使用单独的测试设备。

9. 发明授权

US07825919B2 Source voltage removal detection circuit and display device including the same 有权
标题翻译：源电压去除检测电路和显示装置包括相同
公开(公告)号：US07825919B2
公开(公告)日：2010-11-02
申请号：US11120194
申请日：2005-05-03
申请人： Jae-Hyuck Woo , Jae-Goo Lee
发明人： Jae-Hyuck Woo , Jae-Goo Lee
IPC分类号： G06F3/038 , G09G5/00
CPC分类号： G09G3/3648 , G09G2310/0245 , G09G2310/063 , G09G2320/0257 , G09G2330/027
摘要： A control signal for removal of an afterimage from an active matrix display device is generated after the removal or disconnect of power from the device. A detector circuit receives a first voltage from a first voltage source and a second voltage from a second voltage source, and outputs a detection signal when either one of the first and second voltages drops to a given voltage level. An output circuit which receives the detection signal and outputs the control signal for removal of the afterimage from the active matrix display device.
摘要翻译：在从设备移除或断开电源之后，产生用于从有源矩阵显示设备移除残像的控制信号。检测器电路从第一电压源接收第一电压和从第二电压源接收第二电压，并且当第一和第二电压中的任一个下降到给定的电压电平时，输出检测信号。输出电路，其接收检测信号并输出用于去除有源矩阵显示装置的残像的控制信号。

10. 发明授权

US07627799B2 Panel driving circuit that generates panel test pattern and panel test method thereof 有权
标题翻译：生成面板测试图案的面板驱动电路及其面板测试方法
公开(公告)号：US07627799B2
公开(公告)日：2009-12-01
申请号：US11046178
申请日：2005-01-28
申请人： Won-Sik Kang , Jae-Goo Lee
发明人： Won-Sik Kang , Jae-Goo Lee
IPC分类号： G01R31/28
CPC分类号： G01R31/318378 , G09G3/006 , G09G3/3611 , G09G3/3648 , G09G5/006 , G09G2330/02 , G09G2340/125 , H04N5/06 , H04N17/04
摘要： A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.
摘要翻译：提供了产生面板测试图案的面板驱动电路和测试面板的方法。驱动电路包括图案生成单元和选择单元。图案生成单元响应系统时钟并产生模式测试数据和模式测试信号。选择单元响应于测试信号，并且选择并输出（a）从模式生成单元输出的模式测试数据和模式测试信号，或者（b）直接应用的模式测试数据和模式测试信号从外部。驱动电路和面板测试方法使用系统时钟产生驱动电路内的面板测试数据，水平同步信号，垂直同步信号和数据激活信号，从而可以执行面板的测试而不使用单独的测试设备。

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