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1. 发明授权

US07388420B2 Rewriteable electronic fuses 有权
标题翻译：可重写电子保险丝
公开(公告)号：US07388420B2
公开(公告)日：2008-06-17
申请号：US10814866
申请日：2004-03-30
申请人： Christopher J. Diorio , Frédéric J. Bernard , Todd E. Humes , Alberto Pesavento
发明人： Christopher J. Diorio , Frédéric J. Bernard , Todd E. Humes , Alberto Pesavento
IPC分类号： H01H37/76
CPC分类号： G11C16/0441 , G11C7/20 , G11C14/00 , G11C16/045
摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.
摘要翻译：可重写电子熔丝包括耦合到一个或多个非易失性存储元件的锁存器和/或逻辑门。非易失性存储器元件被配置为被编程为能够使相关联的电子电路稳定到预定状态的存储器值，因为上电或复位信号被施加到保险丝。虽然不是必需的，但是在可重写电子熔丝中使用的非易失性存储元件可以包括浮栅晶体管。存储在给定浮栅晶体管的浮置栅极上的电荷量确定存储器值，并且因此确定保险丝上电或复位时保险丝熔断的状态。

2. 发明授权

US07242614B2 Rewriteable electronic fuses 有权
公开(公告)号：US07242614B2
公开(公告)日：2007-07-10
申请号：US10813907
申请日：2004-03-30
申请人： Christopher J. Diorio , Frédéric J. Bernard , Todd E. Humes , Alberto Pesavento
发明人： Christopher J. Diorio , Frédéric J. Bernard , Todd E. Humes , Alberto Pesavento
IPC分类号： G11C11/34 , G11C17/18
CPC分类号： G11C16/0441 , G11C14/00 , G11C16/045 , H01L27/105 , H01L27/115 , H01L29/7883 , H03K3/02335
摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.

3. 发明授权

US07177182B2 Rewriteable electronic fuses 有权
标题翻译：可重写电子保险丝
公开(公告)号：US07177182B2
公开(公告)日：2007-02-13
申请号：US10814868
申请日：2004-03-30
申请人： Christopher J. Diorio , Frédéric J. Bernard , Todd E. Humes , Alberto Pesavento
发明人： Christopher J. Diorio , Frédéric J. Bernard , Todd E. Humes , Alberto Pesavento
IPC分类号： G11C16/04 , G11C17/18
CPC分类号： G11C16/0441 , G11C16/045 , G11C16/10
摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.
摘要翻译：可重写电子熔丝包括耦合到一个或多个非易失性存储元件的锁存器和/或逻辑门。非易失性存储器元件被配置为被编程为能够使相关联的电子电路稳定到预定状态的存储器值，因为上电或复位信号被施加到保险丝。虽然不是必需的，但是在可重写电子熔丝中使用的非易失性存储元件可以包括浮栅晶体管。存储在给定浮栅晶体管的浮置栅极上的电荷量确定存储器值，并且因此确定保险丝上电或复位时保险丝熔断的状态。

4. 发明授权

US07667589B2 RFID tag uncoupling one of its antenna ports and methods 有权
标题翻译： RFID标签解耦其天线端口之一和方法
公开(公告)号：US07667589B2
公开(公告)日：2010-02-23
申请号：US10891894
申请日：2004-07-14
申请人： Dimitri C. Desmons , Ronald A. Oliver , Christopher J. Diorio , Todd E. Humes
发明人： Dimitri C. Desmons , Ronald A. Oliver , Christopher J. Diorio , Todd E. Humes
IPC分类号： G08B19/00
CPC分类号： G06K19/07767 , G06K19/07749
摘要： RFID tags have an on-chip antenna and an off-chip antenna. One of the antennas can become uncoupled if the proper signal is received, while the other antenna may still operate. The uncoupled antenna can be the larger one, for example the off-chip antenna. Then the tag can then be read only by the smaller antenna, which effectively reduces the range of the RFID tag, but without disabling it entirely.
摘要翻译： RFID标签具有片上天线和片外天线。如果接收到适当的信号，其中一个天线可能会脱耦，而另一个天线仍然可以工作。非耦合天线可以是较大的天线，例如片外天线。那么标签然后可以被较小的天线读取，这有效地减少了RFID标签的范围，但是没有完全禁用它。

5. 发明授权

US07245213B1 RFID readers and RFID tags exchanging encrypted password 有权
标题翻译： RFID阅读器和RFID标签交换加密密码
公开(公告)号：US07245213B1
公开(公告)日：2007-07-17
申请号：US11033028
申请日：2005-01-10
申请人： Aanand Esterberg , Christopher J. Diorio , Todd E. Humes
发明人： Aanand Esterberg , Christopher J. Diorio , Todd E. Humes
IPC分类号： G08B1/08 , G08B13/14 , H04Q5/22
CPC分类号： H04L63/0428 , H04L63/0492 , H04L63/083
摘要： RFID system components, such as readers and tags, communicate where at least a portion of data or a password is transmitted in encrypted form. The reader transmits a command, along with data or a password encrypted using an encryption kernel. In some instances, the tag itself has sent the kernel.
摘要翻译：诸如读取器和标签的RFID系统组件在以加密形式传送数据或密码的至少一部分的情况下通信。读取器发送命令，以及使用加密内核加密的数据或密码。在某些情况下，标签本身已发送内核。

6. 发明授权

US07061324B2 Use of analog-valued floating-gate transistors for parallel and serial signal processing 有权
公开(公告)号：US07061324B2
公开(公告)日：2006-06-13
申请号：US11055959
申请日：2005-02-10
申请人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
发明人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
IPC分类号： H03F3/16
CPC分类号： H03F3/211 , H01L27/115 , H01L27/11521 , H01L27/11558 , H03F1/30 , H03F1/301 , H03F3/16 , H03F3/45744 , H03F2200/174 , H03F2203/45121 , H03F2203/45341 , H03F2203/45474 , H03F2203/45661 , H03G1/007
摘要： Analog-valued floating-gate transistors are used as trimmable circuit components for modifying and/or controlling the gain, phase, offset, frequency response, current consumption, and/or transfer function of signal pathways in parallel and/or serial processing circuits in radio frequency, analog, or mixed-signal integrated circuits.

7. 发明授权

US07038544B2 Use of analog-valued floating-gate transistors for parallel and serial signal processing 有权
标题翻译：使用模拟值浮栅晶体管进行并行和串行信号处理
公开(公告)号：US07038544B2
公开(公告)日：2006-05-02
申请号：US11055948
申请日：2005-02-10
申请人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
发明人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
IPC分类号： H03G3/30
CPC分类号： H03F3/211 , H01L27/115 , H01L27/11521 , H01L27/11558 , H03F1/30 , H03F1/301 , H03F3/16 , H03F3/45744 , H03F2200/174 , H03F2203/45121 , H03F2203/45341 , H03F2203/45474 , H03F2203/45661 , H03G1/007
摘要： Analog-valued floating-gate transistors are used as trimmable circuit components for modifying and/or controlling the gain, phase, offset, frequency response, current consumption, and/or transfer function of signal pathways in parallel and/or serial processing circuits in radio frequency, analog, or mixed-signal integrated circuits.
摘要翻译：模拟值浮栅晶体管用作可调节电路组件，用于修改和/或控制无线电中的并行和/或串行处理电路中的信号通路的增益，相位，偏移，频率响应，电流消耗和/或传递函数频率，模拟或混合信号集成电路。

8. 发明授权

US06958646B1 Autozeroing floating-gate amplifier 有权
标题翻译：自动调零浮栅放大器
公开(公告)号：US06958646B1
公开(公告)日：2005-10-25
申请号：US10447684
申请日：2003-05-28
申请人： William T. Colleran , Todd E. Humes , Christopher J. Diorio
发明人： William T. Colleran , Todd E. Humes , Christopher J. Diorio
IPC分类号： H03F1/02 , H03F1/30
CPC分类号： H03F1/30
摘要： An autozeroing floating-gate amplifier (AFGA) is implemented utilizing a programmable gain element, the characteristics of which may be changed by changing the amount of charge stored on a floating gate device.
摘要翻译：利用可编程增益元件实现自动调零浮栅放大器（AFGA），其可以通过改变存储在浮动栅极器件上的电荷量来改变其特性。

9. 发明授权

US08102007B1 Apparatus for trimming high-resolution digital-to-analog converter 有权
标题翻译：用于微调高分辨率数模转换器的装置
公开(公告)号：US08102007B1
公开(公告)日：2012-01-24
申请号：US10661037
申请日：2003-09-12
申请人： John D. Hyde , Miguel E. Figueroa , Todd E. Humes , Christopher J. Diorio , Terry D. Hass , Chad A. Lindhorst
发明人： John D. Hyde , Miguel E. Figueroa , Todd E. Humes , Christopher J. Diorio , Terry D. Hass , Chad A. Lindhorst
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L31/788 , H01L27/10 , H01L29/739 , H01L29/73
CPC分类号： H03M1/1057 , H03M1/742
摘要： A method and apparatus for trimming a high-resolution digital-to-analog converter (DAC) utilizes floating-gate synapse transistors to trim the current sources in the DAC by providing a trimmable current source. Fowler-Nordheim electron tunneling and hot electron injection are the mechanisms used to vary the amount of charge on the floating gate. Since floating gate devices store charge essentially indefinitely, no continuous trimming mechanism is required, although one could be implemented if desired. By trimming the current sources with high accuracy, a DAC can be built with a much higher resolution and with smaller size than that provided by intrinsic device matching.
摘要翻译：用于修整高分辨率数模转换器（DAC）的方法和装置利用浮栅突触晶体管来通过提供可调整的电流源来修整DAC中的电流源。 Fowler-Nordheim电子隧道和热电子注入是用于改变浮动栅极上的电荷量的机制。由于浮动栅极器件基本上无限期地存储电荷，因此不需要连续的修整机制，但是如果需要可以实现。通过以高精度修剪电流源，可以以比本机设备匹配提供的更高的分辨率和更小的尺寸构建DAC。

10. 发明授权

US07548460B2 Floating-gate semiconductor structures 失效
标题翻译：浮栅半导体结构
公开(公告)号：US07548460B2
公开(公告)日：2009-06-16
申请号：US10915107
申请日：2004-08-09
申请人： Christopher J. Diorio , Todd E. Humes
发明人： Christopher J. Diorio , Todd E. Humes
IPC分类号： G11C11/34
CPC分类号： H01L29/66825 , H01L27/115 , H01L27/11521 , H01L27/11558 , H01L29/7883 , H01L29/7885
摘要： Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a floating-gate memory. Various pFET floating-gate structures use a combination of this mechanism and electron tunneling to implement nonvolatile analog memory, nonvolatile digital memory, or on-line learning in silicon. The memory is nonvolatile because the devices use electrically isolated floating gates to store electronic charge. The devices enable on-line learning because the electron injection and tunneling mechanisms that write the memory can occur during normal device operation. The memory updates and learning are bidirectional because the injection and tunneling mechanisms add and remove electrons from the floating gate, respectively. Because the memory updates depend on both the stored memory and the pFETs terminal voltages, and because they are bidirectional, the devices can implement on-line learning functions.
摘要翻译：通过p沟道MOSFET的沟道到漏极结中的空穴冲击电离驱动的热电子注入为写入浮栅存储器提供了一种新的机制。各种pFET浮栅结构使用这种机制和电子隧道的组合来实现非易失性模拟存储器，非易失性数字存储器或在线学习。存储器是非易失性的，因为器件使用电隔离的浮动门来存储电子电荷。这些器件允许在线学习，因为写入存储器的电子注入和隧道机制可能在正常的器件操作期间发生。存储器更新和学习是双向的，因为注入和隧道机制分别从浮动栅极添加和去除电子。因为存储器更新取决于存储的存储器和pFET端子电压，并且由于它们是双向的，所以器件可以实现在线学习功能。

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