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1. 发明授权

US07326582B2 Optical isolator device, and method of making same 失效
标题翻译：光隔离器装置及其制造方法
公开(公告)号：US07326582B2
公开(公告)日：2008-02-05
申请号：US11621863
申请日：2007-01-10
申请人： Chris Speyer , William E. Moore
发明人： Chris Speyer , William E. Moore
IPC分类号： H01L21/00
CPC分类号： H01L31/173 , H01L27/15 , H01L31/1055 , H01L31/107 , H01L31/1105 , H01L33/0012 , H01L33/0054 , H01L33/34
摘要： The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.
摘要翻译：本发明一般涉及一种光隔离器装置及其制造方法。在一个说明性实施例中，该方法包括获得单个SOI衬底，SOI衬底具有由硅构成的有源层和掩埋绝缘层，在SOI衬底的有源层上形成硅的掺杂层，形成第一和第二隔离层至少在硅的掺杂层中的区域，在第一隔离区域中形成光子产生装置，并在第二隔离区域中形成光子接收装置。在一个说明性实施例中，该器件包括由本体硅层构成的衬底，在体硅层上形成的掩埋绝缘层和位于掩埋绝缘层上方的硅的掺杂层，形成在第一和第二隔离区中的第一和第二隔离区硅的掺杂层，形成在第一隔离区域中的光子产生装置，以及形成在第二隔离区域中的光子接收装置。

2. 发明授权

US07180098B2 Optical isolator device, and method of making same 失效
标题翻译：光隔离器装置及其制造方法
公开(公告)号：US07180098B2
公开(公告)日：2007-02-20
申请号：US10817982
申请日：2004-04-05
申请人： Chris Speyer , William E. Moore
发明人： Chris Speyer , William E. Moore
IPC分类号： H01L27/15
CPC分类号： H01L31/173 , H01L27/15 , H01L31/1055 , H01L31/107 , H01L31/1105 , H01L33/0012 , H01L33/0054 , H01L33/34
摘要： The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.
摘要翻译：本发明一般涉及一种光隔离器装置及其制造方法。在一个说明性实施例中，该方法包括获得单个SOI衬底，SOI衬底具有由硅构成的有源层和掩埋绝缘层，在SOI衬底的有源层上形成硅的掺杂层，形成第一和第二隔离层至少在硅的掺杂层中的区域，在第一隔离区域中形成光子产生装置，并在第二隔离区域中形成光子接收装置。在一个说明性实施例中，该器件包括由本体硅层构成的衬底，在体硅层上形成的掩埋绝缘层和位于掩埋绝缘层上方的硅的掺杂层，形成在第一和第二隔离区中的第一和第二隔离区硅的掺杂层，形成在第一隔离区域中的光子产生装置，以及形成在第二隔离区域中的光子接收装置。

3. 发明授权

US07141478B2 Multi-stage EPI process for forming semiconductor devices, and resulting device 失效
标题翻译：用于形成半导体器件的多阶段EPI工艺，以及最终的器件
公开(公告)号：US07141478B2
公开(公告)日：2006-11-28
申请号：US10764777
申请日：2004-01-26
申请人： Chris Speyer
发明人： Chris Speyer
IPC分类号： H01L21/8222 , H01L21/331
CPC分类号： H01L29/66272
摘要： The present invention is generally directed to a multi-stage epi process for forming semiconductor devices, and the resulting device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial silicon above a surface of a semiconducting substrate, forming a second layer of epitaxial silicon above the first layer of epitaxial silicon, forming a third layer of epitaxial silicon above the second layer of epitaxial silicon, forming a trench isolation region that extends through at least the third layer of epitaxial silicon and forming a portion of a semiconductor device above the third layer of epitaxial silicon within an area defined by the isolation region. In one illustrative embodiment, the device comprises a substrate, a first layer of epitaxial silicon formed above the substrate, a second layer of epitaxial silicon formed above the first layer of epitaxial silicon, a third layer of epitaxial silicon formed above the second layer of epitaxial silicon, a trench isolation region that extends through at least the third layer of epitaxial silicon, the trench isolation region defining an active area, and at least one component of a semiconductor device formed in or above the third layer of epitaxial silicon within the active area.
摘要翻译：本发明一般涉及用于形成半导体器件的多级外延工艺，以及所得到的器件。在一个说明性实施例中，该方法包括在半导体衬底的表面上方形成外延硅的第一层，在第一层外延硅上方形成外延硅的第二层，在第二层外层上形成第三层外延硅外延硅，形成沟槽隔离区，其延伸穿过至少第三层外延硅，并在由隔离区限定的区域内形成第三外延硅层之上的半导体器件的一部分。在一个说明性实施例中，该器件包括衬底，在衬底上形成的外延硅的第一层，形成在第一外延硅层上的第二外延硅层，在第二外延层上方形成的第三层外延硅硅，沟槽隔离区域，其延伸穿过至少第三层外延硅，沟槽隔离区域限定有源区域，以及形成在有源区域内的第三层外延硅层中或上方的半导体器件的至少一个部件。

4. 发明申请

US20050221517A1 Optical isolator device, and method of making same 失效
标题翻译：光隔离器装置及其制造方法
公开(公告)号：US20050221517A1
公开(公告)日：2005-10-06
申请号：US10817982
申请日：2004-04-05
申请人： Chris Speyer , William Moore
发明人： Chris Speyer , William Moore
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L31/173 , H01L27/15 , H01L31/1055 , H01L31/107 , H01L31/1105 , H01L33/0012 , H01L33/0054 , H01L33/34
摘要： The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.
摘要翻译：本发明一般涉及一种光隔离器装置及其制造方法。在一个说明性实施例中，该方法包括获得单个SOI衬底，SOI衬底具有由硅构成的有源层和掩埋绝缘层，在SOI衬底的有源层上形成硅的掺杂层，形成第一和第二隔离层至少在硅的掺杂层中的区域，在第一隔离区域中形成光子产生装置，并在第二隔离区域中形成光子接收装置。在一个说明性实施例中，该器件包括由本体硅层构成的衬底，在体硅层上形成的掩埋绝缘层和位于掩埋绝缘层上方的硅的掺杂层，形成在第一和第二隔离区中的第一和第二隔离区硅的掺杂层，形成在第一隔离区域中的光子产生装置，以及形成在第二隔离区域中的光子接收装置。

5. 发明申请

US20050164463A1 Multi-stage EPI process for forming semiconductor devices, and resulting device 失效
标题翻译：用于形成半导体器件的多阶段EPI工艺，以及最终的器件
公开(公告)号：US20050164463A1
公开(公告)日：2005-07-28
申请号：US10764777
申请日：2004-01-26
申请人： Chris Speyer
发明人： Chris Speyer
IPC分类号： H01L21/331
CPC分类号： H01L29/66272
摘要： The present invention is generally directed to a multi-stage epi process for forming semiconductor devices, and the resulting device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial silicon above a surface of a semiconducting substrate, forming a second layer of epitaxial silicon above the first layer of epitaxial silicon, forming a third layer of epitaxial silicon above the second layer of epitaxial silicon, forming a trench isolation region that extends through at least the third layer of epitaxial silicon and forming a portion of a semiconductor device above the third layer of epitaxial silicon within an area defined by the isolation region. In one illustrative embodiment, the device comprises a substrate, a first layer of epitaxial silicon formed above the substrate, a second layer of epitaxial silicon formed above the first layer of epitaxial silicon, a third layer of epitaxial silicon formed above the second layer of epitaxial silicon, a trench isolation region that extends through at least the third layer of epitaxial silicon, the trench isolation region defining an active area, and at least one component of a semiconductor device formed in or above the third layer of epitaxial silicon within the active area.
摘要翻译：本发明一般涉及用于形成半导体器件的多级外延工艺，以及所得到的器件。在一个说明性实施例中，该方法包括在半导体衬底的表面上方形成外延硅的第一层，在第一层外延硅上方形成外延硅的第二层，在第二层外层上形成第三层外延硅外延硅，形成沟槽隔离区，其延伸穿过至少第三层外延硅，并在由隔离区限定的区域内形成第三外延硅层之上的半导体器件的一部分。在一个说明性实施例中，该器件包括衬底，在衬底上形成的外延硅的第一层，形成在第一外延硅层上的第二外延硅层，在第二外延层上方形成的第三层外延硅硅，沟槽隔离区域，其延伸穿过至少第三层外延硅，沟槽隔离区域限定有源区域，以及形成在有源区域内的第三层外延硅层中或上方的半导体器件的至少一个部件。

6. 发明申请

US20070111464A1 Optical Isolator Device, and Method of Making Same 失效
标题翻译：光隔离器装置及其制作方法
公开(公告)号：US20070111464A1
公开(公告)日：2007-05-17
申请号：US11621863
申请日：2007-01-10
申请人： Chris Speyer , William Moore
发明人： Chris Speyer , William Moore
IPC分类号： H01L21/8242 , H01L21/76
CPC分类号： H01L31/173 , H01L27/15 , H01L31/1055 , H01L31/107 , H01L31/1105 , H01L33/0012 , H01L33/0054 , H01L33/34
摘要： The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.
摘要翻译：本发明一般涉及一种光隔离器装置及其制造方法。在一个说明性实施例中，该方法包括获得单个SOI衬底，SOI衬底具有由硅构成的有源层和掩埋绝缘层，在SOI衬底的有源层上形成硅的掺杂层，形成第一和第二隔离层至少在硅的掺杂层中的区域，在第一隔离区域中形成光子产生装置，并在第二隔离区域中形成光子接收装置。在一个说明性实施例中，该器件包括由本体硅层构成的衬底，在体硅层上形成的掩埋绝缘层和位于掩埋绝缘层上方的硅的掺杂层，形成在第一和第二隔离区中的第一和第二隔离区硅的掺杂层，形成在第一隔离区域中的光子产生装置，以及形成在第二隔离区域中的光子接收装置。

7. 发明申请

US20050136588A1 Method of forming isolation regions 审中-公开
标题翻译：形成隔离区的方法
公开(公告)号：US20050136588A1
公开(公告)日：2005-06-23
申请号：US10744622
申请日：2003-12-23
申请人： Chris Speyer
发明人： Chris Speyer
IPC分类号： H01L21/44 , H01L21/762
CPC分类号： H01L21/76283
摘要： The present invention is generally directed to various methods of forming isolation regions. In one illustrative embodiment, the method comprises forming a stack of process layers above a surface of a semiconducting substrate, the stack of process layers comprised of a first layer of insulating material formed above a surface of the substrate, an etch stop layer positioned above the first layer of insulating material, wherein the etch stop layer has an etch selectivity with respect to the first layer of insulating material of at least 3:1, and a second layer of insulating material positioned above the etch stop layer. The method further comprises performing at least one etching process to define an opening that extends through the stack of process layers to thereby expose a portion of the surface of the substrate, forming sidewall spacers in the opening in the stack of process layers, wherein the sidewall spacers are comprised of a material having an etch selectivity with respect to the first layer of insulating material of at least 3:1, performing at least one etching process to define a trench in the substrate using the sidewall spacers as a portion of a mask during the etching process, removing the second layer of insulating material, forming a liner layer comprised of an insulating material on at least the sidewalls of the trench, performing at least one etching process to remove the sidewall spacers and the etch stop layer, and forming additional material in the trench adjacent the liner layer.
摘要翻译：本发明一般涉及形成隔离区域的各种方法。在一个说明性实施例中，该方法包括在半导体衬底的表面的上方形成一叠工艺层，所述堆叠工艺层由形成在衬底表面上的第一绝缘材料层组成，蚀刻停止层位于第一绝缘材料层，其中所述蚀刻停止层相对于所述第一绝缘材料层具有至少3:1的蚀刻选择性，以及位于所述蚀刻停止层上方的第二绝缘材料层。该方法还包括执行至少一个蚀刻工艺以限定延伸穿过堆叠的工艺层的开口，从而暴露衬底表面的一部分，在工艺层堆叠中的开口中形成侧壁间隔件，其中侧壁间隔物由相对于第一绝缘材料层的蚀刻选择性至少为3:1的材料组成，执行至少一个蚀刻工艺以在衬底中使用侧壁间隔物作为掩模的一部分来限定沟槽蚀刻工艺，去除第二绝缘材料层，在至少沟槽的侧壁上形成由绝缘材料构成的衬垫层，执行至少一个蚀刻工艺以去除侧壁间隔物和蚀刻停止层，以及形成额外的邻近衬层的沟槽中的材料。

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