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    • 1. 发明授权
    • Prediction module
    • 预测模块
    • US07995659B2
    • 2011-08-09
    • US11624959
    • 2007-01-19
    • Chih-Chieh ChenChih-Hung LiWen-Hsiao PengTihao Chiang
    • Chih-Chieh ChenChih-Hung LiWen-Hsiao PengTihao Chiang
    • H04N1/00H04B1/00
    • H04N19/43
    • A prediction module includes a computation control unit and first to sixth processing units. The computation control unit arranges the pixels of a reference block outputted by a frame buffer appropriately according to data decoded by an entropy decoder into first and second pixel signals, and outputs the same to the first to sixth processing units in units of cycles. The processing units are controlled by the computation control unit to respectively complete corresponding computations in a cycle, and to use the computation results as values of first to sixth output signals to be correspondingly outputted in a next cycle. The computation control unit receives the first to sixth output signals, and computes the output signals so as to obtain pixel values of a macroblock to be predicted.
    • 预测模块包括计算控制单元和第一至第六处理单元。 计算控制单元将由帧缓冲器输出的参考块的像素根据由熵解码器解码的数据适当地排列成第一和第二像素信号,并以循环为单位将其输出到第一至第六处理单元。 处理单元由计算控制单元控制以分别在一个周期内完成相应的计算,并且使用计算结果作为第一至第六输出信号的值在下一个周期中相应地输出。 计算控制单元接收第一至第六输出信号,并计算输出信号,以获得要预测的宏块的像素值。
    • 2. 发明申请
    • METHOD FOR SIMULATING, FABRICATING, OR DUPLICATING AN OIL PAINTING
    • 模拟,制作或复印油画的方法
    • US20100295881A1
    • 2010-11-25
    • US12783983
    • 2010-05-20
    • Being-Kung YaoAilen LiChih-Chieh ChenMei-Hwei Chang
    • Being-Kung YaoAilen LiChih-Chieh ChenMei-Hwei Chang
    • B41J2/01
    • B41M7/0027B41M3/06B41M5/0047B41M5/0064B41M5/52B44F11/02
    • A method for simulating, fabricating, or duplicating an oil painting is provided. The oil painting digital image information is acquired by scanning or capturing an oil painting surface image, and/or digitally simulating or rendering an oil painting surface image. A white paint is daubed on a base layer. A stereoscopic oil relief model, forming a stereoscopic oil relief layer, is acquired by topographically scanning the oil painting surface in three dimensions, and simulated or duplicated onto the base layer with a white or colorless transparent composite material. An image receiving layer is daubed on the stereoscopic oil relief layer. The oil image information, forming a printed oil painting surface image, is output and printed onto the image receiving layer with an inkjet printer. A transparent resin layer is daubed on the printed oil painting surface image, protecting the printed oil painting surface image with stereoscopic oil relief layer.
    • 提供了一种用于模拟,制造或复制油画的方法。 油画数字图像信息通过扫描或捕获油画表面图像,和/或数字模拟或呈现油画表面图像来获取。 一个白色涂料涂在基层上。 形成立体油浮雕层的立体油浮雕模型是通过在三维上通过地面扫描油画表面而获得的,并用白色或无色的透明复合材料模拟或复制到基底层上。 图像接收层被涂覆在立体浮油层上。 形成印刷油画面图像的油画图像信息用喷墨打印机输出并印刷到图像接收层上。 将透明树脂层涂布在印刷油画表面图像上,用立体浮油层保护印刷油画面图像。
    • 3. 发明申请
    • System and Method for Observing Threshold Voltage Variations
    • 观察阈值电压变化的系统和方法
    • US20100253382A1
    • 2010-10-07
    • US12688025
    • 2010-01-15
    • Chung-Hsing WangChih-Chieh ChenYi-Wei Chen
    • Chung-Hsing WangChih-Chieh ChenYi-Wei Chen
    • G01R31/36G01R31/02H03K3/03
    • H03K5/159G01R31/2884G01R31/3187
    • A system and method for observing threshold voltage variations are provided. A ring oscillator circuit comprises a plurality of inverters arranged in a sequential loop, a plurality of test circuits having devices under test, each coupled between a respective one of the inverters and a power supply. Each test circuit has a bypass field effect transistor (FET) having a first channel coupled between the power supply and a respective one of the inverters responsive to an individual enable signal, and a FET device under test having a second channel arranged in parallel to the first channel. A method is described for determining the threshold voltage of the device under test by disabling, for one of the inverters in the ring oscillator, the first FET device such that the device under test is coupled between the power supply and the respective inverter and affects the operating frequency of the ring oscillator.
    • 提供了一种用于观察阈值电压变化的系统和方法。 环形振荡器电路包括以顺序环路布置的多个反相器,多个具有被测器件的测试电路,每个测试电路耦合在相应的一个逆变器和电源之间。 每个测试电路具有旁路场效应晶体管(FET),该旁路场效应晶体管(FET)具有耦合在电源之间的第一通道和响应于单独使能信号的相应的一个反相器;以及被测试的FET器件,其具有与 第一频道 描述了一种用于通过对环形振荡器中的一个反相器中的第一FET器件禁止使得被测器件耦合在电源和相应的反相器之间而影响被测器件的阈值电压的方法, 环形振荡器的工作频率。
    • 5. 发明授权
    • Clock circuit and method for pulsed latch circuits
    • 脉冲锁存电路的时钟电路和方法
    • US08232824B2
    • 2012-07-31
    • US12688741
    • 2010-01-15
    • Chung-Hsing WangChih-Chieh ChenChih Sheng TsaiShu Yi Ying
    • Chung-Hsing WangChih-Chieh ChenChih Sheng TsaiShu Yi Ying
    • H03K3/017
    • H03K5/1565G06F1/04
    • Circuits and methods for providing a pulsed clock signal for use with pulsed latch circuits are described. A variable pulse generator is coupled to form a pulsed clock output responsive to a control signal and a clock input signal. A feedback loop is provided with a pulse monitor and a pulse control circuit. Samples of the pulsed clock signal are taken by the pulse monitor and an output is formed in the form of a pattern. The pulse control circuit receives the output of the monitor and determines whether it matches a predetermined pattern. Adjustments are made to the control signal to adaptively adjust the pulsed clock signal. The feedback loop may operate continuously. In alternative embodiments the feedback loop may be powered down. Methods for adaptively controlling a pulsed clock signal are disclosed.
    • 描述了提供用于脉冲锁存电路的脉冲时钟信号的电路和方法。 可变脉冲发生器耦合以响应于控制信号和时钟输入信号形成脉冲时钟输出。 反馈回路具有脉冲监视器和脉冲控制电路。 脉冲时钟信号的采样由脉冲监视器拍摄,并且以图案的形式形成输出。 脉冲控制电路接收监视器的输出并确定其是否匹配预定模式。 调整控制信号以自适应调整脉冲时钟信号。 反馈回路可以连续工作。 在替代实施例中,反馈回路可以断电。 公开了用于自适应地控制脉冲时钟信号的方法。
    • 8. 发明授权
    • Method for dummy metal and dummy via insertion
    • 虚拟金属和虚拟通孔插入方法
    • US08307321B2
    • 2012-11-06
    • US12728728
    • 2010-03-22
    • Hung-Yi LiuChung-Hsing WangChih-Chieh ChenJian-Yi Li
    • Hung-Yi LiuChung-Hsing WangChih-Chieh ChenJian-Yi Li
    • G06F17/50G06F9/455
    • G06F17/5077G06F17/5045G06F17/5068G06F17/5072G06F17/5081
    • A method for dummy metal and dummy via insertion is provided. In one embodiment, dummy metals are inserted using a place and route tool, where the place and route tool has timing-awareness. Then, dummy vias arrays are inserted inside an overlap area of dummy metals using a design-rule-checking utility. Fine-grained dummy vias arrays are inserted in available space far away from main patterns. The dummy-patterns resulting from the inserted dummy vias are compressed using the design-rule-checking utility to reduce the size of a graphic data system file generated from the integrated circuit design. The dummy vias can be inserted with relaxed via spacing rules. The dummy metals are inserted with a constant line-end spacing between them for better process control and the maximum length of the dummy metal can be limited for smaller coupling effects. The dummy vias can have various sizes and a square or rectangular shape.
    • 提供了一种用于虚拟金属和虚拟通孔插入的方法。 在一个实施例中,使用地点和路线工具插入虚拟金属,其中地点和路线工具具有时间意识。 然后,使用设计规则检查实用程序将虚拟过孔阵列插入到虚拟金属的重叠区域内。 细粒度的虚拟通孔阵列插入到远离主图案的可用空间中。 使用设计规则检查实用程序对插入的虚拟通孔产生的虚拟模式进行压缩,以减小从集成电路设计生成的图形数据系统文件的大小。 虚拟通孔可以放松通过间隔规则插入。 虚拟金属以它们之间的恒定的线端间隔插入,以获得更好的工艺控制,并且可以限制虚拟金属的最大长度以减小耦合效应。 虚拟通孔可以具有各种尺寸和正方形或矩形形状。