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1. 发明申请

US20130038789A1 Frame Rate Conversion Method and Image Processing Apparatus Thereof 有权
标题翻译：帧速率转换方法及其图像处理装置
公开(公告)号：US20130038789A1
公开(公告)日：2013-02-14
申请号：US13545154
申请日：2012-07-10
申请人： Chih Wei Chen , Chung-Yi Chen
发明人： Chih Wei Chen , Chung-Yi Chen
IPC分类号： H04N7/01
CPC分类号： H04N7/0112 , H04N7/0127 , H04N7/014 , H04N7/0147
摘要： A frame rate conversion method includes detecting a plurality of input frames to determine an image mode corresponding to the plurality of input frames; performing motion estimation on the plurality of input frames to generate a motion estimation result; and interpolating a plurality of interpolated frames according to the determined image mode, the motion estimation result and the plurality of input frames to generate a plurality of converted output frames, wherein a frame rate of the outputted frames is different from that of the input frames.
摘要翻译：帧率转换方法包括检测多个输入帧以确定与多个输入帧对应的图像模式; 对所述多个输入帧执行运动估计以产生运动估计结果; 以及根据所确定的图像模式，所述运动估计结果和所述多个输入帧来内插多个内插帧以产生多个转换输出帧，其中所输出的帧的帧速率与所述输入帧的帧速率不同。

2. 发明授权

US10115207B2 Stereoscopic image processing method and apparatus thereof 有权
公开(公告)号：US10115207B2
公开(公告)日：2018-10-30
申请号：US13527739
申请日：2012-06-20
申请人： Chien-Chuan Yao , Chih Wei Chen , Chung-Yi Chen
发明人： Chien-Chuan Yao , Chih Wei Chen , Chung-Yi Chen
IPC分类号： G06T7/50
摘要： An image processing method includes receiving a two-dimensional (2D) input image; detecting an image of a block in the 2D image to generate depth information for the block; and determining a depth of a sub-block image within the block according to the depth information, accurately estimating block-based depth information according to image characteristics of the block and obtaining a depth of a given block/pixel according to the depth information to generate improved stereoscopic images.

3. 发明授权

US08730392B2 Frame rate conversion method and image processing apparatus thereof 有权
标题翻译：帧速率转换方法及其图像处理装置
公开(公告)号：US08730392B2
公开(公告)日：2014-05-20
申请号：US13545154
申请日：2012-07-10
申请人： Chih Wei Chen , Chung-Yi Chen
发明人： Chih Wei Chen , Chung-Yi Chen
IPC分类号： H04N7/01 , H04N11/20
CPC分类号： H04N7/0112 , H04N7/0127 , H04N7/014 , H04N7/0147
摘要： A frame rate conversion method includes detecting a plurality of input frames to determine an image mode corresponding to the plurality of input frames; performing motion estimation on the plurality of input frames to generate a motion estimation result; and interpolating a plurality of interpolated frames according to the determined image mode, the motion estimation result and the plurality of input frames to generate a plurality of converted output frames, wherein a frame rate of the outputted frames is different from that of the input frames.
摘要翻译：帧率转换方法包括检测多个输入帧以确定与多个输入帧对应的图像模式; 对所述多个输入帧执行运动估计以产生运动估计结果; 以及根据所确定的图像模式，所述运动估计结果和所述多个输入帧来内插多个内插帧以产生多个转换的输出帧，其中所输出的帧的帧速率与所述输入帧的帧速率不同。

4. 发明申请

US20120320045A1 Image Processing Method and Apparatus Thereof 审中-公开
标题翻译：图像处理方法及装置
公开(公告)号：US20120320045A1
公开(公告)日：2012-12-20
申请号：US13527739
申请日：2012-06-20
申请人： Chien-Chuan Yao , Chih Wei Chen , Chung-Yi Chen
发明人： Chien-Chuan Yao , Chih Wei Chen , Chung-Yi Chen
IPC分类号： G06T15/00
CPC分类号： G06T7/50 , G06T2207/20021
摘要： An image processing method includes receiving a two-dimensional (2D) input image; detecting an image of a block in the 2D image to generate depth information for the block; and determining a depth of a sub-block image within the block according to the depth information, accurately estimating block-based depth information according to image characteristics of the block and obtaining a depth of a given block/pixel according to the depth information to generate improved stereoscopic images.
摘要翻译：一种图像处理方法，包括：接收二维（2D）输入图像; 检测所述2D图像中的块的图像以生成所述块的深度信息; 以及根据所述深度信息确定所述块内的子块图像的深度，根据所述块的图像特征精确地估计基于块的深度信息，并且根据所述深度信息获得给定块/像素的深度以生成改进的立体图像。

5. 发明授权

US09215437B2 Passive 3D image system and image processing method thereof 有权
标题翻译：被动3D图像系统及其图像处理方法
公开(公告)号：US09215437B2
公开(公告)日：2015-12-15
申请号：US13241720
申请日：2011-09-23
申请人： Chung-Yi Chen
发明人： Chung-Yi Chen
IPC分类号： H04N13/00 , H04N13/04
CPC分类号： H04N13/106 , H04N13/337
摘要： A passive 3D image system includes a passive 3D image display apparatus, a scaling module and a luminance adjusting module. The 3D passive image display apparatus includes N rows of display units. After receiving an original image including N rows of original data, the scaling module merges the N rows of original data to generate a scaled image including N/2 rows of scaled data. The original image is either a left-eye image or a right-eye image. The luminance adjusting module adjusts the N/2 rows of scaled data to increase the luminance of the scaled image.
摘要翻译：被动3D图像系统包括被动3D图像显示装置，缩放模块和亮度调节模块。 3D无源图像显示装置包括N行显示单元。缩放模块收到包含N行原始数据的原始图像后，合并N行原始数据，生成包含N / 2行缩放数据的缩放图像。原始图像是左眼图像或右眼图像。亮度调整模块调整缩放数据的N / 2行以增加缩放图像的亮度。

6. 发明授权

US08582665B2 Image processing circuit and associated method 有权
标题翻译：图像处理电路及相关方法
公开(公告)号：US08582665B2
公开(公告)日：2013-11-12
申请号：US12480126
申请日：2009-06-08
申请人： Chung-Yi Chen , Su-Chun Wang
发明人： Chung-Yi Chen , Su-Chun Wang
IPC分类号： H04N11/02
CPC分类号： H04N19/436 , H04N19/43
摘要： An image processing circuit includes a compression circuit, a plurality of first line buffers, a decompression circuit, and a motion estimation/compensation circuit. The compression circuit receives source image data and compresses the received source image data to generate a compressed image data. The first line buffers, coupled to the compression circuit, sequentially receive the compressed image data and buffer the compressed image data. The decompression circuit, coupled to the first line buffers, decompresses the compressed image data to generate a decompressed image data. The motion estimation/compression circuit, coupled to the decompression circuit, performs motion estimation/compensation according to the decompressed image data.
摘要翻译：图像处理电路包括压缩电路，多个第一行缓冲器，解压缩电路和运动估计/补偿电路。压缩电路接收源图像数据并压缩接收到的源图像数据以产生压缩图像数据。耦合到压缩电路的第一行缓冲器顺序地接收压缩的图像数据并缓冲压缩的图像数据。耦合到第一行缓冲器的解压缩电路解压缩压缩的图像数据以产生解压缩的图像数据。耦合到解压缩电路的运动估计/压缩电路根据解压缩的图像数据执行运动估计/补偿。

7. 发明授权

US08455023B2 Composition for inhibiting melanogenesis and use thereof 有权
标题翻译：用于抑制黑素生成的组合物及其用途
公开(公告)号：US08455023B2
公开(公告)日：2013-06-04
申请号：US12848380
申请日：2010-08-02
申请人： Hui-Min Wang , Chung-Yi Chen , Zhi-Hong Wen
发明人： Hui-Min Wang , Chung-Yi Chen , Zhi-Hong Wen
IPC分类号： A61K36/54
CPC分类号： A61K36/54 , A61K31/341
摘要： The present invention provides a Cinnamomum subavenium extract for inhibiting melanogenesis. The present invention also provides a composition for inhibiting melanogenesis including compounds inhibit tyrosinase activity.
摘要翻译：本发明提供了一种用于抑制黑素生成的樟脑ium ium提取物。本发明还提供了抑制黑素生成的组合物，包括抑制酪氨酸酶活性的化合物。

8. 发明申请

US20120170657A1 COMPENSATION DE-INTERLACING IMAGE PROCESSING APPARATUS AND ASSOCIATED METHOD 有权
标题翻译：补偿去交错图像处理装置和相关方法
公开(公告)号：US20120170657A1
公开(公告)日：2012-07-05
申请号：US13337453
申请日：2011-12-27
申请人： Yu-Jen Wang , Chung-Yi Chen
发明人： Yu-Jen Wang , Chung-Yi Chen
IPC分类号： H04N7/32 , H04N7/26
CPC分类号： H04N7/012 , H04N7/014
摘要： A motion compensation de-interlacing image processing apparatus is provided. The apparatus includes a motion compensation module, a still compensation module, a motion detection module, and a de-interlacing blending module. The motion compensation module generates a motion compensation pixel according to at least one of a current field, a previous field, and a next field of a target pixel to be interpolated. The still compensation module generates a still compensation pixel according to the previous field and the next field of the target pixel. The motion detection module determines a motion index according to the previous field and the next field of the target pixel. The de-interlacing blending module generates the target pixel by weighted averaging the motion compensation pixel and the still compensation pixel according to the motion index.
摘要翻译：提供一种运动补偿去隔行图像处理装置。该装置包括运动补偿模块，静止补偿模块，运动检测模块和去隔行混合模块。运动补偿模块根据要内插的目标像素的当前场，先前场和下一场中的至少一个产生运动补偿像素。静止补偿模块根据目标像素的前一场和下一场产生静止补偿像素。运动检测模块根据目标像素的前一场和下一个场来确定运动索引。去隔行混合模块通过根据运动索引对运动补偿像素和静止补偿像素进行加权平均来生成目标像素。

9. 发明申请

US20110116547A1 Image Interpolation Processing Apparatus and Method Thereof 有权
标题翻译：图像插值处理装置及其方法
公开(公告)号：US20110116547A1
公开(公告)日：2011-05-19
申请号：US12903411
申请日：2010-10-13
申请人： Chung-Yi Chen , Chia-Hao Chung
发明人： Chung-Yi Chen , Chia-Hao Chung
IPC分类号： H04N7/26
CPC分类号： G06T3/40 , H04N7/014
摘要： An image interpolation processing apparatus includes a motion vector generating module, for generating a first reference motion vector and a second reference motion vector for an interpolated block of an interpolated frame according to the interpolated block and a plurality of blocks adjacent to the interpolated block; a blurred block processing module, for determining an area property of the interpolation block being one of an image covered area, an image uncovered area and a non-blurred area according to the first reference motion vector and the second reference motion vector, and a representative motion vector of the interpolated block being one of the first reference motion vector and the second reference motion vector; and a frame interpolation module, for generating an image content of the interpolated block according to the representative motion vector and the area property.
摘要翻译：图像插值处理装置包括：运动矢量生成模块，用于根据插值块生成内插帧的内插块的第一参考运动矢量和第二参考运动矢量以及与内插块相邻的多个块; 模糊块处理模块，用于根据第一参考运动矢量和第二参考运动矢量确定作为图像覆盖区域，图像未覆盖区域和非模糊区域之一的内插块的面积属性，以及代表内插块的运动矢量是第一参考运动矢量和第二参考运动矢量之一; 以及帧内插模块，用于根据代表运动矢量和面积属性来生成内插块的图像内容。

10. 发明申请

US20070052008A1 Memory structure with high coupling ratio 有权
标题翻译：高耦合比的记忆体结构
公开(公告)号：US20070052008A1
公开(公告)日：2007-03-08
申请号：US11272683
申请日：2005-11-15
申请人： Chih-Ping Chung , Chun-Nan Lin , Chung-Yi Chen , Hung-Kwei Liao
发明人： Chih-Ping Chung , Chun-Nan Lin , Chung-Yi Chen , Hung-Kwei Liao
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/42324 , H01L21/28273
摘要： A memory structure comprising a plurality of memory cells is described. Each memory cell comprises a substrate, a shallow trench isolation, a spacer, a tunnel oxide, and a floating gate. The shallow trench isolation in the substrate is used to define an active area. The spacer is at the sidewall of the shallow trench isolation and is higher than the shallow trench isolation. The tunnel oxide is on the active area. The floating gate is on the tunnel oxide.
摘要翻译：描述包括多个存储器单元的存储器结构。每个存储单元包括衬底，浅沟槽隔离，间隔物，隧道氧化物和浮动栅极。衬底中的浅沟槽隔离用于限定有源区。间隔物位于浅沟槽隔离物的侧壁处，并且高于浅沟槽隔离。隧道氧化物在有源区上。浮动栅极在隧道氧化物上。

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