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1. 发明授权

US08471328B2 Non-volatile memory and manufacturing method thereof 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US08471328B2
公开(公告)日：2013-06-25
申请号：US12843093
申请日：2010-07-26
申请人： Chien-Hung Chen , Tzu-Ping Chen , Yu-Jen Chang
发明人： Chien-Hung Chen , Tzu-Ping Chen , Yu-Jen Chang
IPC分类号： H01L29/82
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11573 , H01L29/4234 , H01L29/66833
摘要： A manufacturing method of a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate conductive layer, the substrate and the gate dielectric layer, and a cavity is formed on end sides of the gate dielectric layer. A first oxide layer is formed on a sidewall and bottom of the gate conductive layer, and a second oxide layer is formed on a surface of the substrate. A nitride material layer is formed covering the gate structure, the first and second oxide layer and the substrate and filling the opening. An etching process is performed to partly remove the nitride material layer, thereby a nitride layer is formed on a sidewall of the gate conductive layer and extending into the opening.
摘要翻译：公开了一种非易失性存储器的制造方法。栅极结构形成在衬底上，并且包括栅极介电层和栅极导电层。部分地去除栅介质层，从而在栅极导电层，基板和栅极电介质层之间形成对称的开口，并且在栅极电介质层的端侧形成空腔。在栅极导电层的侧壁和底部上形成第一氧化物层，并且在衬底的表面上形成第二氧化物层。形成覆盖栅极结构，第一和第二氧化物层和衬底并填充开口的氮化物材料层。执行蚀刻处理以部分地去除氮化物材料层，由此在栅极导电层的侧壁上形成并延伸到开口中的氮化物层。

2. 发明申请

US20120018795A1 NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US20120018795A1
公开(公告)日：2012-01-26
申请号：US12843093
申请日：2010-07-26
申请人： Chien-Hung CHEN , Tzu-Ping Chen , Yu-Jen Chang
发明人： Chien-Hung CHEN , Tzu-Ping Chen , Yu-Jen Chang
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11573 , H01L29/4234 , H01L29/66833
摘要： A manufacturing method of a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate conductive layer, the substrate and the gate dielectric layer, and a cavity is formed on end sides of the gate dielectric layer. A first oxide layer is formed on a sidewall and bottom of the gate conductive layer, and a second oxide layer is formed on a surface of the substrate. A nitride material layer is formed covering the gate structure, the first and second oxide layer and the substrate and filling the opening. An etching process is performed to partly remove the nitride material layer, thereby a nitride layer is formed on a sidewall of the gate conductive layer and extending into the opening.
摘要翻译：公开了一种非易失性存储器的制造方法。栅极结构形成在衬底上，并且包括栅极介电层和栅极导电层。部分地去除栅介质层，从而在栅极导电层，基板和栅极电介质层之间形成对称的开口，并且在栅极电介质层的端侧形成空腔。在栅极导电层的侧壁和底部上形成第一氧化物层，并且在衬底的表面上形成第二氧化物层。形成覆盖栅极结构，第一和第二氧化物层和衬底并填充开口的氮化物材料层。执行蚀刻处理以部分地去除氮化物材料层，由此在栅极导电层的侧壁上形成并延伸到开口中的氮化物层。

3. 发明授权

US07498228B2 Method for fabricating SONOS a memory 有权
标题翻译：制造SONOS存储器的方法
公开(公告)号：US07498228B2
公开(公告)日：2009-03-03
申请号：US11775223
申请日：2007-07-09
申请人： Tzu-Ping Chen , Chien-Hung Chen , Pei-Chen Kuo , Shen-De Wang
发明人： Tzu-Ping Chen , Chien-Hung Chen , Pei-Chen Kuo , Shen-De Wang
IPC分类号： H01L21/336
CPC分类号： H01L29/792 , H01L21/76826 , H01L21/76828 , H01L29/66833
摘要： A method for fabricating a SONOS memory is disclosed. First, a semiconductor substrate is provided and a SONOS memory cell is formed on said semiconductor substrate. A passivation layer is deposited on the SONOS memory cell and a contact pad is formed on the passivation layer. Subsequently, an ultraviolet treatment is performed and an annealing process is conducted thereafter.
摘要翻译：公开了一种用于制造SONOS存储器的方法。首先，提供半导体衬底，并且在所述半导体衬底上形成SONOS存储单元。钝化层沉积在SONOS存储单元上，并且在钝化层上形成接触焊盘。接着，进行紫外线处理，然后进行退火处理。

4. 发明申请

US20060186455A1 NAND-TYPE NON-VOLATILE MEMORY 有权
标题翻译： NAND型非易失性存储器
公开(公告)号：US20060186455A1
公开(公告)日：2006-08-24
申请号：US10906535
申请日：2005-02-24
申请人： Chien-Hung Chen , Nai-Chen Peng , Kuang-Pi Lee , Tzu-Ping Chen
发明人： Chien-Hung Chen , Nai-Chen Peng , Kuang-Pi Lee , Tzu-Ping Chen
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L27/115 , G11C16/0483 , H01L27/11521
摘要： A non-volatile memory includes a substrate, a plurality of data storage elements positioned on the substrate, a plurality of control gates positioned above the data storage elements, an insulating layer positioned on surfaces and sidewalls of the control gates, and a bit-line positioned on the insulating layer to cross the control gates.
摘要翻译：非易失性存储器包括基板，位于基板上的多个数据存储元件，位于数据存储元件上方的多个控制栅极，位于控制栅极的表面和侧壁上的绝缘层，以及位线位于绝缘层上以跨越控制门。

5. 发明授权

US07511329B2 NAND-type non-volatile memory 有权
标题翻译： NAND型非易失性存储器
公开(公告)号：US07511329B2
公开(公告)日：2009-03-31
申请号：US10906535
申请日：2005-02-24
申请人： Chien-Hung Chen , Nai-Chen Peng , Kuang-Pi Lee , Tzu-Ping Chen
发明人： Chien-Hung Chen , Nai-Chen Peng , Kuang-Pi Lee , Tzu-Ping Chen
IPC分类号： H01L23/62
CPC分类号： H01L27/115 , G11C16/0483 , H01L27/11521
摘要： A non-volatile memory includes a substrate, a plurality of data storage elements positioned on the substrate, a plurality of control gates positioned above the data storage elements, an insulating layer positioned on surfaces and sidewalls of the control gates, and a bit-line positioned on the insulating layer to cross the control gates.
摘要翻译：非易失性存储器包括基板，位于基板上的多个数据存储元件，位于数据存储元件上方的多个控制栅极，位于控制栅极的表面和侧壁上的绝缘层，以及位线位于绝缘层上以跨越控制门。

6. 发明授权

US07169668B2 Method of manufacturing a split-gate flash memory device 有权
标题翻译：分闸式闪存器件的制造方法
公开(公告)号：US07169668B2
公开(公告)日：2007-01-30
申请号：US10905535
申请日：2005-01-09
申请人： Ming-Tzong Yang , Tzu-Ping Chen
发明人： Ming-Tzong Yang , Tzu-Ping Chen
IPC分类号： H01L21/336
CPC分类号： H01L27/11568 , H01L21/28282 , H01L27/115
摘要： A method of manufacturing a split-gate flash memory device is disclosed. On a semiconductor substrate having a plurality of parallel conductive lines, a plurality of doped regions are formed by an ion implantation using the conductive lines as mask. Then, the conductive lines are trimmed for thinning the cover area. Afterward, a composite dielectric layer is formed on the substrate and covers the conductive lines. Finally, a plurality of word lines are formed on the composite dielectric layer.
摘要翻译：公开了制造分闸式闪存装置的方法。在具有多条平行导线的半导体衬底上，通过使用导线作为掩模的离子注入形成多个掺杂区域。然后，修剪导线以使覆盖区域变薄。之后，在基板上形成复合电介质层并覆盖导电线。最后，在复合介电层上形成多个字线。

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