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1. 发明授权

US07087958B2 Termination structure of DMOS device 有权
标题翻译： DMOS设备终端结构
公开(公告)号：US07087958B2
公开(公告)日：2006-08-08
申请号：US10771957
申请日：2004-02-03
申请人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Hsing-Huang Hsieh
发明人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Hsing-Huang Hsieh
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7811 , H01L29/402 , H01L29/407 , H01L29/7813
摘要： In one embodiment of the invention, a semiconductor device set includes at least one trench-typed MOSFET and a trench-typed termination structure. The trench-typed MOSFET has a trench profile and includes a gate oxide layer in the trench profile, and a polysilicon layer on the gate oxide layer. The trench-typed termination structure has a trench profile and includes an oxide layer in the trench profile. A termination polysilicon layer with discrete features separates the termination polysilicon layer. An isolation layer covers the termination polysilicon layer and filling the discrete features. The trench-typed MOSFET and the trench-typed termination structure may be formed on a DMOS device including an N+ silicon substrate, an N epitaxial layer on the N+ silicon substrate, and a P epitaxial layer on the N epitaxial layer. The trench profiles of the trench-typed MOSFET and of the trench-typed termination structure may penetrate through the P epitaxial layer into the N epitaxial layer.
摘要翻译：在本发明的一个实施例中，半导体器件组包括至少一个沟槽型MOSFET和沟槽型端接结构。沟槽型MOSFET具有沟槽轮廓并且在沟槽轮廓中包括栅极氧化物层，并且在栅极氧化物层上包括多晶硅层。沟槽式端接结构具有沟槽轮廓并且在沟槽轮廓中包括氧化物层。具有离散特征的端接多晶硅层分离端接多晶硅层。隔离层覆盖终端多晶硅层并填充离散特征。沟槽型MOSFET和沟槽型端接结构可以形成在包括N +硅衬底，N +硅衬底上的N外延层和N外延层上的P外延层的DMOS器件上。沟槽型MOSFET和沟槽型端接结构的沟槽轮廓可以穿透P外延层进入N外延层。

2. 发明授权

US07084457B2 DMOS device having a trenched bus structure 有权
标题翻译：具有沟槽总线结构的DMOS器件
公开(公告)号：US07084457B2
公开(公告)日：2006-08-01
申请号：US10774212
申请日：2004-02-05
申请人： Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
发明人： Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
IPC分类号： H01L29/76 , H01L31/062
CPC分类号： H01L29/7811 , H01L29/4232 , H01L29/4238 , H01L29/7813
摘要： A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate oxide layer and a polysilicon bus are formed to fill the trench as a main portion of the bus structure. In addition, an isolation layer and a metal line are formed atop the polysilicon bus and the field oxide layer. An opening is formed in the isolation layer to form connections between the polysilicon bus and the metal line. In specific embodiments, the bus trench and the gate trenches of the DMOS device are formed simultaneously, and the polysilicon bus and the gate electrode are formed simultaneously as well. Therefore, the bus structure is able to form the DMOS transistor without demanding any lithographic step for defining the position of the polysilicon bus.
摘要翻译：引入了具有沟槽总线结构的DMOS器件。沟槽总线结构包括形成在P基板上的场氧化物层和从场氧化物层的顶表面向下延伸到P衬底的下部的沟槽。形成栅极氧化层和多晶硅母线，以填充沟槽作为总线结构的主要部分。此外，在多晶硅总线和场氧化物层的顶部形成隔离层和金属线。在隔离层中形成开口以形成多晶硅母线和金属线之间的连接。在具体实施例中，同时形成DMOS器件的总线沟槽和栅极沟槽，同时形成多晶硅母线和栅电极。因此，总线结构能够形成DMOS晶体管，而不需要用于定义多晶硅总线位置的任何光刻步骤。

3. 发明授权

US06989306B2 Termination structure of DMOS device and method of forming the same 有权
标题翻译： DMOS器件的端接结构及其形成方法
公开(公告)号：US06989306B2
公开(公告)日：2006-01-24
申请号：US10771808
申请日：2004-02-03
申请人： Chiao-Shun Chuang , Hsin-Huang Hsieh , Mao-Song Tseng , Chien-Ping Chang
发明人： Chiao-Shun Chuang , Hsin-Huang Hsieh , Mao-Song Tseng , Chien-Ping Chang
IPC分类号： H01L21/336
CPC分类号： H01L29/7811 , H01L29/41766 , H01L29/7802 , H01L29/7813
摘要： Embodiments of the invention provide a termination structure of DMOS device and a method of forming the same. In forming the termination structure, a silicon substrate with an epitaxial layer formed thereon is provided. A body region defined by doping the epitaxial layer is then selectively etched to form a plurality of DMOS trenches therein. Thereafter, a gate oxide layer is formed over exposed surfaces in the body region and a termination oxide layer is formed to encircle the body region. Afterward, a polysilicon layer is deposited over all the exposed surfaces, and then selectively etched to form a plurality of poly gates in the DMOS trenches and a polysilicon plate having an extending portion toward the body region over the termination oxide layer. By using the termination polysilicon layer as an implantation mask, sources are formed in the body region. Afterward, an isolation layer and a source metal contact layer are deposited over the structure, in which the isolation layer is utilized to protect the polysilicon gates, and also the source metal contact layer is utilized to ground both the body region and the polysilicon plate.
摘要翻译：本发明的实施例提供了一种DMOS器件的端接结构及其形成方法。在形成端接结构时，提供其上形成有外延层的硅衬底。然后选择性地蚀刻通过掺杂外延层限定的体区，以在其中形成多个DMOS沟槽。此后，在体区域中的暴露表面上形成栅极氧化物层，并且形成终止氧化物层以环绕身体区域。之后，在所有暴露的表面上沉积多晶硅层，然后选择性地蚀刻以在DMOS沟槽中形成多个多晶硅栅极，以及在端接氧化物层上具有朝向主体区域的延伸部分的多晶硅板。通过使用终止多晶硅层作为注入掩模，在体区域中形成源。之后，在结构上沉积隔离层和源极金属接触层，其中隔离层用于保护多晶硅栅极，并且源极金属接触层用于接地体区域和多晶硅板。

4. 发明授权

US06821913B2 Method for forming dual oxide layers at bottom of trench 有权
标题翻译：在沟槽底部形成双重氧化层的方法
公开(公告)号：US06821913B2
公开(公告)日：2004-11-23
申请号：US10232260
申请日：2002-08-29
申请人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Cheng-Tsung Ni
发明人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Cheng-Tsung Ni
IPC分类号： H01L2131
CPC分类号： H01L29/66734 , H01L21/0274 , H01L21/76224 , H01L29/42368
摘要： Embodiments of the present invention are directed to an improved method for forming dual oxide layers at the bottom of a trench of a substrate. A substrate has a trench which includes a bottom and a sidewall. The trench may be created by forming a mask oxide layer on the substrate; defining the mask oxide layer to form a patterned mask oxide layer and exposing a partial surface of the substrate to form a window; and using the patterned mask oxide layer as an etching mask to form the trench in the window. A first oxide layer is formed on the sidewall and the bottom of the trench of the substrate. A photoresist layer is formed on the substrate, filling the trench of the substrate. The method further comprises partially etching back the photoresist layer to leave a remaining photoresist layer in the trench. The height of the remaining photoresist layer is lower than the depth of the trench. A curing treatment of the remaining photoresist layer is performed after the partial etching. The patterned mask oxide layer and a portion of the first oxide layer are removed to leave a remaining first oxide layer at the bottom of the trench. The remaining photoresist layer is removed. A second oxide layer is formed on the substrate covering at least the remaining first oxide layer to form the dual oxide layers at the bottom of the trench.
摘要翻译：本发明的实施例涉及一种用于在衬底的沟槽的底部形成双重氧化物层的改进方法。衬底具有包括底部和侧壁的沟槽。可以通过在衬底上形成掩模氧化物层来形成沟槽; 限定所述掩模氧化物层以形成图案化掩模氧化物层并暴露所述衬底的部分表面以形成窗口; 并且使用图案化的掩模氧化物层作为蚀刻掩模以在窗口中形成沟槽。第一氧化物层形成在衬底的沟槽的侧壁和底部上。在衬底上形成光刻胶层，填充衬底的沟槽。该方法还包括部分地蚀刻光致抗蚀剂层以在沟槽中留下残留的光致抗蚀剂层。剩余的光致抗蚀剂层的高度低于沟槽的深度。在部分蚀刻之后进行剩余光致抗蚀剂层的固化处理。图案化的掩模氧化物层和第一氧化物层的一部分被去除以在沟槽的底部留下剩余的第一氧化物层。去除剩余的光致抗蚀剂层。在衬底上形成第二氧化物层，至少覆盖剩余的第一氧化物层，以在沟槽的底部形成双氧化层。

5. 发明授权

US07265024B2 DMOS device having a trenched bus structure 有权
标题翻译：具有沟槽总线结构的DMOS器件
公开(公告)号：US07265024B2
公开(公告)日：2007-09-04
申请号：US11329870
申请日：2006-01-10
申请人： Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
发明人： Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
IPC分类号： H01L21/76 , H01L21/3205 , H01L21/4763 , H01L21/336 , H01L29/76
CPC分类号： H01L29/7811 , H01L29/4232 , H01L29/4238 , H01L29/7813
摘要： A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate oxide layer and a polysilicon bus are formed to fill the trench as a main portion of the bus structure. In addition, an isolation layer and a metal line are formed atop the polysilicon bus and the field oxide layer. An opening is formed in the isolation layer to form connections between the polysilicon bus and the metal line. In specific embodiments, the bus trench and the gate trenches of the DMOS device are formed simultaneously, and the polysilicon bus and the gate electrode are formed simultaneously as well. Therefore, the bus structure is able to form the DMOS transistor without demanding any lithographic step for defining the position of the polysilicon bus.
摘要翻译：引入了具有沟槽总线结构的DMOS器件。沟槽总线结构包括形成在P基板上的场氧化物层和从场氧化物层的顶表面向下延伸到P衬底的下部的沟槽。形成栅极氧化层和多晶硅母线，以填充沟槽作为总线结构的主要部分。此外，在多晶硅总线和场氧化物层的顶部形成隔离层和金属线。在隔离层中形成开口以形成多晶硅母线和金属线之间的连接。在具体实施例中，同时形成DMOS器件的总线沟槽和栅极沟槽，同时形成多晶硅母线和栅电极。因此，总线结构能够形成DMOS晶体管，而不需要用于定义多晶硅总线位置的任何光刻步骤。

6. 发明授权

US06677223B2 Transistor with highly uniform threshold voltage 有权
标题翻译：具有高度均匀阈值电压的晶体管
公开(公告)号：US06677223B2
公开(公告)日：2004-01-13
申请号：US10219092
申请日：2002-08-13
申请人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Hsin-Huang Hsieh
发明人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Hsin-Huang Hsieh
IPC分类号： H01L2120
CPC分类号： H01L21/28167
摘要： Embodiments of the present invention relate to processes utilized in the manufacturing of a semiconductor device having transistors to achieve high uniformity of threshold voltages. The invention does so by ensuring high uniformity of impurity concentration in the substrate. In one embodiment, a method for manufacturing a semiconductor device having transistors with high uniformity of threshold voltages comprises providing a substrate and a source of impurities, and disposing the substrate and the source of impurities in a first oxygen gas at a first initial temperature and heated to a first target temperature at a first temperature rate to drive the impurities into the substrate. The first initial temperature is sufficiently low to prevent the oxygen from diffusing into the substrate. The substrate is disposed in a second oxygen gas at a second initial temperature and heated to a second target temperature at a second rate to form an oxide layer on the substrate. The second rate is high enough for rapid formation of the oxide layer on the substrate so as to prevent the impurities driven into the substrate from diffusing out from the substrate.
摘要翻译：本发明的实施例涉及用于制造具有晶体管以实现阈值电压的高均匀性的半导体器件的工艺。本发明通过确保衬底中杂质浓度的高均匀性来实现。在一个实施例中，制造具有高阈值电压均匀性的晶体管的半导体器件的方法包括提供衬底和杂质源，并将衬底和杂质源置于第一初始温度的第一氧气中并加热以第一温度速率升至第一目标温度以驱动杂质进入基板。第一初始温度足够低以防止氧扩散到基底中。将衬底在第二初始温度下设置在第二氧气中，并以第二速率加热至第二目标温度，以在衬底上形成氧化物层。第二速率足够高以快速形成衬底上的氧化物层，以防止驱动到衬底中的杂质从衬底扩散出来。

7. 发明申请

US20060186465A1 DMOS device having a trenched bus structure 有权
公开(公告)号：US20060186465A1
公开(公告)日：2006-08-24
申请号：US11329870
申请日：2006-01-10
申请人： Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
发明人： Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
IPC分类号： H01L31/113
CPC分类号： H01L29/7811 , H01L29/4232 , H01L29/4238 , H01L29/7813
摘要： A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate oxide layer and a polysilicon bus are formed to fill the trench as a main portion of the bus structure. In addition, an isolation layer and a metal line are formed atop the polysilicon bus and the field oxide layer. An opening is formed in the isolation layer to form connections between the polysilicon bus and the metal line. In specific embodiments, the bus trench and the gate trenches of the DMOS device are formed simultaneously, and the polysilicon bus and the gate electrode are formed simultaneously as well. Therefore, the bus structure is able to form the DMOS transistor without demanding any lithographic step for defining the position of the polysilicon bus.

8. 发明申请

US20050009277A1 Termination structure of DMOS device and method of forming the same 有权
标题翻译： DMOS器件的端接结构及其形成方法
公开(公告)号：US20050009277A1
公开(公告)日：2005-01-13
申请号：US10771808
申请日：2004-02-03
申请人： Chiao-Shun Chuang , Hsin-Huang Hsieh , Mao-Song Tseng , Chien-Ping Chang
发明人： Chiao-Shun Chuang , Hsin-Huang Hsieh , Mao-Song Tseng , Chien-Ping Chang
IPC分类号： H01L29/417 , H01L29/78 , H01L21/336
CPC分类号： H01L29/7811 , H01L29/41766 , H01L29/7802 , H01L29/7813
摘要： Embodiments of the invention provide a termination structure of DMOS device and a method of forming the same. In forming the termination structure, a silicon substrate with an epitaxial layer formed thereon is provided. A body region defined by doping the epitaxial layer is then selectively etched to form a plurality of DMOS trenches therein. Thereafter, a gate oxide layer is formed over exposed surfaces in the body region and a termination oxide layer is formed to encircle the body region. Afterward, a polysilicon layer is deposited over all the exposed surfaces, and then selectively etched to form a plurality of poly gates in the DMOS trenches and a polysilicon plate having an extending portion toward the body region over the termination oxide layer. By using the termination polysilicon layer as an implantation mask, sources are formed in the body region. Afterward, an isolation layer and a source metal contact layer are deposited over the structure, in which the isolation layer is utilized to protect the polysilicon gates, and also the source metal contact layer is utilized to ground both the body region and the polysilicon plate.
摘要翻译：本发明的实施例提供了一种DMOS器件的端接结构及其形成方法。在形成端接结构时，提供其上形成有外延层的硅衬底。然后选择性地蚀刻通过掺杂外延层限定的体区，以在其中形成多个DMOS沟槽。此后，在体区域的暴露表面上形成栅极氧化物层，并且形成终止氧化物层以环绕身体区域。之后，在所有暴露的表面上沉积多晶硅层，然后选择性地蚀刻以在DMOS沟槽中形成多个多晶硅栅极，以及在端接氧化物层上具有朝向主体区域的延伸部分的多晶硅板。通过使用端接多晶硅层作为注入掩模，在体区中形成源。之后，在结构上沉积隔离层和源极金属接触层，其中隔离层用于保护多晶硅栅极，并且源极金属接触层用于接地体区域和多晶硅板。

9. 发明授权

US06660592B2 Fabricating a DMOS transistor 有权
公开(公告)号：US06660592B2
公开(公告)日：2003-12-09
申请号：US10160299
申请日：2002-05-29
申请人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Cheng-Tsung Ni
发明人： Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng , Cheng-Tsung Ni
IPC分类号： H01L21336
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/7802
摘要： Embodiment of the present invention are directed to improving the performance of a DMOS transistor. A method of fabricating a DMOS transistor comprises providing a semiconductor substrate having a gate oxide and a trenched gate, and implanting first conductive dopants into a surface of the semiconductor substrate adjacent to the trenched gate to form a first doping region. An insulating layer is deposited over the semiconductor substrate; and selectively etching the insulating layer to form a source contact window over a central portion of the first doping region and to leave an insulator structure above the trenched gate. The source contact window of the insulating layer has an enlarged top portion which is larger in size than a bottom portion of the source contact window closer to the first doping region than the enlarged top portion. The enlarged top portion is typically bowl-shaped. Second conductive dopants are implanted through the source contact window to form a second doping region in the central portion of the first doping region.

10. 发明授权

US07615442B2 Method for fabricating trench metal-oxide-semiconductor field effect transistor 有权
标题翻译：制造沟槽金属氧化物半导体场效应晶体管的方法
公开(公告)号：US07615442B2
公开(公告)日：2009-11-10
申请号：US11606100
申请日：2006-11-30
申请人： Hsin-Huang Hsieh , Mao-Song Tseng , Chien-Ping Chang
发明人： Hsin-Huang Hsieh , Mao-Song Tseng , Chien-Ping Chang
IPC分类号： H01L21/8242
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/4236 , H01L29/456 , H01L29/66727 , H01L29/66734
摘要： A method for fabricating a trench metal-oxide-semiconductor field effect transistor is disclosed. The method comprises steps of providing a substrate with an epitaxy layer thereon and etching the epitaxy layer to form a trench structure; forming a gate oxide layer on the surface of the epitaxy layer and the inner sidewalls of the trench structure and depositing a polysilicon layer to fill the trench structure; introducing a nitrogen gas and performing a driving-in procedure to form a body structure; performing an implantation procedure to form a source layer; forming a dielectric layer on the trench structure and the source layer; etching the dielectric layer and the source layer to define a source structure and form a contact region; filling the contact region with a contact structure layer; and forming a conductive metal layer on the contact structure layer and the dielectric layer.
摘要翻译：公开了一种制造沟槽金属氧化物半导体场效应晶体管的方法。该方法包括以下步骤：在衬底上提供外延层，并蚀刻外延层以形成沟槽结构; 在所述外延层的表面和所述沟槽结构的内侧壁上形成栅极氧化层，并沉积多晶硅层以填充所述沟槽结构; 引入氮气并执行驾驶过程以形成身体结构; 执行植入程序以形成源层; 在沟槽结构和源极层上形成电介质层; 蚀刻介电层和源层以限定源结构并形成接触区域; 用接触结构层填充接触区域; 以及在所述接触结构层和所述电介质层上形成导电金属层。

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