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1. 发明授权

US06985919B2 Time-recursive lattice structure for IFFT in DMT application 失效
公开(公告)号：US06985919B2
公开(公告)日：2006-01-10
申请号：US10135677
申请日：2002-04-30
申请人： Chi-Li Yu , An-Yeu Wu
发明人： Chi-Li Yu , An-Yeu Wu
IPC分类号： G06F17/14
CPC分类号： G06F17/142
摘要： The present invention may significantly reduce the number of iteration of the time recursive IFFT structure. First, the real and imaginary part of the input signal are modified based on the symmetric and anti-symmetric. Then, they are mixed together by an adder and fed into the lattice module. Next, an IFFT is performed on the modified input data sequence to generate a transformed sequence. Through the symmetric and anti-symmetric properties, the redundant terms may be eliminated.

2. 发明授权

US08321488B2 Singular value decomposing method and related singular value decomposing device 有权
标题翻译：奇异值分解方法及相关奇异值分解装置
公开(公告)号：US08321488B2
公开(公告)日：2012-11-27
申请号：US12264258
申请日：2008-11-04
申请人： Cheng-Zhou Zhan , Yen-Liang Chen , Ting-Jhun Jheng , An-Yeu Wu
发明人： Cheng-Zhou Zhan , Yen-Liang Chen , Ting-Jhun Jheng , An-Yeu Wu
IPC分类号： G06F17/16
CPC分类号： H04B7/0413 , H04L25/0208 , H04L25/0248
摘要： A method for performing a singular value decomposition (SVD) upon a matrix. The method includes the steps of: (a) simplifying the matrix to derive a simplified matrix; (b) performing an iterative matrix multiplication upon the simplified matrix to generate an iterated matrix; (c) extracting a vector of the iterated matrix according to an iteration number of the iterative matrix multiplication; (d) de-correlating the simplified matrix from the vector to update the simplified matrix; (e) repeating steps (b), (c), and (d) until a predetermined number of vectors have been derived; and (f) storing a first unitary matrix determined according to the predetermined number of vectors in the singular value decomposition.
摘要翻译：一种用于在矩阵上执行奇异值分解（SVD）的方法。该方法包括以下步骤：（a）简化矩阵以导出简化矩阵; （b）对所述简化矩阵执行迭代矩阵乘法以生成迭代矩阵; （c）根据迭代矩阵乘法的迭代次数提取迭代矩阵的向量; （d）将简化矩阵与向量去相关，以更新简化矩阵; （e）重复步骤（b），（c）和（d），直到导出预定数量的向量; 和（f）将根据预定数量的矢量确定的第一单位矩阵存储在奇异值分解中。

3. 发明申请

US20080019459A1 MULTILEVEL LINC TRANSMITTER 有权
标题翻译：多路LINC发射机
公开(公告)号：US20080019459A1
公开(公告)日：2008-01-24
申请号：US11757479
申请日：2007-06-04
申请人： Yuan-Jyue Chen , Kai-Yuan Jheng , An-Yeu Wu , Hen-Wai Tsao , Posen Tseng
发明人： Yuan-Jyue Chen , Kai-Yuan Jheng , An-Yeu Wu , Hen-Wai Tsao , Posen Tseng
IPC分类号： H04L25/49
CPC分类号： H03F1/0294 , H03F1/0205 , H03F1/025 , H03F3/24 , H03F2200/468
摘要： A multilevel LINC transmitter. The multilevel LINC transmitter comprises a multilevel signal component separator, a phase modulator block, and an RF block. The multilevel signal component separator comprises a multilevel scaler and converts a base band signal to constant envelope signals. The phase modulator block is coupled to the multilevel signal component separator. The RF block comprises a plurality of power amplifiers coupled to the phase modulator block and the multilevel scaler and a power combiner coupled to the power amplifiers.
摘要翻译：多级LINC发射机。多级LINC发射机包括多电平信号分量分离器，相位调制器模块和RF模块。多电平信号分量分离器包括多级定标器，并将基带信号转换为恒定包络信号。相位调制器块耦合到多电平信号分量分离器。 RF块包括耦合到相位调制器块和多电平校准器的多个功率放大器以及耦合到功率放大器的功率组合器。

4. 发明授权

US07602844B2 On-line step-size calculation using signal power estimation and tone grouping of the frequency-domain equalizer for DMT-based transceiver 有权
标题翻译：使用基于DMT的收发器的频域均衡器的信号功率估计和音调分组的在线步长计算
公开(公告)号：US07602844B2
公开(公告)日：2009-10-13
申请号：US11293139
申请日：2005-12-05
申请人： Chih-Feng Wu , Muh-Tian Shiue , Chorng-Kuang Wang , An-Yeu Wu
发明人： Chih-Feng Wu , Muh-Tian Shiue , Chorng-Kuang Wang , An-Yeu Wu
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03159 , H04L2025/03414 , H04L2025/03687
摘要： An efficient method for calculating the step-sizes for a frequency-domain equalizer of a discrete-multitone communications system using signal power estimation and tone grouping (SPE-TG) while on-line. The SPE-TG method is used to calculate a plurality of subchannel step-sizes which are then stored in a lookup table. When on-line, the method uses signal power estimation to select step sizes for each tone, and uses these step sizes for frequency domain equalization. The SPE-TG method simplifies the calculations necessary for frequency domain equalization, thereby saving significant hardware and/or processing resources. The SPE-TG method is reliable and robust, and does not depend upon assumptions about the line, location, or channel.
摘要翻译：一种用于在线上使用信号功率估计和音调分组（SPE-TG）来计算离散多音通信系统的频域均衡器的步长的有效方法。 SPE-TG方法用于计算多个子信道步长，然后存储在查找表中。当在线时，该方法使用信号功率估计来选择每个音调的步长，并且使用这些步长来进行频域均衡。 SPE-TG方法简化了频域均衡所需的计算，从而节省了大量的硬件和/或处理资源。 SPE-TG方法是可靠和鲁棒的，不依赖于关于线路，位置或频道的假设。

5. 发明授权

US07317755B2 Predicted parallel branch slicer and slicing method thereof 有权
标题翻译：预测并行分支切片机及其切片方法
公开(公告)号：US07317755B2
公开(公告)日：2008-01-08
申请号：US10442560
申请日：2003-05-21
申请人： Meng-Da Yang , An-Yeu Wu , Murphy Chen
发明人： Meng-Da Yang , An-Yeu Wu , Murphy Chen
IPC分类号： H03H7/30
CPC分类号： H04L5/12 , H04L2025/0349 , H04L2025/03592
摘要： A predicted parallel branch slicer for use in an adaptive decision feedback equalizer includes Mk adders commonly receiving a signal to be processed and respectively receiving Mk preset values, and performing respective addition operations to generate Mk output signals; Mk slicers in communication with the Mk adders, receiving and processing the Mk output signals to obtain Mk signals of Mk levels, respectively; a multiplexer in communication with the Mk slicers, receiving the signals of the Mk levels; and k delay units interconnected with one another in series and being in communication with the multiplexer, and generating k selection signals of different delay time in response to an output of the multiplexer, the selection signals being provided for the multiplexer to select one of the signals of the Mk levels to be outputted.
摘要翻译：用于自适应判决反馈均衡器的预测并行分支限幅器包括通常接收待处理信号并且分别接收M＆lt; k＆gt;预置值的M + 产生输出信号的操作; 与M +加法器通信的M＆lt; k＆gt;切片器，接收和处理M＆lt; k＆gt;输出信号以获得M＆lt; k + 分别为M＆lt; k＆gt;水平的信号; 与M＆lt;切片机通信的多路复用器，接收M＆lt; k＆gt;级的信号; 和k个延迟单元，其彼此串联并与多路复用器通信，并且响应多路复用器的输出产生不同延迟时间的k个选择信号，为多路复用器提供选择信号以选择一个信号的输出电平的电平。

6. 发明申请

US20050198089A1 Mixed-scaling-rotation CORDIC method with scaling-free rotational operations for vector rotation 审中-公开
标题翻译：混合缩放旋转CORDIC方法，具有无矢量旋转操作的矢量旋转
公开(公告)号：US20050198089A1
公开(公告)日：2005-09-08
申请号：US10793920
申请日：2004-03-08
申请人： Chih-Hsiu Lin , An-Yeu Wu
发明人： Chih-Hsiu Lin , An-Yeu Wu
IPC分类号： G06F7/00
CPC分类号： G06F7/5446
摘要： A method of mixed-scaling-rotation CORDIC (MSR-CORDIC) with scaling-free rotational operations is disclosed. An elementary angles set is extended by representing the elementary angles as the arctangent of the division of two single signed-power-of-two terms to an enhanced extended elementary angles set. A combination of elementary angles is found from the enhanced extended elementary angles set such that the residue angle error can be minimized. A MSR-CORDIC operation is used to perform the rotating and scaling transformation simultaneously.
摘要翻译：公开了一种具有无缩放旋转操作的混合缩放旋转CORDIC（MSR-CORDIC）的方法。通过将基本角表示为将两个单个有符号幂二项分解为增强扩展基本角度集的反正切来扩展基本角度集合。从增强的扩展基本角度集合中找到基本角度的组合，使得残余角度误差可以最小化。 MSR-CORDIC操作用于同时执行旋转和缩放转换。

7. 发明授权

US06697424B1 Fast convergent pipelined adaptive decision feedback equalizer using post-cursor processing filter 有权
标题翻译：快速收敛流水线自适应判决反馈均衡器，采用后置处理过滤器
公开(公告)号：US06697424B1
公开(公告)日：2004-02-24
申请号：US10429776
申请日：2003-05-06
申请人： Meng-Da Yang , An-Yeu Wu
发明人： Meng-Da Yang , An-Yeu Wu
IPC分类号： H03H730
CPC分类号： H04L25/03057 , H04L2025/0349 , H04L2025/03617
摘要： A fast convergent pipeline adaptive decision feedback equalizer using a post-cursor processing filter is disclosed, which includes a feed-forward equalizer, a post-cursor processing filter, an adder, a slicer, a register, a pipelined feedback equalizer, a subtractor and a updating device. The pipelined feedback equalizer has a delay device coupled to the register for delaying its output signal, and a feedback equalizer coupled to the delay device for eliminating the post-cursor of the output signal. By using the post-cursor processing filter (PCF), it increases the operating clock rate with arbitrary speedup factor, and improves the convergence rate of the overall system.
摘要翻译：公开了一种使用后置光标处理滤波器的快速收敛流水线自适应判决反馈均衡器，其包括前馈均衡器，后置光标处理滤波器，加法器，限幅器，寄存器，流水线反馈均衡器，减法器和更新装置。流水线反馈均衡器具有耦合到寄存器以用于延迟其输出信号的延迟器件，以及耦合到延迟器件的反馈均衡器，用于消除输出信号的后置光标。通过使用后处理过滤器（PCF），以任意的加速因子提高了操作时钟速率，提高了整个系统的收敛速度。

8. 发明授权

US07545871B2 Discrete multi-tone system having DHT-based frequency-domain equalizer 有权
标题翻译：具有基于DHT的频域均衡器的离散多音系统
公开(公告)号：US07545871B2
公开(公告)日：2009-06-09
申请号：US11361374
申请日：2006-02-24
申请人： Chih-Feng Wu , Muh-Tian Shiue , Chorng-Kuang Wang , An-Yeu Wu
发明人： Chih-Feng Wu , Muh-Tian Shiue , Chorng-Kuang Wang , An-Yeu Wu
IPC分类号： H04L27/28 , H04B1/10
CPC分类号： H04L25/03159 , H04L27/2626 , H04L27/2647 , H04L2025/03414 , H04L2025/03617 , H04L2025/0377
摘要： A discrete multi-tone (DMT) communication system is provided herein, replacing the conventional inversed discrete Fourier transform (IDFT) and DFT with IDHT (together with the complex-to-real transformation) and a DHT alone respectively at the transmitting end and the receiving end. A DHT-based frequency-domain equalizer (FEQ) at the receiving end equalizes each of the 0-th to (N−1)-th DHT subchannels, where N is the number of point of the DHT. Finally, each of the 0-th to ( N 2 - 1 ) - th subchannels of the DMT system is obtained by combining the k-th and (N-k)-th subchannels of the DHT-based FEQ for k=0, 1, . . . , ( N 2 - 1 ) .
摘要翻译：本文提供了一种离散多音（DMT）通信系统，其代替传统的反向离散付里叶变换（IDFT）和IDHT（以及复数到实际变换）和DHT分别在发送端和接收端。在接收端的基于DHT的频域均衡器（FEQ）对第0至第（N-1）个DHT子信道中的每一个进行均衡，其中N是DHT的点数。最后，每个0到<数学id =“MATH-US-00001”num =“00001”> $（2-1通过将第k和（Nk）组合，获得DMT系统的子信道，获得）基于DHT的FEQ的子信道，k = 0,1，...。。。，（2-1）。$

9. 发明申请

US20080159454A1 Network on chip device and on-chip data transmission device 审中-公开
标题翻译：片上设备和片上数据传输设备
公开(公告)号：US20080159454A1
公开(公告)日：2008-07-03
申请号：US11645722
申请日：2006-12-27
申请人： Jhao-Ji Ye , You-Gang Chen , An-Yeu Wu
发明人： Jhao-Ji Ye , You-Gang Chen , An-Yeu Wu
IPC分类号： H04L7/00
CPC分类号： H04L7/0012 , G06F15/7825 , H04L7/0045
摘要： An on-chip data transmission device. The on-chip data transmission device comprises a transmitter and a receiver. The transmitter transmits a control signal and a packet when a logic level of the control signal changes, wherein the logic level of the control signal changes every clock cycle, and the clock cycle is determined by an input signal clock A. The receiver receives the transmitted control signal and a clock B having a clock rate as same as clock A, generates a mixed clock having a phase substantially the same as the phase of the clock B, and receives one transmitted packet per clock B cycle.
摘要翻译：片上数据传输装置。片上数据传输设备包括发射机和接收机。当控制信号的逻辑电平改变时，发射机发送控制信号和分组，其中控制信号的逻辑电平每个时钟周期改变，并且时钟周期由输入信号时钟A确定。接收机接收所发送的控制信号和具有与时钟A相同的时钟频率的时钟B产生具有与时钟B的相位基本相同的相位的混合时钟，并且每时钟B周期接收一个发送的分组。

10. 发明申请

US20070201574A1 Discrete multi-tone system having DHT-based frequency-domain equalizer 有权
标题翻译：具有基于DHT的频域均衡器的离散多音系统
公开(公告)号：US20070201574A1
公开(公告)日：2007-08-30
申请号：US11361374
申请日：2006-02-24
申请人： Chih-Feng Wu , Muh-Tian Shiue , Chorng-Kuang Wang , An-Yeu Wu
发明人： Chih-Feng Wu , Muh-Tian Shiue , Chorng-Kuang Wang , An-Yeu Wu
IPC分类号： H04L5/12 , H04B1/10
CPC分类号： H04L25/03159 , H04L27/2626 , H04L27/2647 , H04L2025/03414 , H04L2025/03617 , H04L2025/0377
摘要： A discrete multi-tone (DMT) communication system is provided herein, replacing the conventional inversed discrete Fourier transform (IDFT) and DFT with IDHT (together with the complex-to-real transformation) and a DHT alone respectively at the transmitting end and the receiving end. A DHT-based frequency-domain equalizer (FEQ) at the receiving end equalizes each of the 0-th to (N−1)-th DHT subchannels, where N is the number of point of the DHT. Finally, each of the 0-th to (N/2−1)-th subchannels of the DMT system is obtained by combining the k-th and (N-k)-th subchannels of the DHT-based FEQ for k=0, 1, . . . , (N/2−1).
摘要翻译：本文提供了一种离散多音（DMT）通信系统，其代替传统的反向离散付里叶变换（IDFT）和IDHT（以及复数到实际变换）和DHT分别在发送端和接收端。在接收端的基于DHT的频域均衡器（FEQ）对第0至第（N-1）个DHT子信道中的每一个进行均衡，其中N是DHT的点数。最后，通过组合基于DHT的FEQ的第k个和第（Nk）个子信道来获得DMT系统的第0至第（N / 2-1）个子信道中的每一个，用于k = 0,1 ，。。。，（N / 2-1）。

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