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1. 发明授权

US08872345B2 Forming grounded through-silicon vias in a semiconductor substrate 有权
标题翻译：在半导体衬底中形成接地的硅通孔
公开(公告)号：US08872345B2
公开(公告)日：2014-10-28
申请号：US13178079
申请日：2011-07-07
申请人： Chi-Chun Hsieh , Wei-Cheng Wu , Hsiao-Tsung Yen , Hsien-Pin Hu , Shang-Yun Hou , Shin-Puu Jeng
发明人： Chi-Chun Hsieh , Wei-Cheng Wu , Hsiao-Tsung Yen , Hsien-Pin Hu , Shang-Yun Hou , Shin-Puu Jeng
IPC分类号： H01L23/48 , H01L21/283 , H01L21/74
CPC分类号： H01L23/481 , H01L21/743 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： A method of forming an interposer includes providing a semiconductor substrate, the semiconductor substrate having a front surface and a back surface opposite the front surface; forming one or more through-silicon vias (TSVs) extending from the front surface into the semiconductor substrate; forming an inter-layer dielectric (ILD) layer overlying the front surface of the semiconductor substrate and the one or more TSVs; and forming an interconnect structure in the ILD layer, the interconnect structure electrically connecting the one or more TSVs to the semiconductor substrate.
摘要翻译：形成插入件的方法包括提供半导体衬底，该半导体衬底具有与前表面相对的前表面和后表面; 形成从所述前表面延伸到所述半导体衬底中的一个或多个穿硅通孔（TSV）; 形成覆盖所述半导体衬底的前表面和所述一个或多个TSV的层间介电层（ILD）层; 以及在所述ILD层中形成互连结构，所述互连结构将所述一个或多个TSV电连接到所述半导体衬底。

2. 发明申请

US20120049322A1 Cylindrical Embedded Capacitors 有权
标题翻译：圆柱嵌入式电容器
公开(公告)号：US20120049322A1
公开(公告)日：2012-03-01
申请号：US12873931
申请日：2010-09-01
申请人： An-Jhih Su , Chi-Chun Hsieh , Tzu-Yu Wang , Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Wei-Chih Chiou , Shin-Puu Jeng
发明人： An-Jhih Su , Chi-Chun Hsieh , Tzu-Yu Wang , Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Wei-Chih Chiou , Shin-Puu Jeng
IPC分类号： H01L29/92 , H01L21/768
CPC分类号： H01L28/40 , H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/14 , H01L28/92 , H01L2224/0401 , H01L2224/05008 , H01L2224/0557 , H01L2224/13025 , H01L2224/13099 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14181 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate.
摘要翻译：一种装置包括具有与前表面相对的前表面和后表面的基底。电容器形成在衬底中，并包括第一电容器板; 围绕所述第一电容器板的第一绝缘层; 以及环绕所述第一绝缘层的第二电容器板。第一电容器板，第一绝缘层和第二电容器板中的每一个从衬底的前表面延伸到后表面。

3. 发明授权

US08693163B2 Cylindrical embedded capacitors 有权
标题翻译：圆柱形嵌入式电容器
公开(公告)号：US08693163B2
公开(公告)日：2014-04-08
申请号：US12873931
申请日：2010-09-01
申请人： An-Jhih Su , Chi-Chun Hsieh , Tzu-Yu Wang , Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng
发明人： An-Jhih Su , Chi-Chun Hsieh , Tzu-Yu Wang , Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng
IPC分类号： H01L29/92 , H01L21/768
CPC分类号： H01L28/40 , H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/14 , H01L28/92 , H01L2224/0401 , H01L2224/05008 , H01L2224/0557 , H01L2224/13025 , H01L2224/13099 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14181 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate.
摘要翻译：一种装置包括具有与前表面相对的前表面和后表面的基底。电容器形成在衬底中，并包括第一电容器板; 围绕所述第一电容器板的第一绝缘层; 以及环绕所述第一绝缘层的第二电容器板。第一电容器板，第一绝缘层和第二电容器板中的每一个从基板的前表面延伸到后表面。

4. 发明申请

US20110277655A1 Forming Interconnect Structures Using Pre-Ink-Printed Sheets 有权
标题翻译：使用预墨水打印纸形成互连结构
公开(公告)号：US20110277655A1
公开(公告)日：2011-11-17
申请号：US12778867
申请日：2010-05-12
申请人： Francis Ko , Chi-Chun Hsieh , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Francis Ko , Chi-Chun Hsieh , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： B41F33/00
CPC分类号： H01L23/5384 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49822 , H01L23/49827 , H01L23/49883 , H01L23/525 , H01L23/5328 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/05572 , H01L2224/13009 , H01L2224/13147 , H01L2224/13644 , H01L2224/13655 , H01L2224/14181 , H01L2924/00014 , H01L2924/0002 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： A method of forming a device includes printing conductive patterns on a dielectric sheet to form a pre-ink-printed sheet, and bonding the pre-ink-printed sheet onto a side of a substrate. The conductive feature includes a through-substrate via extending from a first major side of the substrate to a second major side of the substrate opposite the first major side. A conductive paste is then applied to electrically couple conductive patterns to a conductive feature in the substrate.
摘要翻译：形成器件的方法包括在电介质片上印刷导电图案以形成预先印墨的片材，以及将预印墨片材粘合到基片的一侧上。导电特征包括从衬底的第一主侧延伸到与第一主侧相对的衬底的第二主侧的贯通衬底。然后施加导电膏以将导电图案电耦合到衬底中的导电特征。

5. 发明授权

US08716867B2 Forming interconnect structures using pre-ink-printed sheets 有权
标题翻译：使用预先印墨的薄片形成互连结构
公开(公告)号：US08716867B2
公开(公告)日：2014-05-06
申请号：US12778867
申请日：2010-05-12
申请人： Francis Ko , Chi-Chun Hsieh , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Francis Ko , Chi-Chun Hsieh , Shang-Yun Hou , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： B41F33/00
CPC分类号： H01L23/5384 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49822 , H01L23/49827 , H01L23/49883 , H01L23/525 , H01L23/5328 , H01L24/05 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/05572 , H01L2224/13009 , H01L2224/13147 , H01L2224/13644 , H01L2224/13655 , H01L2224/14181 , H01L2924/00014 , H01L2924/0002 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： A method of forming a device includes printing conductive patterns on a dielectric sheet to form a pre-ink-printed sheet, and bonding the pre-ink-printed sheet onto a side of a substrate. The conductive feature includes a through-substrate via extending from a first major side of the substrate to a second major side of the substrate opposite the first major side. A conductive paste is then applied to electrically couple conductive patterns to a conductive feature in the substrate.
摘要翻译：形成器件的方法包括在电介质片上印刷导电图案以形成预先印墨的片材，以及将预印墨片材粘合到基片的一侧上。导电特征包括从衬底的第一主侧延伸到与第一主侧相对的衬底的第二主侧的贯通衬底。然后施加导电膏以将导电图案电耦合到衬底中的导电特征。

6. 发明授权

US08294264B2 Radiate under-bump metallization structure for semiconductor devices 有权
标题翻译：用于半导体器件的辐射凸块下金属化结构
公开(公告)号：US08294264B2
公开(公告)日：2012-10-23
申请号：US12750221
申请日：2010-03-30
申请人： Tzu-Yu Wang , Chi-Chun Hsieh , An-Jhih Su , Hsien-Wei Chen , Shin-Puu Jeng , Liwei Lin
发明人： Tzu-Yu Wang , Chi-Chun Hsieh , An-Jhih Su , Hsien-Wei Chen , Shin-Puu Jeng , Liwei Lin
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L24/05 , H01L24/03 , H01L24/04 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/03828 , H01L2224/0401 , H01L2224/05551 , H01L2224/05552 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/13007 , H01L2224/13015 , H01L2224/13111 , H01L2224/13116 , H01L2224/16145 , H01L2224/16225 , H01L2224/97 , H01L2225/06513 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： An under-bump metallization (UBM) structure for a semiconductor device is provided. The UBM structure has a center portion and extensions extending out from the center portion. The extensions may have any suitable shape, including a quadrangle, a triangle, a circle, a fan, a fan with extensions, or a modified quadrangle having a curved surface. Adjacent UBM structures may have the respective extensions aligned or rotated relative to each other. Flux may be applied to a portion of the extensions to allow an overlying conductive bump to adhere to a part of the extensions.
摘要翻译：提供了一种用于半导体器件的凸块下金属化（UBM）结构。 UBM结构具有从中心部分延伸出的中心部分和延伸部分。延伸部可以具有任何合适的形状，包括四边形，三角形，圆形，风扇，具有延伸部的风扇或具有弯曲表面的改进的四边形。相邻的UBM结构可以具有相对于彼此对准或旋转的相应延伸部。焊剂可以施加到延伸部分的一部分，以允许覆盖的导电凸块粘附到延伸部分的一部分上。

7. 发明申请

US20110241201A1 Radiate Under-Bump Metallization Structure for Semiconductor Devices 有权
标题翻译：辐射半导体器件的欠冲击金属化结构
公开(公告)号：US20110241201A1
公开(公告)日：2011-10-06
申请号：US12750221
申请日：2010-03-30
申请人： Tzu-Yu Wang , Chi-Chun Hsieh , An-Jhih Su , Hsien-Wei Chen , Shin-Puu Jeng , Liwei Lin
发明人： Tzu-Yu Wang , Chi-Chun Hsieh , An-Jhih Su , Hsien-Wei Chen , Shin-Puu Jeng , Liwei Lin
IPC分类号： H01L23/498 , H01L21/768
CPC分类号： H01L24/05 , H01L24/03 , H01L24/04 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/03828 , H01L2224/0401 , H01L2224/05551 , H01L2224/05552 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/13007 , H01L2224/13015 , H01L2224/13111 , H01L2224/13116 , H01L2224/16145 , H01L2224/16225 , H01L2224/97 , H01L2225/06513 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： An under-bump metallization (UBM) structure for a semiconductor device is provided. The UBM structure has a center portion and extensions extending out from the center portion. The extensions may have any suitable shape, including a quadrangle, a triangle, a circle, a fan, a fan with extensions, or a modified quadrangle having a curved surface. Adjacent UBM structures may have the respective extensions aligned or rotated relative to each other. Flux may be applied to a portion of the extensions to allow an overlying conductive bump to adhere to a part of the extensions.
摘要翻译：提供了一种用于半导体器件的凸块下金属化（UBM）结构。 UBM结构具有从中心部分延伸出的中心部分和延伸部分。延伸部可以具有任何合适的形状，包括四边形，三角形，圆形，风扇，具有延伸部的风扇或具有弯曲表面的改进的四边形。相邻的UBM结构可以具有相对于彼此对准或旋转的相应延伸部。焊剂可以施加到延伸部分的一部分，以允许覆盖的导电凸块粘附到延伸部分的一部分上。

8. 发明申请

US20070120113A1 Supramolecular structures and method for forming the same 审中-公开
标题翻译：超分子结构及其形成方法
公开(公告)号：US20070120113A1
公开(公告)日：2007-05-31
申请号：US11287309
申请日：2005-11-28
申请人： King-Fu Lin , Chi-Chun Hsieh
发明人： King-Fu Lin , Chi-Chun Hsieh
IPC分类号： H01L51/00 , C07D495/02 , C07D409/14
CPC分类号： C07C309/32
摘要： A primary supramolecular structure is described. The primary supramolecular structure has a shape of ring-like disk. The shape of ring-like disk has a diameter of about 10 nanometers to about 60 nanometers. The mentioned primary supramolecular structure is formed by self-assembly of amphiphilic conjugate molecules. Moreover, a secondary supramolecular structure is described. The secondary supramolecular structure has a shape of ring-like disk. The shape of ring-like disk has a diameter of about 100 nanometers to about 300 nanometers. The mentioned secondary supramolecular structure is formed by self-assembly of amphiphilic conjugate molecules hybrid with metal alkoxides or non-metal alkoxides.
摘要翻译：描述了一个主要的超分子结构。主要的超分子结构具有环状盘的形状。环形盘的形状具有约10纳米至约60纳米的直径。所述的主要超分子结构通过两亲性共轭分子的自组装形成。此外，描述了次级超分子结构。次级超分子结构具有环状圆盘形状。环形盘的形状具有约100纳米至约300纳米的直径。所述的次级超分子结构通过与金属醇盐或非金属醇盐杂交的两亲性缀合物分子的自组装形成。

9. 发明授权

US07851234B2 System and method for enhanced control of copper trench sheet resistance uniformity 有权
标题翻译：增强铜沟片片电阻均匀性控制的系统和方法
公开(公告)号：US07851234B2
公开(公告)日：2010-12-14
申请号：US11947380
申请日：2007-11-29
申请人： Francis Ko , Jean Wang , Henry Lo , Chi-Chun Hsieh , Amy Wang
发明人： Francis Ko , Jean Wang , Henry Lo , Chi-Chun Hsieh , Amy Wang
IPC分类号： G06F19/00
CPC分类号： H01L22/20 , H01L22/14
摘要： A method is disclosed for controlling the sheet resistance of copper trenches formed on semiconductor wafers. The method includes forming a plurality of copper-filled trenches on a wafer, measuring the sheet resistance of each of the plurality of copper-filled trenches, and comparing the measured sheet resistance values to a predetermined sheet resistance value. Photolithography steps performed on subsequent wafers are adjusted according to a difference between the measured sheet resistance values and the predetermined value. In one embodiment, this adjustment takes the form of adjusting a photolithographic extension exposure energy to thereby adjust the cross-section of the resulting trenches.
摘要翻译：公开了一种用于控制形成在半导体晶片上的铜沟槽的薄层电阻的方法。该方法包括在晶片上形成多个铜填充沟槽，测量多个填充铜的沟槽中的每一个的薄层电阻，并将测得的薄层电阻值与预定薄层电阻值进行比较。根据测量的薄层电阻值和预定值之间的差异来调整在随后的晶片上执行的光刻步骤。在一个实施例中，该调整采取调整光刻延伸曝光能量的形式，从而调节所得到的沟槽的横截面。

10. 发明申请

US20090142860A1 SYSTEM AND METHOD FOR ENHANCED CONTROL OF COPPER TRENCH SHEET RESISTANCE UNIFORMITY 有权
标题翻译：增强铜镀层电阻均匀性的系统与方法
公开(公告)号：US20090142860A1
公开(公告)日：2009-06-04
申请号：US11947380
申请日：2007-11-29
申请人： Francis Ko , Jean Wang , Henry Lo , Chi-Chun Hsieh , Amy Wang
发明人： Francis Ko , Jean Wang , Henry Lo , Chi-Chun Hsieh , Amy Wang
IPC分类号： H01L21/66
CPC分类号： H01L22/20 , H01L22/14
摘要： A method is disclosed for controlling the sheet resistance of copper trenches formed on semiconductor wafers. The method includes forming a plurality of copper-filled trenches on a wafer, measuring the sheet resistance of each of the plurality of copper-filled trenches, and comparing the measured sheet resistance values to a predetermined sheet resistance value. Photolithography steps performed on subsequent wafers are adjusted according to a difference between the measured sheet resistance values and the predetermined value. In one embodiment, this adjustment takes the form of adjusting a photolithographic extension exposure energy to thereby adjust the cross-section of the resulting trenches.
摘要翻译：公开了一种用于控制形成在半导体晶片上的铜沟槽的薄层电阻的方法。该方法包括在晶片上形成多个铜填充沟槽，测量多个填充铜的沟槽中的每一个的薄层电阻，并将测得的薄层电阻值与预定薄层电阻值进行比较。根据测量的薄层电阻值和预定值之间的差异来调整在随后的晶片上执行的光刻步骤。在一个实施例中，该调整采取调整光刻延伸曝光能量的形式，从而调节所得到的沟槽的横截面。

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