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1. 发明申请

US20080286976A1 Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching method 审中-公开
标题翻译：在半导体制造工艺和蚀刻方法中去除栅电极上的金属硅化物层的方法
公开(公告)号：US20080286976A1
公开(公告)日：2008-11-20
申请号：US12138428
申请日：2008-06-13
申请人： Cheng-Kuen Chen , Chih-Ning Wu , Wei-Tsun Shiau , Wen-Fu Yu
发明人： Cheng-Kuen Chen , Chih-Ning Wu , Wei-Tsun Shiau , Wen-Fu Yu
IPC分类号： H01L21/461
CPC分类号： H01L29/66507 , H01L21/28079 , H01L21/28088 , H01L21/28097 , H01L21/32134 , H01L21/32137 , H01L29/66545
摘要： A method of removing a metal suicide layer on a gate electrode in a semiconductor manufacturing process is disclosed, in which the gate electrode, a metal silicide layer, a spacer, a silicon nitride cap layer, and a dielectric layer have been formed. The method includes performing a chemical mechanical polishing process to polish the dielectric layer using the silicon nitride cap layer as a polishing stop layer to expose the silicon nitride cap layer over the gate electrode; removing the exposed silicon nitride cap layer to expose the metal silicide layer; and performing a first etching process to remove the metal silicide layer on the gate electrode.
摘要翻译：公开了一种在半导体制造工艺中去除栅电极上的金属硅化物层的方法，其中已经形成了栅极，金属硅化物层，间隔物，氮化硅覆盖层和电介质层。该方法包括使用氮化硅盖层作为抛光停止层进行化学机械抛光工艺以抛光电介质层，以在栅电极上露出氮化硅覆盖层; 去除暴露的氮化硅覆盖层以暴露金属硅化物层; 并执行第一蚀刻工艺以去除栅电极上的金属硅化物层。

2. 发明授权

US07544621B2 Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching method 有权
标题翻译：在半导体制造工艺和蚀刻方法中去除栅电极上的金属硅化物层的方法
公开(公告)号：US07544621B2
公开(公告)日：2009-06-09
申请号：US11163849
申请日：2005-11-01
申请人： Cheng-Kuen Chen , Chih-Ning Wu , Wei-Tsun Shiau , Wen-Fu Yu
发明人： Cheng-Kuen Chen , Chih-Ning Wu , Wei-Tsun Shiau , Wen-Fu Yu
IPC分类号： H01L21/302
CPC分类号： H01L29/66507 , H01L21/28079 , H01L21/28088 , H01L21/28097 , H01L21/32134 , H01L21/32137 , H01L29/66545
摘要： A method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process is disclosed, in which the gate electrode, a metal silicide layer, a spacer, a silicon nitride cap layer, and a dielectric layer have been formed. The method includes performing a chemical mechanical polishing process to polish the dielectric layer using the silicon nitride cap layer as a polishing stop layer to expose the silicon nitride cap layer over the gate electrode; removing the exposed silicon nitride cap layer to expose the metal silicide layer; and performing a first etching process to remove the metal silicide layer on the gate electrode.
摘要翻译：公开了一种在半导体制造工艺中去除栅电极上的金属硅化物层的方法，其中已经形成了栅极，金属硅化物层，间隔物，氮化硅覆盖层和电介质层。该方法包括使用氮化硅盖层作为抛光停止层进行化学机械抛光工艺以抛光电介质层，以在栅电极上露出氮化硅覆盖层; 去除暴露的氮化硅覆盖层以暴露金属硅化物层; 并执行第一蚀刻工艺以去除栅电极上的金属硅化物层。

3. 发明申请

US20070099423A1 Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching method 有权
标题翻译：在半导体制造工艺和蚀刻方法中去除栅电极上的金属硅化物层的方法
公开(公告)号：US20070099423A1
公开(公告)日：2007-05-03
申请号：US11163849
申请日：2005-11-01
申请人： Cheng-Kuen Chen , Chih-Ning Wu , Wei-Tsun Shiau , Wen-Fu Yu
发明人： Cheng-Kuen Chen , Chih-Ning Wu , Wei-Tsun Shiau , Wen-Fu Yu
IPC分类号： H01L21/302 , C03C25/68 , B44C1/22 , C03C15/00
CPC分类号： H01L29/66507 , H01L21/28079 , H01L21/28088 , H01L21/28097 , H01L21/32134 , H01L21/32137 , H01L29/66545
摘要： A method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process is disclosed, in which the gate electrode, a metal silicide layer, a spacer, a silicon nitride cap layer, and a dielectric layer have been formed. The method includes performing a chemical mechanical polishing process to polish the dielectric layer using the silicon nitride cap layer as a polishing stop layer to expose the silicon nitride cap layer over the gate electrode; removing the exposed silicon nitride cap layer to expose the metal silicide layer; and performing a first etching process to remove the metal silicide layer on the gate electrode.
摘要翻译：公开了一种在半导体制造工艺中去除栅电极上的金属硅化物层的方法，其中已经形成了栅极，金属硅化物层，间隔物，氮化硅覆盖层和电介质层。该方法包括使用氮化硅盖层作为抛光停止层进行化学机械抛光工艺以抛光电介质层，以在栅电极上露出氮化硅覆盖层; 去除暴露的氮化硅覆盖层以暴露金属硅化物层; 并执行第一蚀刻工艺以去除栅电极上的金属硅化物层。

4. 发明授权

US07338910B2 Method of fabricating semiconductor devices and method of removing a spacer 有权
标题翻译：制造半导体器件的方法和去除间隔物的方法
公开(公告)号：US07338910B2
公开(公告)日：2008-03-04
申请号：US11162952
申请日：2005-09-29
申请人： Chung-Ju Lee , Chih-Ning Wu , Wei-Tsun Shiau
发明人： Chung-Ju Lee , Chih-Ning Wu , Wei-Tsun Shiau
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76834 , H01L21/28518 , H01L21/31111
摘要： A method of fabricating a semiconductor device is disclosed. The method includes defining an electrode on a semiconductor substrate; forming a spacer on at least one sidewall of the electrode; performing a process operation on the semiconductor substrate using the spacer as a mask and forming a material layer on the top or the surface of the semiconductor substrate and the electrode; and removing the spacer by steps of performing a wet etching process at a temperature in a range of 100° C. to 150° C. to etch the spacer using an acid solution containing phosphoric acid as an etchant. With respect to another aspect, a method of removing a spacer is also disclosed. The method includes performing a wet etching process at a temperature in a range of 100° C. to 150° C. to etch the spacer using an acid solution containing phosphoric acid as an etchant.
摘要翻译：公开了制造半导体器件的方法。该方法包括在半导体衬底上限定电极; 在所述电极的至少一个侧壁上形成间隔物; 在所述半导体衬底上使用所述间隔件作为掩模进行处理操作，并在所述半导体衬底和所述电极的顶部或表面上形成材料层; 并且通过在100℃至150℃的温度范围内进行湿蚀刻工艺的步骤去除间隔物，以使用含有磷酸作为蚀刻剂的酸溶液蚀刻间隔物。关于另一方面，还公开了一种去除间隔物的方法。该方法包括在100℃至150℃范围内的温度下进行湿蚀刻工艺，以使用含有磷酸作为蚀刻剂的酸溶液蚀刻间隔物。

5. 发明申请

US20070075379A1 Metal-oxide-semiconductor transistor device 审中-公开
标题翻译：金属氧化物半导体晶体管器件
公开(公告)号：US20070075379A1
公开(公告)日：2007-04-05
申请号：US11380212
申请日：2006-04-26
申请人： Chih-Ning Wu , Chung - Ju Lee , Wei-Tsun Shiau
发明人： Chih-Ning Wu , Chung - Ju Lee , Wei-Tsun Shiau
IPC分类号： H01L21/20 , H01L29/76
CPC分类号： H01L29/665 , H01L21/28518 , H01L29/6653 , H01L29/6659 , H01L29/7843
摘要： A metal-oxide-semiconductor transistor device is disclosed, in which, a silicon nitride spacer has been formed but is removed after an ion implantation process to form a source/drain region and a salicide process to form a metal silicide layer on the surface of the source/drain region and the gate electrode are performed. The metal silicide layer comprises silicon, nickel and at least one metal selected from a group consisting of iridium, iron, cobalt, platinum, palladium, molybdenum, and tantalum; therefore, when the silicon nitride spacer is removed by etching, the metal silicide layer is not damaged.
摘要翻译：公开了一种金属氧化物半导体晶体管器件，其中已经形成了氮化硅间隔物，但是在离子注入工艺之后被去除以形成源极/漏极区域和自对准硅化物工艺以在其表面上形成金属硅化物层源极/漏极区域和栅极电极。金属硅化物层包括硅，镍和选自铱，铁，钴，铂，钯，钼和钽中的至少一种金属; 因此，当通过蚀刻除去氮化硅间隔物时，金属硅化物层不被损坏。

6. 发明申请

US20070072402A1 Method of fabricating semiconductor devices and method of removing a spacer 有权
标题翻译：制造半导体器件的方法和去除间隔物的方法
公开(公告)号：US20070072402A1
公开(公告)日：2007-03-29
申请号：US11162952
申请日：2005-09-29
申请人： Chung - Ju Lee , Chih-Ning Wu , Wei-Tsun Shiau
发明人： Chung - Ju Lee , Chih-Ning Wu , Wei-Tsun Shiau
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L21/76834 , H01L21/28518 , H01L21/31111
摘要： A method of fabricating a semiconductor device is disclosed. The method includes defining an electrode on a semiconductor substrate; forming a spacer on at least one sidewall of the electrode; performing a process operation on the semiconductor substrate using the spacer as a mask and forming a material layer on the top or the surface of the semiconductor substrate and the electrode; and removing the spacer by steps of performing a wet etching process at a temperature in a range of 100° C. to 150° C. to etch the spacer using an acid solution containing phosphoric acid as an etchant. With respect to another aspect, a method of removing a spacer is also disclosed. The method includes performing a wet etching process at a temperature in a range of 100° C. to 150° C. to etch the spacer using an acid solution containing phosphoric acid as an etchant.
摘要翻译：公开了制造半导体器件的方法。该方法包括在半导体衬底上限定电极; 在所述电极的至少一个侧壁上形成间隔物; 在所述半导体衬底上使用所述间隔件作为掩模进行处理操作，并在所述半导体衬底和所述电极的顶部或表面上形成材料层; 并且通过在100℃至150℃的温度范围内进行湿蚀刻工艺的步骤去除间隔物，以使用含有磷酸作为蚀刻剂的酸溶液蚀刻间隔物。关于另一方面，还公开了一种去除间隔物的方法。该方法包括在100℃至150℃范围内的温度下进行湿蚀刻工艺，以使用含有磷酸作为蚀刻剂的酸溶液蚀刻间隔物。

7. 发明申请

US20070072378A1 Method of manufacturing metal-oxide-semiconductor transistor devices 审中-公开
标题翻译：制造金属氧化物半导体晶体管器件的方法
公开(公告)号：US20070072378A1
公开(公告)日：2007-03-29
申请号：US11463299
申请日：2006-08-08
申请人： Chih-Ning Wu , Chung - Ju Lee , Wei-Tsun Shiau
发明人： Chih-Ning Wu , Chung - Ju Lee , Wei-Tsun Shiau
IPC分类号： H01L21/336 , H01L21/4763
CPC分类号： H01L29/665 , H01L21/28518 , H01L29/6653 , H01L29/6659 , H01L29/7843
摘要： A method of manufacturing a metal-oxide-semiconductor transistor device is disclosed. In the method, a silicon nitride spacer is formed and will be removed after an ion implantation process used to form a source/drain region and a salicide process used to form a metal silicide layer on the surface of the source/drain region and the gate electrode. The metal silicide layer is formed to comprise silicon (Si), nickel (Ni) and at least one metal selected from a group consisting of iridium (Ir), iron (Fe), cobalt (Co), platinum (Pt), palladium (Pd), molybdenum (Mo), and tantalum (Ta); therefore, when the silicon nitride spacer is removed by etching, the metal silicide layer is not damaged.
摘要翻译：公开了一种制造金属氧化物半导体晶体管器件的方法。在该方法中，形成氮化硅间隔物，并且在用于形成源极/漏极区域的离子注入工艺和用于在源极/漏极区域和栅极的表面上形成金属硅化物层的自对准硅化物工艺之后将被去除电极。金属硅化物层形成为包括硅（Si），镍（Ni）和选自铱（Ir），铁（Fe），钴（Co），铂（Pt），钯（ Pd），钼（Mo）和钽（Ta）; 因此，当通过蚀刻除去氮化硅间隔物时，金属硅化物层不被损坏。

8. 发明授权

US07491615B2 Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors 有权
标题翻译：制造应变硅晶体管和应变硅CMOS晶体管的方法
公开(公告)号：US07491615B2
公开(公告)日：2009-02-17
申请号：US11162798
申请日：2005-09-23
申请人： Chih-Ning Wu , Hsin Tai , Chung-Ju Lee , Wei-Tsun Shiau
发明人： Chih-Ning Wu , Hsin Tai , Chung-Ju Lee , Wei-Tsun Shiau
IPC分类号： H01L21/336
CPC分类号： H01L21/823807 , H01L21/823814 , H01L29/165 , H01L29/6653 , H01L29/6656 , H01L29/66636 , H01L29/7848
摘要： A method of fabricating strained-silicon transistors includes providing a semiconductor substrate, in which the semiconductor substrate contains a gate structure thereon; performing an etching process to form two recesses corresponding to the gate structure within the semiconductor substrate; performing an oxygen flush on the semiconductor substrate; performing a cleaning process on the semiconductor substrate; and performing a selective epitaxial growth (SEG) to form an epitaxial layer in each recess for forming a source/drain region.
摘要翻译：制造应变硅晶体管的方法包括：提供半导体衬底，其中半导体衬底在其上包含栅极结构; 执行蚀刻工艺以形成对应于半导体衬底内的栅极结构的两个凹部; 在半导体衬底上进行氧冲洗; 对所述半导体衬底进行清洁处理; 并且在每个用于形成源/漏区的凹槽中执行选择性外延生长（SEG）以形成外延层。

9. 发明申请

US20070072358A1 Method of manufacturing metal-oxide-semiconductor transistor devices 审中-公开
标题翻译：制造金属氧化物半导体晶体管器件的方法
公开(公告)号：US20070072358A1
公开(公告)日：2007-03-29
申请号：US11162954
申请日：2005-09-29
申请人： Chih-Ning Wu , Chung - Ju Lee , Wei-Tsun Shiau
发明人： Chih-Ning Wu , Chung - Ju Lee , Wei-Tsun Shiau
IPC分类号： H01L21/8238 , H01L21/44
CPC分类号： H01L29/665 , H01L21/28518 , H01L29/6653 , H01L29/6659 , H01L29/7843
摘要： A method of manufacturing a metal-oxide-semiconductor transistor device is disclosed. In the method, a silicon nitride spacer is formed and will be removed after an ion implantation process to form a source/drain region and a salicide process to form a metal silicide layer on the surface of the source/drain region and the gate electrode. The metal silicide layer is formed to comprise silicon (Si), nickel (Ni) and at least one metal selected from a group consisting of iridium (Ir), iron (Fe), cobalt (Co), platinum (Pt), palladium (Pd), molybdenum (Mo), and tantalum (Ta); therefore, when the silicon nitride spacer is removed by etching, the metal silicide layer is not damaged.
摘要翻译：公开了一种制造金属氧化物半导体晶体管器件的方法。在该方法中，形成氮化硅间隔物，并且在离子注入工艺之后将被去除以形成源极/漏极区域和自对准硅化物工艺，以在源极/漏极区域和栅极电极的表面上形成金属硅化物层。金属硅化物层形成为包括硅（Si），镍（Ni）和选自铱（Ir），铁（Fe），钴（Co），铂（Pt），钯（ Pd），钼（Mo）和钽（Ta）; 因此，当通过蚀刻除去氮化硅间隔物时，金属硅化物层不被损坏。

10. 发明申请

US20070072353A1 Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors 有权
标题翻译：制造应变硅晶体管和应变硅CMOS晶体管的方法
公开(公告)号：US20070072353A1
公开(公告)日：2007-03-29
申请号：US11162798
申请日：2005-09-23
申请人： Chih-Ning Wu , Hsin Tai , Chung - Ju Lee , Wei-Tsun Shiau
发明人： Chih-Ning Wu , Hsin Tai , Chung - Ju Lee , Wei-Tsun Shiau
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L21/823807 , H01L21/823814 , H01L29/165 , H01L29/6653 , H01L29/6656 , H01L29/66636 , H01L29/7848
摘要： A method of fabricating strained-silicon transistors includes providing a semiconductor substrate, in which the semiconductor substrate contains a gate structure thereon; performing an etching process to form two recesses corresponding to the gate structure within the semiconductor substrate; performing an oxygen flush on the semiconductor substrate; performing a cleaning process on the semiconductor substrate; and performing a selective epitaxial growth (SEG) to form an epitaxial layer in each recess for forming a source/drain region.
摘要翻译：制造应变硅晶体管的方法包括：提供半导体衬底，其中半导体衬底在其上包含栅极结构; 执行蚀刻工艺以形成对应于半导体衬底内的栅极结构的两个凹部; 在半导体衬底上进行氧冲洗; 对所述半导体衬底进行清洁处理; 并且在每个用于形成源/漏区的凹槽中执行选择性外延生长（SEG）以形成外延层。

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