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1. 发明申请

US20050289207A1 Fast fourier transform processor, dynamic scaling method and fast Fourier transform with radix-8 algorithm 审中-公开
标题翻译：快速傅里叶变换处理器，动态缩放方法和基数8算法的快速傅里叶变换
公开(公告)号：US20050289207A1
公开(公告)日：2005-12-29
申请号：US11052876
申请日：2005-02-09
申请人： Chen-Yi Lee , Yu-Wei Lin
发明人： Chen-Yi Lee , Yu-Wei Lin
IPC分类号： G06F15/00 , G06F17/14
CPC分类号： G06F17/142
摘要： The present invention provides a fast Fourier transform processor, dynamic scaling method and fast Fourier transform with radix-8 algorithm. It reduces quantization errors generated from the operation by using a matrix prefetch buffer-based fast Fourier transform processor. Operation sizes of the matrix prefetch buffer as block sizes the invention adjust the signals against overflow by the status of signals in each block. It can shunt time of complex multiplication operation systematically and reduce operation complexity in butterfly units by utilizing algorithms of 3-step radix-8 fast Fourier transform and re-scheduling. Moreover, the present invention provides a fast Fourier transform processor for realizing the methods and algorithms mentioned above.
摘要翻译：本发明提供了一种快速傅里叶变换处理器，动态缩放方法和使用radix-8算法的快速傅立叶变换。它通过使用基于矩阵预取缓冲器的快速傅里叶变换处理器来减少从操作产生的量化误差。作为块大小的矩阵预取缓冲器的操作大小本发明通过每个块中的信号的状态来调整信号与溢出。可以通过三步法-8快速傅立叶变换和重新调度的算法系统地分流复数乘法运算时间，降低蝴蝶单元的运算复杂度。此外，本发明提供一种用于实现上述方法和算法的快速傅里叶变换处理器。

2. 发明申请

US20060282764A1 High-throughput pipelined FFT processor 审中-公开
标题翻译：高吞吐量流水线FFT处理器
公开(公告)号：US20060282764A1
公开(公告)日：2006-12-14
申请号：US11147723
申请日：2005-06-08
申请人： Chen-Yi Lee , Yu-Wei Lin
发明人： Chen-Yi Lee , Yu-Wei Lin
IPC分类号： G06F15/00
CPC分类号： G06F17/142
摘要： The invention proposes a pipelined FFT processor for UWB system, comprising a first module for implementing radix-2 FFT algorithm; a second module is to realize radix-8 FFT algorithm; a third module is to realize radix-8 FFT algorithm; a plurality of conjugate blocks; a division block; and a plurality of multiplexers. The proposed pipelined FFT architecture called Mixed-Radix Multi-Path Delay Feedback (MRMDF) can provide higher throughput rate by using the multi-data-path scheme. The high-radix FFT algorithm is also realized in our processor to reduce the number of complex multiplications.
摘要翻译：本发明提出了一种用于UWB系统的流水线FFT处理器，包括用于实现基2 FFT算法的第一模块; 第二个模块是实现基数8 FFT算法; 第三个模块是实现基数8 FFT算法; 多个共轭嵌段; 分区块和多个多路复用器。所提出的流水线FFT架构称为混合多径延迟反馈（MRMDF）可以通过使用多数据路径方案提供更高的吞吐率。在我们的处理器中也实现了高基FFT算法，以减少复数乘法。

3. 发明授权

US08741448B2 Fullerene derivatives and optoelectronic devices utilizing the same 有权
标题翻译：富勒烯衍生物和利用其的光电器件
公开(公告)号：US08741448B2
公开(公告)日：2014-06-03
申请号：US13206249
申请日：2011-08-09
申请人： Chih-Ping Chen , Yeu-Ding Chen , Shih-Ching Chuang , Yu-Wei Lin , Fu-Wei Chan
发明人： Chih-Ping Chen , Yeu-Ding Chen , Shih-Ching Chuang , Yu-Wei Lin , Fu-Wei Chan
IPC分类号： H01L51/50 , H01L29/786 , H01L33/36 , C07D409/14 , C07D409/10
CPC分类号： H01L51/0047 , B82Y10/00 , C07D409/10 , C07D409/14 , C09K11/06 , C09K2211/1416 , C09K2211/1458 , H01L51/0036 , H01L51/4253 , H05B33/14 , Y02E10/549
摘要： Disclosed is a fullerene derivative having a formula of F-Cy, wherein F is an open-cage fullerene, and Cy is a chalcogenyl group. The fullerene derivative can be applied to hydrogen storage material and an optoelectronic device such as an organic light emitting diode (OLED), a solar cell, or an organic thin film transistor (TFT).
摘要翻译：公开了具有式F-Cy的富勒烯衍生物，其中F是开放式笼式富勒烯，Cy是硫族基。富勒烯衍生物可以应用于储氢材料和诸如有机发光二极管（OLED），太阳能电池或有机薄膜晶体管（TFT）的光电子器件。

4. 发明授权

US08242842B2 Input common mode circuit 有权
公开(公告)号：US08242842B2
公开(公告)日：2012-08-14
申请号：US13364043
申请日：2012-02-01
申请人： Yu-Wei Lin , Yung-Chow Peng
发明人： Yu-Wei Lin , Yung-Chow Peng
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45632 , H03F3/45928 , H03F2203/45512 , H03F2203/45588
摘要： A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.

5. 发明申请

US20120063534A1 SIGNAL TRANSMISSION SYSTEM WITH CLOCK SIGNAL GENERATOR CONFIGURED FOR GENERATING CLOCK SIGNAL HAVING STEPWISE/SMOOTH FREQUENCY TRANSITION AND RELATED SIGNAL TRANSMISSION METHOD THEREOF 有权
标题翻译：具有用于生成具有步进/平滑频率转换的时钟信号的时钟信号发生器的信号传输系统及其相关信号传输方法
公开(公告)号：US20120063534A1
公开(公告)日：2012-03-15
申请号：US13109015
申请日：2011-05-17
申请人： Yu-Wei Lin , Chih-Chien Hung , Tsang-Yi Wu
发明人： Yu-Wei Lin , Chih-Chien Hung , Tsang-Yi Wu
IPC分类号： H04L27/00 , H03L7/06 , H03L7/00
CPC分类号： H04L7/033 , H03L7/0807 , H03L7/095 , H04L7/0091
摘要： A signal transmission system includes a first clock signal generator and a second clock signal generator. The first clock signal generator is configured for generating a first clock signal according to clock information derived from a transmitted signal, wherein the transmitted signal is changed in response to a frequency change of a second clock signal, and the first clock signal generator enters a frequency-unlocked state if the second clock signal has a frequency transition from a first frequency to a second frequency during a first time period. The second clock signal generator is configured for generating the second clock signal having the frequency transition from the first frequency to the second frequency during a second time period longer than the first time period such that the first clock signal generator stays in a frequency-locked state during the second time period.
摘要翻译：信号传输系统包括第一时钟信号发生器和第二时钟信号发生器。第一时钟信号发生器被配置为根据从发送信号导出的时钟信息产生第一时钟信号，其中响应于第二时钟信号的频率变化而发送的信号被改变，并且第一时钟信号发生器输入频率如果第二时钟信号在第一时间段期间具有从第一频率到第二频率的频率转变，则为非锁定状态。第二时钟信号发生器被配置为在比第一时间段长的第二时间段内产生具有从第一频率到第二频率的频率转变的第二时钟信号，使得第一时钟信号发生器保持在锁频状态在第二时期。

6. 发明授权

US07911296B2 Resonator system such as a microresonator system and method of making same 有权
标题翻译：谐振器系统如微谐振器系统及其制作方法
公开(公告)号：US07911296B2
公开(公告)日：2011-03-22
申请号：US12135388
申请日：2008-06-09
申请人： Clark T. C. Nguyen , Yu-Wei Lin
发明人： Clark T. C. Nguyen , Yu-Wei Lin
IPC分类号： H03H9/50
CPC分类号： H03B5/30
摘要： A resonator system such as a microresonator system and a method of making same are provided. In at least one embodiment, a mechanical circuit-based approach for boosting the Q of a vibrating micromechanical resonator is disclosed. A low Q resonator is embedded into a mechanically-coupled array of much higher Q resonators to raise the functional Q of the composite resonator by a factor approximately equal to the number of resonators in the array. The availability of such a circuit-based Q-enhancement technique has far reaching implications, especially considering the possibility of raising the functional Q of a piezoelectric resonator by merely mechanically coupling it to an array of much higher Q capacitively-transduced ones to simultaneously obtain the most attractive characteristics of both technologies: low impedance from the piezo-device and high-Q from the capacitive ones. Furthermore, the manufacturing repeatability of such micromechanical resonator-based products is enhanced.
摘要翻译：提供诸如微谐振器系统的谐振器系统及其制造方法。在至少一个实施例中，公开了一种用于升高振动微机械谐振器的Q的基于机械电路的方法。将低Q谐振器嵌入到更高Q谐振器的机械耦合阵列中，以使复合谐振器的功能Q大致等于阵列中的谐振器的数量。这种基于电路的Q增强技术的可用性具有深远的意义，特别是考虑到通过仅将其机械耦合到具有高得多的Q电容转换阵列的阵列来提高压电谐振器的功能Q的可能性，以同时获得两种技术最具吸引力的特征：压电器件的低阻抗和电容式的高Q值。此外，增强了这种基于微机械谐振器的产品的制造重复性。

7. 发明授权

US07551043B2 Micromechanical structures having a capacitive transducer gap filled with a dielectric and method of making same 失效
标题翻译：具有填充有电介质的电容式换能器间隙的微机械结构及其制造方法
公开(公告)号：US07551043B2
公开(公告)日：2009-06-23
申请号：US11511202
申请日：2006-08-28
申请人： Clark T.-C. Nguyen , Yu-Wei Lin , Sheng-Shian Li , Yuan Xie
发明人： Clark T.-C. Nguyen , Yu-Wei Lin , Sheng-Shian Li , Yuan Xie
IPC分类号： H03H9/125 , H03H9/24 , H03H3/007 , H03H9/52
CPC分类号： H03H3/0072 , H03H9/2436 , H03H2009/02354 , H03H2009/02503
摘要： Micromechanical structures having at least one lateral capacitive transducer gap filled with a dielectric and method of making same are provided. VHF and UHF MEMS-based vibrating micromechanical resonators filled with new solid dielectric capacitive transducer gaps to replace previously used air gaps have been demonstrated at 160 MHz, with Q's˜20,200 on par with those of air-gap resonators, and motional resistances (Rx's) more than 8× smaller at similar frequencies and bias conditions. This degree of motional resistance reduction comes about via not only the higher dielectric constant provided by a solid-filled electrode-to-resonator gap, but also by the ability to achieve smaller solid gaps than air gaps. These advantages with the right dielectric material may now allow capacitively-transduced resonators to match to the 50-377Ω impedances expected by off-chip components (e.g., antennas) in many wireless applications without the need for high voltages.
摘要翻译：提供了具有填充有电介质的至少一个侧向电容性换能器间隙的微机械结构及其制造方法。充满新固体电介质电容换能器间隙的VHF和UHF MEMS振动微机械谐振器已经在160 MHz下得到了证实，Q-20,200与气隙谐振器相当，运动电阻（Rx）在相似的频率和偏置条件下，小于8倍。这种运动阻力降低的程度不仅通过固体填充的电极与谐振器间隙提供的较高的介电常数，而且通过与气隙实现更小的固体间隙的能力。使用正确的介电材料的这些优点现在可以允许电容转换的谐振器与许多无线应用中的片外组件（例如，天线）预期的50-377Omega阻抗匹配，而不需要高电压。

8. 发明授权

US06603300B2 Phase-detecting device 有权
公开(公告)号：US06603300B2
公开(公告)日：2003-08-05
申请号：US09989381
申请日：2001-11-21
申请人： Yu-Wei Lin , Chia-Hsin Chen
发明人： Yu-Wei Lin , Chia-Hsin Chen
IPC分类号： G01R23175
CPC分类号： H03L7/0814 , H03L7/085
摘要： A phase detecting device, including a phase detector, an inversion logic circuit, a latch and an OR logic circuit, is used for detecting the phase difference between a reference signal and a feedback signal and for outputting a delay control signal. The phase detector generates a detected signal according to the status of the feedback signal captured by the reference signal. The inversion logic circuit inverts the detected signal, and the delay device delays the detected signal. The delayed inverted detected signal is then fed into the latch device to generate a latch signal. As the detected signal and the latch signal are fed into the OR logic circuit, the OR logic circuit feeds the delay control signal into the counter so that the delay circuit can generate different delay time, such as T/4, T/2 or 1T, for meeting different signal-delay requirements.

9. 发明授权

US09161465B2 Quick-release fixing structure for electronic equipments 有权
标题翻译：电子设备快速固定结构
公开(公告)号：US09161465B2
公开(公告)日：2015-10-13
申请号：US13529849
申请日：2012-06-21
申请人： Chia-Jung Chen , Yu-Wei Lin
发明人： Chia-Jung Chen , Yu-Wei Lin
IPC分类号： H05K5/02 , F16B5/07 , F16B21/09
CPC分类号： H05K5/0204 , F16B5/07 , F16B21/09 , Y10T403/32975
摘要： In a quick-release fixing structure for an electronic equipment, the electronic equipment includes a plurality of holes and a snap slot, and the quick-release fixing structure includes a substrate, a turning element and a plurality of fixing elements. The substrate includes a plurality of grooves and a port, and each groove includes a first groove hole and a second groove hole interconnected to the first groove hole, and the second groove hole is greater than the first groove hole. The turning element is coupled to the substrate and includes a bump exposed from the port and snapped into the snap slot. Each fixing element is passed through each first groove hole and fixed to each hole. The turning element can be turned to push the electronic equipment to move each fixing element into each second groove hole, and separate the electronic equipment from the substrate.
摘要翻译：在电子设备的快速释放固定结构中，电子设备包括多个孔和卡槽，并且快速释放固定结构包括基板，转动元件和多个固定元件。基板包括多个槽和端口，每个槽包括与第一槽孔互连的第一槽孔和第二槽孔，第二槽孔大于第一槽孔。旋转元件联接到基板并且包括从端口暴露并且卡扣到卡槽中的凸块。每个固定元件通过每个第一槽孔并固定到每个孔。可以转动转动元件以推动电子设备将每个固定元件移动到每个第二槽孔中，并将电子设备与基板分离。

10. 发明授权

US08823388B2 Calibration circuit and calibration method 有权
标题翻译：校准电路和校准方法
公开(公告)号：US08823388B2
公开(公告)日：2014-09-02
申请号：US13152284
申请日：2011-06-03
申请人： Yu-Wei Lin
发明人： Yu-Wei Lin
IPC分类号： G01R35/00 , G01R23/175 , H03H7/32 , G01R31/317 , H03H11/26 , H03H7/01
CPC分类号： H03H7/32 , G01R31/31725 , G01R35/00 , H03H7/0153 , H03H11/265 , H03H2210/043
摘要： A calibration circuit and a calibration method are provided. The calibration circuit has a delay circuit, a phase detector, and a controller. The delay circuit delays an input signal to output an output signal, wherein a delay time between the input signal and the output signal is related to an equivalent capacitance and an equivalent resistance of the delay circuit. The phase detector coupled to the delay circuit compares the phases of the input signal and the output signal. The controller coupled to the delay circuit and the phase detector generates a control signal according to the comparison result of the phase detector to adjust the equivalent resistance of the delay circuit.
摘要翻译：提供校准电路和校准方法。校准电路具有延迟电路，相位检测器和控制器。延迟电路延迟输入信号以输出输出信号，其中输入信号和输出信号之间的延迟时间与等效电容和延迟电路的等效电阻相关。耦合到延迟电路的相位检测器比较输入信号和输出信号的相位。耦合到延迟电路的控制器和相位检测器根据相位检测器的比较结果生成控制信号，以调整延迟电路的等效电阻。

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