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1. 发明申请

US20100053061A1 ADAPTIVE BACKLIGHT CONTROL AND CONTRAST ENHANCEMENT 有权
标题翻译：自适应背光控制和对比度增强
公开(公告)号：US20100053061A1
公开(公告)日：2010-03-04
申请号：US12203254
申请日：2008-09-03
申请人： Charles Leung , Jatin Naik , Lawrence Lim , Laurent Dahan , Milivoje Aleksic
发明人： Charles Leung , Jatin Naik , Lawrence Lim , Laurent Dahan , Milivoje Aleksic
IPC分类号： G09G3/36
CPC分类号： G09G3/3406 , G09G2320/064 , G09G2360/16
摘要： A transform function represented by at least n points that define n-1 regions is determined based at least in part on a first set of values associated with a display frame and a maximum average contrast function. The n points can be determined in response to a change in an average contrast of the display frame compared to an average contrast of a previous display frame exceeding a predetermined threshold. The first set of values is converted to a corresponding second set of values based on the transform function. A backlight control signal is generated based on an average contrast of the second set of values, whereby the backlight control signal is configured to control an intensity of a backlight of a display. Further, a video signal is generated based on the second set of values, whereby the video signal configured to drive the display.
摘要翻译：至少部分地基于与显示帧和最大平均对比度函数相关联的第一组值来确定定义n-1个区域的至少n个点的变换函数。可以响应于超过预定阈值的先前显示帧的平均对比度，显示帧的平均对比度的变化来确定n个点。基于变换函数将第一组值转换为相应的第二组值。基于第二组值的平均对比度产生背光控制信号，由此背光控制信号被配置为控制显示器的背光的强度。此外，基于第二组值生成视频信号，由此构成为驱动显示的视频信号。

2. 发明授权

US09230484B2 Adaptive backlight control and contrast enhancement 有权
标题翻译：自适应背光控制和对比度增强
公开(公告)号：US09230484B2
公开(公告)日：2016-01-05
申请号：US12203254
申请日：2008-09-03
申请人： Charles Leung , Jatin Naik , Lawrence Lim , Laurent Dahan , Milivoje Aleksic
发明人： Charles Leung , Jatin Naik , Lawrence Lim , Laurent Dahan , Milivoje Aleksic
IPC分类号： G09G3/36 , G09G3/34
CPC分类号： G09G3/3406 , G09G2320/064 , G09G2360/16
摘要： A transform function represented by at least n points that define n−1 regions is determined based at least in part on a first set of values associated with a display frame and a maximum average contrast function. The n points can be determined in response to a change in an average contrast of the display frame compared to an average contrast of a previous display frame exceeding a predetermined threshold. The first set of values is converted to a corresponding second set of values based on the transform function. A backlight control signal is generated based on an average contrast of the second set of values, whereby the backlight control signal is configured to control an intensity of a backlight of a display. Further, a video signal is generated based on the second set of values, whereby the video signal configured to drive the display.
摘要翻译：至少部分地基于与显示帧和最大平均对比度函数相关联的第一组值来确定定义n-1个区域的至少n个点的变换函数。可以响应于超过预定阈值的先前显示帧的平均对比度，显示帧的平均对比度的变化来确定n个点。基于变换函数将第一组值转换为相应的第二组值。基于第二组值的平均对比度产生背光控制信号，由此背光控制信号被配置为控制显示器的背光的强度。此外，基于第二组值生成视频信号，由此构成为驱动显示的视频信号。

3. 发明申请

US20080055134A1 REDUCED COMPONENT DIGITAL TO ANALOG DECODER AND METHOD 有权
标题翻译：减少组件数字到模拟解码器和方法
公开(公告)号：US20080055134A1
公开(公告)日：2008-03-06
申请号：US11469345
申请日：2006-08-31
申请人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
发明人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
IPC分类号： H03M1/66
CPC分类号： H03M1/76
摘要： An n bit D/A decoder is formed using P-type and N-type transistor switches, instead of convention CMOS switches. Each P-type and N-type switch may be formed of fewer transistors than those used to form a CMOS switch, thereby reducing the overall transistor count. The decoder may be used to decode digital values to non-linear GAMMA corrected analog output voltages.
摘要翻译：使用P型和N型晶体管开关来形成n位D / A解码器，而不是常规的CMOS开关。每个P型和N型开关可以由比用于形成CMOS开关的晶体管更少的晶体管形成，从而降低整体晶体管数量。解码器可用于将数字值解码为非线性GAMMA校正的模拟输出电压。

4. 发明申请

US20070226522A1 Method and apparatus for reducing power consumption of a co-processor 有权
标题翻译：用于降低协同处理器的功耗的方法和装置
公开(公告)号：US20070226522A1
公开(公告)日：2007-09-27
申请号：US11388928
申请日：2006-03-24
申请人： Milivoje Aleksic , Aris Balatsos , Charles Leung
发明人： Milivoje Aleksic , Aris Balatsos , Charles Leung
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , Y02D10/159
摘要： To provide reduced power consumption of a co-processor, a low power dedicated memory is provided. During a low power state, a processing component of the co-processor is instructed to use the low power dedicated memory and a first memory device, normally used by the processing component, is thereafter operated in a reduced power mode for the duration of the low power state. Preferably, the low power dedicated memory has a storage capacity that is significantly less than the storage capacity of the first memory. When an operating state other than the low power state is detected, normal power consumption by the first memory is resumed and the co-processor is directed to use the first memory once again. In this manner, the present invention allows co-processors, and preferably graphics co-processors, to operate in a beneficial low power mode thereby reducing power consumption.
摘要翻译：为了提供协处理器的降低的功耗，提供了低功率专用存储器。在低功率状态期间，指示协处理器的处理部件使用低功率专用存储器，然后由处理部件通常使用的第一存储器件此后以低功率模式在低功率模式下运行电源状态优选地，低功率专用存储器具有明显小于第一存储器的存储容量的存储容量。当检测到除了低功率状态之外的操作状态时，第一存储器的正常功率消耗被恢复，并且协处理器被再次用于使用第一存储器。以这种方式，本发明允许协处理器，优选图形协处理器以有益的低功率模式操作，从而降低功耗。

5. 发明授权

US07017053B2 System for reduced power consumption by monitoring video content and method thereof 有权
公开(公告)号：US07017053B2
公开(公告)日：2006-03-21
申请号：US10083917
申请日：2002-02-27
申请人： Carl Mizuyabu , Charles Leung , Milivoje Aleksic
发明人： Carl Mizuyabu , Charles Leung , Milivoje Aleksic
IPC分类号： G06F1/32
CPC分类号： G09G5/006 , G06F1/3203 , G06F1/3218 , G06F1/3225 , G06F1/3237 , G06F1/3265 , G09G5/00 , G09G2330/021 , Y02D10/128 , Y02D10/153
摘要： A system and method are provided for reducing power consumption within a video processing portion of a system based on display content. Display content is monitored to determine whether the display content is changing. New display content is compared to old display content to determine if the display content is changing. If the display content has not changed, a frame rate used to output display data is reduced. A color depth associated with the display data is also reduced. Power consumption can be reduced when it is determined that display content is not changing.

6. 发明申请

US20050190191A1 Portable device for providing dual display and method thereof 审中-公开
标题翻译：用于提供双重显示的便携式设备及其方法
公开(公告)号：US20050190191A1
公开(公告)日：2005-09-01
申请号：US11082590
申请日：2005-05-16
申请人： Steven Turner , Milivoje Aleksic , Yin Yang , Charles Leung
发明人： Steven Turner , Milivoje Aleksic , Yin Yang , Charles Leung
IPC分类号： G06F3/14 , G06T1/20 , G06F15/16
CPC分类号： G06F3/1423
摘要： A portable device is provided. The portable device includes a first graphics controller to generate a first rendered graphics data to be displayed on an integrated display, the first graphics controller including a first output coupled to the integrated display. The portable device further includes a second graphics controller to generate a second rendered graphics data and a display interface to format the second rendered graphics data for output to a first remote display, where the display interface includes a first input coupled to an output of the second graphics controller.
摘要翻译：提供便携式设备。该便携式设备包括：第一图形控制器，用于生成待显示在集成显示器上的第一渲染图形数据，第一图形控制器包括耦合到集成显示器的第一输出。便携式设备还包括第二图形控制器以产生第二渲染图形数据和显示界面，以格式化第二渲染图形数据以输出到第一远程显示器，其中显示界面包括耦合到第二显示图形输出的第一输入图形控制器

7. 发明授权

US08031093B2 Reduced component digital to analog decoder and method 有权
标题翻译：低分量数字到模拟解码器和方法
公开(公告)号：US08031093B2
公开(公告)日：2011-10-04
申请号：US12439265
申请日：2007-08-31
申请人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
发明人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
IPC分类号： H03M1/00 , H03M1/66
CPC分类号： H03M1/76
摘要： An n bit D/A decoder is formed using P-type and N-type transistor switches, instead of convention CMOS switches. Each P-type and N-type switch may be formed of fewer transistors than those used to form a CMOS switch, thereby reducing the overall transistor count. The decoder may be used to decode digital values to non-linear GAMMA corrected analog output voltages.
摘要翻译：使用P型和N型晶体管开关来形成n位D / A解码器，而不是常规的CMOS开关。每个P型和N型开关可以由比用于形成CMOS开关的晶体管更少的晶体管形成，从而降低整体晶体管数量。解码器可用于将数字值解码为非线性GAMMA校正的模拟输出电压。

8. 发明授权

US07770040B2 Method and apparatus for reducing power consumption of a co-processor by switching to low power dedicated memory in which image data is periodically updated 有权
标题翻译：通过切换到其中周期性更新图像数据的低功率专用存储器来减少协处理器的功耗的方法和装置
公开(公告)号：US07770040B2
公开(公告)日：2010-08-03
申请号：US11388928
申请日：2006-03-24
申请人： Milivoje Aleksic , Aris Balatsos , Charles Leung
发明人： Milivoje Aleksic , Aris Balatsos , Charles Leung
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , Y02D10/159
摘要： To provide reduced power consumption of a co-processor, a low power dedicated memory is provided. During a low power state, a processing component of the co-processor is instructed to use the low power dedicated memory and a first memory device, normally used by the processing component, is thereafter operated in a reduced power mode for the duration of the low power state. Preferably, the low power dedicated memory has a storage capacity that is significantly less than the storage capacity of the first memory. When an operating state other than the low power state is detected, normal power consumption by the first memory is resumed and the co-processor is directed to use the first memory once again. In this manner, the present invention allows co-processors, and preferably graphics co-processors, to operate in a beneficial low power mode thereby reducing power consumption.
摘要翻译：为了提供协处理器的降低的功耗，提供了低功率专用存储器。在低功率状态期间，指示协同处理器的处理部件使用低功率专用存储器，然后由处理部件通常使用的第一存储器件此后以低功率模式在低电平下持续工作电源状态优选地，低功率专用存储器具有明显小于第一存储器的存储容量的存储容量。当检测到除了低功率状态之外的操作状态时，第一存储器的正常功率消耗被恢复，并且协处理器被再次用于使用第一存储器。以这种方式，本发明允许协处理器，优选图形协处理器以有益的低功率模式操作，从而降低功耗。

9. 发明申请

US20100013689A1 REDUCED COMPONENT DIGITAL TO ANALOG DECODER AND METHOD 有权
标题翻译：减少组件数字到模拟解码器和方法
公开(公告)号：US20100013689A1
公开(公告)日：2010-01-21
申请号：US12439265
申请日：2007-08-31
申请人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
发明人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
IPC分类号： H03M1/66
CPC分类号： H03M1/76
摘要： An n bit D/A decoder is formed using P-type and N-type transistor switches, instead of convention CMOS switches. Each P-type and N-type switch may be formed of fewer transistors than those used to form a CMOS switch, thereby reducing the overall transistor count. The decoder may be used to decode digital values to non-linear GAMMA corrected analog output voltages.
摘要翻译：使用P型和N型晶体管开关来形成n位D / A解码器，而不是常规的CMOS开关。每个P型和N型开关可以由比用于形成CMOS开关的晶体管更少的晶体管形成，从而降低整体晶体管数量。解码器可用于将数字值解码为非线性GAMMA校正的模拟输出电压。

10. 发明授权

US07385545B2 Reduced component digital to analog decoder and method 有权
标题翻译：低分量数字到模拟解码器和方法
公开(公告)号：US07385545B2
公开(公告)日：2008-06-10
申请号：US11469345
申请日：2006-08-31
申请人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
发明人： Kongning Li , Charles Leung , Grigori Temkine , Milivoje Aleksic , Steven Turner , Greg Vansickle , Kevin O'Neil
IPC分类号： H03M1/76
CPC分类号： H03M1/76
摘要： An n bit D/A decoder is formed using P-type and N-type transistor switches, instead of convention CMOS switches. Each P-type and N-type switch may be formed of fewer transistors than those used to form a CMOS switch, thereby reducing the overall transistor count. The decoder may be used to decode digital values to non-linear GAMMA corrected analog output voltages.
摘要翻译：使用P型和N型晶体管开关来形成n位D / A解码器，而不是常规的CMOS开关。每个P型和N型开关可以由比用于形成CMOS开关的晶体管更少的晶体管形成，从而降低整体晶体管数量。解码器可用于将数字值解码为非线性GAMMA校正的模拟输出电压。

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