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    • 1. 发明申请
    • METHOD FOR FORMING A PLUG STRUCTURE
    • 形成插管结构的方法
    • US20110104895A1
    • 2011-05-05
    • US13006358
    • 2011-01-13
    • Chao-Ching Hsieh
    • Chao-Ching Hsieh
    • H01L21/768
    • H01L21/76814H01L21/76844H01L21/76877
    • A method for forming a plug structure includes the following steps. A substrate is provided. The substrate includes a MOS device with a source/drain region, a dielectric layer disposed on the MOS device, an opening defined in the dielectric layer, and a first glue layer disposed on a sidewall and a bottom of the opening. A portion of the first glue layer disposed at the bottom of the opening is punched through to expose the source/drain region. A barrier layer is formed over the substrate after the first glue layer is punched through. The opening is filled with a conductive structure, wherein the barrier layer disposed at the bottom of the opening is remained when the conductive structure is filled into the opening.
    • 形成插塞结构的方法包括以下步骤。 提供基板。 衬底包括具有源极/漏极区域的MOS器件,设置在MOS器件上的电介质层,限定在电介质层中的开口,以及设置在开口的侧壁和底部上的第一胶合层。 设置在开口底部的第一胶合层的一部分被穿孔以暴露源/漏区。 在穿过第一胶层之后,在衬底上形成阻挡层。 开口填充有导电结构,其中当导电结构填充到开口中时,设置在开口底部的阻挡层保留。
    • 2. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20080067684A1
    • 2008-03-20
    • US11944462
    • 2007-11-23
    • Yu-Lan ChangChao-Ching HsiehYi-Yiing ChiangYi-Wei ChenTzung-Yu Hung
    • Yu-Lan ChangChao-Ching HsiehYi-Yiing ChiangYi-Wei ChenTzung-Yu Hung
    • H01L23/48
    • H01L29/665H01L29/6659H01L29/7833H01L2924/0002H01L2924/00
    • A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.
    • 提供了包括至少一个导电结构的半导体器件。 导电结构包括含硅导电层,难熔金属硅化物层和保护层。 难熔金属硅化物层设置在含硅导电层上。 保护层设置在难熔金属硅化物层上。 还提供了包括至少一个导电结构的另一半导体器件。 导电结构包括含硅导电层,难熔金属合金自对准硅化物层和保护层。 难熔金属合金自对准硅化物层设置在含硅导电层的上方。 难熔金属合金自对准硅化物层由含硅导电层的硅与含有第一耐火金属和第二难熔金属的难熔金属合金层的反应形成。 保护层设置在难熔金属合金自对准硅化物层上。
    • 7. 发明授权
    • Method for forming a plug structure
    • 形成插头结构的方法
    • US08431487B2
    • 2013-04-30
    • US13006358
    • 2011-01-13
    • Chao-Ching Hsieh
    • Chao-Ching Hsieh
    • H01L21/44H01L21/4763
    • H01L21/76814H01L21/76844H01L21/76877
    • A method for forming a plug structure includes the following steps. A substrate is provided. The substrate includes a MOS device with a source/drain region, a dielectric layer disposed on the MOS device, an opening defined in the dielectric layer, and a first glue layer disposed on a sidewall and a bottom of the opening. A portion of the first glue layer disposed at the bottom of the opening is punched through to expose the source/drain region. A barrier layer is formed over the substrate after the first glue layer is punched through. The opening is filled with a conductive structure, wherein the barrier layer disposed at the bottom of the opening is remained when the conductive structure is filled into the opening.
    • 形成插塞结构的方法包括以下步骤。 提供基板。 衬底包括具有源极/漏极区域的MOS器件,设置在MOS器件上的电介质层,限定在电介质层中的开口,以及设置在开口的侧壁和底部上的第一胶合层。 设置在开口底部的第一胶合层的一部分被穿孔以暴露源/漏区。 在穿过第一胶层之后,在衬底上形成阻挡层。 开口填充有导电结构,其中当导电结构填充到开口中时,设置在开口底部的阻挡层保留。
    • 9. 发明授权
    • Manufacturing method of semiconductor device
    • 半导体器件的制造方法
    • US07915127B2
    • 2011-03-29
    • US12509623
    • 2009-07-27
    • Chun-Hsien LinChao-Ching Hsieh
    • Chun-Hsien LinChao-Ching Hsieh
    • H01L21/336
    • H01L29/7843H01L29/4966H01L29/517H01L29/66545H01L29/66583H01L29/7833
    • A method of forming a semiconductor device is described. First, a substrate is provided. Thereafter, a gate structure including, from bottom to top, a high-k layer, a work function metal layer, a wetting layer, a polysilicon layer and a mask layer is formed on the substrate. Afterwards, a spacer is formed on the sidewall of the gate structure. Source/drain regions are then formed in the substrate beside the gate structure. Further, an interlayer dielectric layer is formed over the substrate. Thereafter, a portion of the interlayer dielectric layer is removed to expose the surface of the mask layer. Afterwards, the mask layer and the polysilicon layer are sequentially removed to expose the surface of the wetting layer. A selective chemical vapor deposition process is then performed, so as to bottom-up deposit a metal layer from the surface of the wetting layer.
    • 描述形成半导体器件的方法。 首先,提供基板。 此后,在基板上形成从底部到顶部包括高k层,功函数金属层,润湿层,多晶硅层和掩模层的栅极结构。 之后,在栅极结构的侧壁上形成间隔物。 然后在栅极结构旁边的衬底中形成源/漏区。 此外,在衬底上形成层间电介质层。 此后,去除部分层间电介质层以暴露掩模层的表面。 然后,依次去除掩模层和多晶硅层以露出润湿层的表面。 然后进行选择性化学气相沉积工艺,以便从底层向下从润湿层的表面沉积金属层。