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    • 4. 发明申请
    • Semiconductor chip and semiconductor chip package comprising semiconductor chip
    • 包括半导体芯片的半导体芯片和半导体芯片封装
    • US20070189050A1
    • 2007-08-16
    • US11702092
    • 2007-02-05
    • Eun-sung SeoMi-jo KimSoo-young Kim
    • Eun-sung SeoMi-jo KimSoo-young Kim
    • G11C5/06
    • G11C5/066G11C5/04G11C8/06G11C8/12G11C11/40615G11C29/1201G11C29/48
    • Embodiments of the invention provide a semiconductor chip and a semiconductor chip package comprising a semiconductor chip. In one embodiment, the invention provides a semiconductor chip comprising a memory cell array, a control circuit, and a chip selection signal generating circuit electrically connected to first and second option pads. In the semiconductor chip, the chip selection signal generating circuit is enabled in accordance with a dual chip enable signal, and the control circuit is enabled and disabled in accordance with the chip selection signal received from the chip selection signal generating circuit. In addition, the chip selection signal generating circuit is adapted to generate a chip selection signal in accordance with signals received through the first and second option pads, respectively.
    • 本发明的实施例提供一种半导体芯片和包括半导体芯片的半导体芯片封装。 在一个实施例中,本发明提供一种半导体芯片,其包括电连接到第一和第二选择焊盘的存储单元阵列,控制电路和芯片选择信号发生电路。 在半导体芯片中,芯片选择信号发生电路根据双芯片使能信号使能,并且控制电路根据从芯片选择信号发生电路接收的芯片选择信号而被使能和禁止。 此外,芯片选择信号发生电路适于分别根据通过第一和第二可选焊盘接收的信号产生芯片选择信号。
    • 9. 发明授权
    • Semiconductor chip and semiconductor chip package comprising semiconductor chip
    • 包括半导体芯片的半导体芯片和半导体芯片封装
    • US07420831B2
    • 2008-09-02
    • US11702092
    • 2007-02-05
    • Eun-sung SeoMi-jo KimSoo-young Kim
    • Eun-sung SeoMi-jo KimSoo-young Kim
    • G11C5/06
    • G11C5/066G11C5/04G11C8/06G11C8/12G11C11/40615G11C29/1201G11C29/48
    • Embodiments of the invention provide a semiconductor chip and a semiconductor chip package comprising a semiconductor chip. In one embodiment, the invention provides a semiconductor chip comprising a memory cell array, a control circuit, and a chip selection signal generating circuit electrically connected to first and second option pads. In the semiconductor chip, the chip selection signal generating circuit is enabled in accordance with a dual chip enable signal, and the control circuit is enabled and disabled in accordance with the chip selection signal received from the chip selection signal generating circuit. In addition, the chip selection signal generating circuit is adapted to generate a chip selection signal in accordance with signals received through the first and second option pads, respectively.
    • 本发明的实施例提供一种半导体芯片和包括半导体芯片的半导体芯片封装。 在一个实施例中,本发明提供一种半导体芯片,其包括电连接到第一和第二选择焊盘的存储单元阵列,控制电路和芯片选择信号发生电路。 在半导体芯片中,芯片选择信号发生电路根据双芯片使能信号使能,并且控制电路根据从芯片选择信号发生电路接收的芯片选择信号而被使能和禁止。 此外,芯片选择信号发生电路适于分别根据通过第一和第二可选焊盘接收的信号产生芯片选择信号。