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    • 3. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE
    • 半导体存储器件
    • US20130088912A1
    • 2013-04-11
    • US13535583
    • 2012-06-28
    • Jong-pil SONDong-min KIM
    • Jong-pil SONDong-min KIM
    • G11C7/06G11C11/24G11C7/00
    • G11C7/08G11C11/4091G11C11/4094G11C11/4099
    • A semiconductor memory device includes a first bit line to which a first memory cell is connected, and a second bit line to which a second memory cell is connected, the second bit line being complementary to the first bit line, a sense amplifier that includes a first transistor and a second transistor connected in series between the first bit line and the second bit line, the sense amplifier including a first node between the first transistor and the second transistor, a gate of the first transistor being connected to the second bit line, and a gate of the second transistor being connected to the first bit line, and a voltage providing unit that provides a first voltage to the first node during presensing, and provides a second voltage, different from the first voltage, to the first node during main sensing.
    • 半导体存储器件包括第一存储器单元连接到的第一位线和连接第二存储器单元的第二位线,第二位线与第一位线互补,读出放大器包括: 第一晶体管和第二晶体管串联连接在第一位线和第二位线之间,读出放大器包括第一晶体管和第二晶体管之间的第一节点,第一晶体管的栅极连接到第二位线, 并且所述第二晶体管的栅极连接到所述第一位线,以及电压提供单元,其在预定期间向所述第一节点提供第一电压,并且在所述第一节点期间在所述第一节点期间向所述第一节点提供与所述第一电压不同的第二电压 感应。