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1. 发明申请

US20140346495A1 STABLE HIGH MOBILITY MOTFT AND FABRICATION AT LOW TEMPERATURE 有权
标题翻译：稳定的高移动性和低温制造
公开(公告)号：US20140346495A1
公开(公告)日：2014-11-27
申请号：US13902514
申请日：2013-05-24
申请人： Chan- Long Shieh , Gang Yu , Fatt Foong , Juergen Musolf
发明人： Chan- Long Shieh , Gang Yu , Fatt Foong , Juergen Musolf
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/66969 , H01L21/02063 , H01L21/02565 , H01L21/02631 , H01L21/76805 , H01L21/76814 , H01L21/76895 , H01L27/1225 , H01L29/247 , H01L29/42384 , H01L29/517 , H01L29/518 , H01L29/66742 , H01L29/78603 , H01L29/78606 , H01L29/78618 , H01L29/78693 , H01L29/78696 , H01L2021/775
摘要： A method of fabricating a stable high mobility amorphous MOTFT includes a step of providing a substrate with a gate formed thereon and a gate dielectric layer positioned over the gate. A carrier transport structure is deposited by sputtering on the gate dielectric layer. The carrier transport structure includes a layer of amorphous high mobility metal oxide adjacent the gate dielectric and a relatively inert protective layer of material deposited on the layer of amorphous high mobility metal oxide both deposited without oxygen and in situ. The layer of amorphous metal oxide has a mobility above 40 cm2/Vs and a carrier concentration in a range of approximately 1018 cm−3 to approximately 5×1019 cm−3. Source/drain contacts are positioned on the protective layer and in electrical contact therewith.
摘要翻译：制造稳定的高迁移率无定形MOTFT的方法包括提供其上形成有栅极的基板和位于栅极上方的栅介质层的步骤。通过溅射将载流子传输结构沉积在栅极介电层上。载流子传输结构包括邻近栅极电介质的非晶高迁移率金属氧化物层，以及沉积在无氧和原位沉积的无定形高迁移率金属氧化物层上的相对惰性的材料保护层。非晶金属氧化物层的迁移率高于40cm 2 / Vs，载流子浓度在约1018cm-3至约5×1019cm-3的范围内。源极/漏极触点位于保护层上并与其电接触。

2. 发明申请

US20140151694A1 METAL OXIDE TFT WITH IMPROVED SOURCE/DRAIN CONTACTS 有权
标题翻译：具有改进源/漏联系的金属氧化物薄膜
公开(公告)号：US20140151694A1
公开(公告)日：2014-06-05
申请号：US14175521
申请日：2014-02-07
申请人： Chan- Long Shieh , Gang Yu , Fatt Foong
发明人： Chan- Long Shieh , Gang Yu , Fatt Foong
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L21/428 , H01L29/45 , H01L29/66969 , H01L29/78606
摘要： A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.
摘要翻译：在金属氧化物半导体薄膜晶体管中形成欧姆源极/漏极接触的方法包括提供栅极，栅极电介质，具有带隙的高载流子浓度金属氧化物半导体有源层，并且具有薄的源极/漏极金属触点薄膜晶体管配置。间隔开的源极/漏极金属触点限定有源层中的沟道区。在沟道区域附近提供氧化环境，并且栅极和沟道区域在氧化环境中被加热以降低沟道区域中的载流子浓度。或者或另外每个源极/漏极触点包括位于金属氧化物半导体有源层上的非常薄的低功函数金属层，并且高功函数金属的势垒层位于低功函数金属上。

3. 发明申请

US20140138673A1 SELF-ALIGNED METAL OXIDE TFT WITH REDUCED NUMBER OF MASKS AND WITH REDUCED POWER CONSUMPTION 有权
标题翻译：自对准金属氧化物膜，具有减少数量的掩模和降低功耗
公开(公告)号：US20140138673A1
公开(公告)日：2014-05-22
申请号：US14071644
申请日：2013-11-05
申请人： Chan- Long Shieh , Gang Yu , Fatt Foong
发明人： Chan- Long Shieh , Gang Yu , Fatt Foong
IPC分类号： H01L29/66 , H01L27/12 , H01L29/786
CPC分类号： H01L29/78696 , H01L21/02554 , H01L21/02565 , H01L21/707 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.
摘要翻译：制造MOTFT的方法包括将不透明栅极金属定位在透明基板上，沉积覆盖栅极金属的栅介质材料和周围区域，以及在其上沉积金属氧化物半导体材料。蚀刻停止材料沉积在半导体材料上。光致抗蚀剂界定半导体材料中的隔离区。从基板的后表面露出光致抗蚀剂，除去暴露的部分以使蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。蚀刻半导体材料的未覆盖部分以隔离TFT。使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。沉积和图案化导电材料以形成源区和漏区。

4. 发明申请

US20150249197A1 Active Matrix Light Emitting Diode Array and Projector Display Comprising It 有权
标题翻译：有源矩阵发光二极管阵列和投影仪显示器
公开(公告)号：US20150249197A1
公开(公告)日：2015-09-03
申请号：US14620910
申请日：2015-02-12
申请人： Chan- Long Shieh , Gang Yu
发明人： Chan- Long Shieh , Gang Yu
IPC分类号： H01L33/64 , H01L33/62 , H01L33/44 , H01L33/46 , H01L27/12 , H01L33/00
CPC分类号： H01L33/642 , H01L23/3677 , H01L27/1218 , H01L27/1225 , H01L27/1248 , H01L27/1262 , H01L27/1463 , H01L27/14663 , H01L27/14692 , H01L31/0368 , H01L31/0376 , H01L31/20 , H01L33/0075 , H01L33/44 , H01L33/46 , H01L33/62 , H01L2933/0025 , H01L2933/0033 , H01L2933/0066 , H01L2933/0075
摘要： A method of fabricating a pixelated projector display includes providing a wafer with a supporting substrate, a first semiconductive layer, an emission layer, and a second semiconductive layer. The wafer is patterned into an array of LEDs/LDs and a planarization layer is deposited over the array. One via for each LED/LD element is formed through the planarization layer. A MOTFT backplane is positioned on the planarization layer, one driver circuit in controlling electrical communication with each via through the planarization layer. A passivation layer is deposited over the MOTFT backplane and heat plugs are extended through the passivation layer, the MOTFT backplane, the planarization layer, and the III-V LED/LD wafer partially through the first semiconductive layer to thermally couple heat from the array of LEDs/LDs to the surface of the passivation layer. An upper end of the heat plugs is accessible for thermal coupling to a heat spreader and/or a heatsink.
摘要翻译：制造像素化投影仪显示器的方法包括向晶片提供支撑衬底，第一半导体层，发射层和第二半导体层。将晶片图案化成LED / LD阵列，并且平坦化层沉积在阵列上。通过平坦化层形成每个LED / LD元件的一个通孔。 MFTFT背板位于平坦化层上，一个驱动电路通过平坦化层控制与每个通孔的电连通。钝化层沉积在MOTFT背板上，并且热插塞通过钝化层，MOTFT背板，平坦化层和III-V LED / LD晶片部分延伸穿过第一半导体层，以热耦合来自 LED / LDs到钝化层的表面。散热器和/或散热器的热连接可以接近热塞的上端。

5. 发明申请

US20140167046A1 PIXELATED IMAGER WITH MOTFET AND PROCESS 有权
标题翻译：像素图像与MOTFET和过程
公开(公告)号：US20140167046A1
公开(公告)日：2014-06-19
申请号：US13713744
申请日：2012-12-13
申请人： Chan- Long Shieh , Gang Yu
发明人： Chan- Long Shieh , Gang Yu
IPC分类号： H01L31/20 , H01L31/0368 , H01L31/0376
CPC分类号： H01L31/20 , H01L27/1225 , H01L27/1463 , H01L27/14632 , H01L27/14663 , H01L27/14687 , H01L27/14692 , H01L31/0368 , H01L31/0376 , Y02E10/50
摘要： A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.
摘要翻译：制造像素化成像器的方法包括在接触层上提供底层接触层和感测元件覆盖层。橡皮布层通过隔离相邻感测元件的沟槽分离成感测元件的阵列。感测元件电极邻近覆盖沟槽的每个感测元件形成并且限定TFT。一层金属氧化物半导体（MOS）材料形成在覆盖电极的电介质层上，并且在覆盖层的暴露的上表面上形成与每个TFT相邻的感测元件。一层金属沉积在每个TFT上，并分离成在感测元件电极的相对侧上的源极/漏极。形成S / D电极之一的金属接触覆盖半导体层的暴露表面的MOS材料，由此阵列中的每个感测元件通过MOS材料电连接到相邻的TFT。

6. 发明申请

US20160218128A1 Active Matrix Light Emitting Diode Array and Projector Display Comprising It 有权
标题翻译：有源矩阵发光二极管阵列和投影仪显示器
公开(公告)号：US20160218128A1
公开(公告)日：2016-07-28
申请号：US15087716
申请日：2016-03-31
申请人： Chan- Long Shieh , Gang Yu
发明人： Chan- Long Shieh , Gang Yu
IPC分类号： H01L27/146
CPC分类号： H01L27/14609 , H01L27/1225 , H01L27/1248 , H01L27/1262 , H01L27/14603 , H01L27/1463 , H01L27/14663 , H01L27/14692 , H01L27/156 , H01L33/0075 , H01L33/44 , H01L33/46 , H01L33/62 , H01L33/642 , H01L2933/0025 , H01L2933/0033 , H01L2933/0066 , H01L2933/0075
摘要： A method of fabricating a pixelated imager and structure including a substrate with a bottom contact layer and active element blanket layers deposited on the bottom contact layer. The blanket layers are separated into an array of active elements with trenches isolating adjacent active elements in the array. A dielectric passivation/planarization layer is positioned over the array of active elements. An array of active element readout circuits overlies the passivation/planarization layer above the trenches with one active element readout circuit coupled to each active element of the array of active elements. Each active element and coupled active element readout circuit defines a pixel and the array of active elements and the coupled array of active element readout circuits defines a pixelated imager, and the readout circuit coupled to each active element includes at least one TFT with an active channel comprising a metal-oxide semiconductor material.
摘要翻译：一种制造像素化成像器和结构的方法，其包括具有沉积在底部接触层上的底部接触层和有源元件覆盖层的衬底。橡皮布层被分成具有隔离阵列中的相邻有源元件的沟槽的有源元件阵列。电介质钝化/平坦化层位于有源元件阵列上方。有源元件读出电路的阵列覆盖在沟槽上方的钝化/平坦化层，其中一个有源元件读出电路耦合到有源元件阵列的每个有源元件。每个有源元件和耦合有源元件读出电路限定像素，并且有源元件阵列和有源元件读出电路的耦合阵列限定像素化成像器，并且耦合到每个有源元件的读出电路包括至少一个具有有源沟道的TFT 包括金属氧化物半导体材料。

7. 发明申请

US20160197139A1 STABLE AMORPHOUS METAL OXIDE SEMICONDUCTOR 审中-公开
公开(公告)号：US20160197139A1
公开(公告)日：2016-07-07
申请号：US15072744
申请日：2016-03-17
申请人： Chan- Long Shieh , Gang Yu
发明人： Chan- Long Shieh , Gang Yu
IPC分类号： H01L29/04 , H01L29/24 , H01L29/786
CPC分类号： H01L29/04 , H01L21/00 , H01L21/02554 , H01L21/02565 , H01L21/02592 , H01L21/16 , H01L21/28556 , H01L27/1214 , H01L27/1225 , H01L29/24 , H01L29/7869 , H01L29/78693 , H01L51/5012
摘要： A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.

8. 发明申请

US20140120640A1 LED DIE DISPERSAL IN DISPLAYS AND LIGHT PANELS WITH PRESERVING NEIGHBORING RELATIONSHIP 有权
标题翻译：显示屏和LED面板中的LED指示灯保持相邻关系
公开(公告)号：US20140120640A1
公开(公告)日：2014-05-01
申请号：US13663519
申请日：2012-10-30
申请人： Chan- Long Shieh , Gang Yu
发明人： Chan- Long Shieh , Gang Yu
IPC分类号： H01L33/00 , H01L31/18
CPC分类号： H01L21/6836 , H01L21/67144 , H01L21/67721 , H01L21/68757 , H01L21/68778 , H01L25/042 , H01L25/0753 , H01L25/50 , H01L27/1222 , H01L27/1225 , H01L31/18 , H01L33/0095 , H01L33/44 , H01L33/58 , H01L33/62 , H01L2224/83 , H01L2224/95 , H01L2225/06527 , H01L2225/06555 , H01L2924/0002 , H01L2933/0025 , H01L2933/0058 , H01L2933/0066 , Y10T156/171 , H01L2924/00
摘要： A method of dispersing semiconductor chips from a wafer of semiconductor chips onto a substrate while preserving the neighboring relationship of each chip to each adjacent chip is disclosed. The method includes dispersing the wafer into sequential columns of semiconductor chips with a first pitch between columns while preserving the neighboring relationship and sequentially dispersing the columns of semiconductor chips into rows of individual chips with a second pitch between rows onto a substrate while preserving the neighboring relationship.
摘要翻译：公开了将半导体芯片从半导体芯片的晶片分散到基板上同时保持每个芯片与每个相邻芯片的相邻关系的方法。该方法包括将晶片分散在具有列之间的第一间距的顺序的半导体芯片列中，同时保持相邻关系，并将半导体芯片的列顺序地分散到具有行之间的第二间距的单个芯片行到基板上，同时保持相邻关系。

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