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1. 发明授权

US08173507B2 Methods of forming integrated circuitry comprising charge storage transistors 有权
标题翻译：形成集成电路的方法包括电荷存储晶体管
公开(公告)号：US08173507B2
公开(公告)日：2012-05-08
申请号：US12820214
申请日：2010-06-22
申请人： Chan Lim , Jennifer Lequn Liu , Brian Dolan , Saurabh Keshav , Hongbin Zhu
发明人： Chan Lim , Jennifer Lequn Liu , Brian Dolan , Saurabh Keshav , Hongbin Zhu
IPC分类号： H01L21/8247
CPC分类号： H01L21/823456 , H01L21/28114 , H01L21/28282 , H01L21/31111 , H01L21/31116 , H01L21/31122 , H01L21/31155 , H01L27/11568 , H01L29/517
摘要： Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control gate material over the high-k dielectric. The stack is etched at least to the tunnel dielectric to form a plurality of charge storage transistor gate lines over the semiconductive material. Individual of the gate lines have laterally projecting feet which include the high-k dielectric. After etching the stack to form the gate lines, ions are implanted into an implant region which includes the high-k dielectric of the laterally projecting feet. The ions are chemically inert to the high-k dielectric. The ion implanted high-k dielectric of the projecting feet is etched selectively relative to portions of the high-k dielectric outside of the implant region.
摘要翻译：方法包括在半导体材料上形成电荷存储晶体管栅叠层。一个这样的堆叠包括隧道电介质，隧道电介质上的电荷存储材料，电荷存储材料上的高k电介质，以及高k电介质上的导电控制栅极材料。该堆叠至少蚀刻到隧道电介质以在半导体材料上形成多个电荷存储晶体管栅极线。栅极线的单独具有横向突出的脚，其包括高k电介质。在蚀刻堆叠以形成栅极线之后，将离子注入到包括横向突出的脚的高k电介质的植入区域中。离子对高k电介质是化学惰性的。选择性地相对于植入区域外的高k电介质的部分蚀刻投影脚的离子注入的高k电介质。

2. 发明申请

US20110312171A1 Methods Of Forming Integrated Circuitry Comprising Charge Storage Transistors 有权
标题翻译：形成集成电路的方法包括电荷存储晶体管
公开(公告)号：US20110312171A1
公开(公告)日：2011-12-22
申请号：US12820214
申请日：2010-06-22
申请人： Chan Lim , Jennifer Lequn Liu , Brian Dolan , Saurabh Keshav , Hongbin Zhu
发明人： Chan Lim , Jennifer Lequn Liu , Brian Dolan , Saurabh Keshav , Hongbin Zhu
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L21/823456 , H01L21/28114 , H01L21/28282 , H01L21/31111 , H01L21/31116 , H01L21/31122 , H01L21/31155 , H01L27/11568 , H01L29/517
摘要： Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control gate material over the high-k dielectric. The stack is etched at least to the tunnel dielectric to form a plurality of charge storage transistor gate lines over the semiconductive material. Individual of the gate lines have laterally projecting feet which include the high-k dielectric. After etching the stack to form the gate lines, ions are implanted into an implant region which includes the high-k dielectric of the laterally projecting feet. The ions are chemically inert to the high-k dielectric. The ion implanted high-k dielectric of the projecting feet is etched selectively relative to portions of the high-k dielectric outside of the implant region.
摘要翻译：方法包括在半导体材料上形成电荷存储晶体管栅叠层。一个这样的堆叠包括隧道电介质，隧道电介质上的电荷存储材料，电荷存储材料上的高k电介质，以及高k电介质上的导电控制栅极材料。该堆叠至少蚀刻到隧道电介质以在半导体材料上形成多个电荷存储晶体管栅极线。栅极线的单独具有横向突出的脚，其包括高k电介质。在蚀刻堆叠以形成栅极线之后，将离子注入到包括横向突出的脚的高k电介质的植入区域中。离子对高k电介质是化学惰性的。选择性地相对于植入区域外的高k电介质的部分蚀刻投影脚的离子注入的高k电介质。

3. 发明授权

US09293319B2 Removal of metal 有权
标题翻译：去除金属
公开(公告)号：US09293319B2
公开(公告)日：2016-03-22
申请号：US13044134
申请日：2011-03-09
申请人： Brian Dolan , Robert J. Hanson , Chan Lim
发明人： Brian Dolan , Robert J. Hanson , Chan Lim
IPC分类号： B08B3/00 , H01L21/02 , H01L21/66
CPC分类号： H01L21/02071 , H01L22/12 , H01L22/20
摘要： Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, and exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.
摘要翻译：从基板的一部分去除金属的方法在集成电路制造中是有用的。方法包括将底物暴露于包含至少一种氧化剂和至少一种还原剂的氧化环境中，并将底物暴露于包含至少一种还原剂和至少一种氧化剂的还原环境中。

4. 发明申请

US20120231561A1 REMOVAL OF METAL 有权
标题翻译：金属去除
公开(公告)号：US20120231561A1
公开(公告)日：2012-09-13
申请号：US13044134
申请日：2011-03-09
申请人： Brian Dolan , Robert J. Hanson , Chan Lim
发明人： Brian Dolan , Robert J. Hanson , Chan Lim
IPC分类号： H01L21/66 , H01L21/3065
CPC分类号： H01L21/02071 , H01L22/12 , H01L22/20
摘要： Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, and exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.
摘要翻译：从基板的一部分去除金属的方法在集成电路制造中是有用的。方法包括将底物暴露于包含至少一种氧化剂和至少一种还原剂的氧化环境中，并将底物暴露于包含至少一种还原剂和至少一种氧化剂的还原环境中。

5. 发明申请

US20120225562A1 Methods Of Removing Noble Metal-Containing Nanoparticles 有权
标题翻译：去除含贵金属的纳米粒子的方法
公开(公告)号：US20120225562A1
公开(公告)日：2012-09-06
申请号：US13470911
申请日：2012-05-14
申请人： Fatma Arzum Simsek-Ege , Brian Dolan
发明人： Fatma Arzum Simsek-Ege , Brian Dolan
IPC分类号： H01L21/306
CPC分类号： H01L21/32134 , B82Y10/00 , H01L21/0206 , H01L21/28273 , H01L27/11529 , H01L29/66825
摘要： Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
摘要翻译：一些实施方案包括从基材上除去含贵金属的颗粒的方法。将基材暴露于降低含贵金属的颗粒和基材之间的粘附性的组合物，同时将基材纺丝以从基材中除去至少一些含贵金属的颗粒。一些实施例包括跨越半导体晶片形成隧道电介质材料的方法。穿过隧道电介质材料形成金属纳米颗粒。在金属纳米颗粒上形成两层或更多种不同材料的堆叠。堆叠的一部分用保护罩覆盖，而堆叠的另一部分保持不受保护。去除堆的未保护部分以暴露一些金属纳米颗粒。对半导体晶片进行蚀刻剂，该蚀刻剂适于对至少一些暴露的金属纳米颗粒进行底切，并同时旋转半导体晶片。

6. 发明申请

US20100291764A1 Methods Of Removing Noble Metal-Containing Nanoparticles, Methods Of Forming NAND String Gates, And Methods Of Forming Integrated Circuitry 有权
标题翻译：去除含贵金属的纳米粒子的方法，形成NAND串门的方法和形成集成电路的方法
公开(公告)号：US20100291764A1
公开(公告)日：2010-11-18
申请号：US12467718
申请日：2009-05-18
申请人： Fatma Arzum Simsek-Ege , Brian Dolan
发明人： Fatma Arzum Simsek-Ege , Brian Dolan
IPC分类号： H01L21/3205 , B44C1/22
CPC分类号： H01L21/32134 , B82Y10/00 , H01L21/0206 , H01L21/28273 , H01L27/11529 , H01L29/66825
摘要： Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
摘要翻译：一些实施方案包括从基材上除去含贵金属的颗粒的方法。将基材暴露于降低含贵金属的颗粒和基材之间的粘附性的组合物，同时将基材纺丝以从基材中除去至少一些含贵金属的颗粒。一些实施例包括跨越半导体晶片形成隧道电介质材料的方法。穿过隧道电介质材料形成金属纳米颗粒。在金属纳米颗粒上形成两层或更多种不同材料的堆叠。堆叠的一部分用保护罩覆盖，而堆叠的另一部分保持不受保护。去除堆的未保护部分以暴露一些金属纳米颗粒。对半导体晶片进行蚀刻剂，该蚀刻剂适于对至少一些暴露的金属纳米颗粒进行底切，并同时旋转半导体晶片。

7. 发明授权

US08507387B2 Methods of removing noble metal-containing nanoparticles 有权
标题翻译：去除含贵金属纳米颗粒的方法
公开(公告)号：US08507387B2
公开(公告)日：2013-08-13
申请号：US13470911
申请日：2012-05-14
申请人： Fatma Arzum Simsek-Ege , Brian Dolan
发明人： Fatma Arzum Simsek-Ege , Brian Dolan
IPC分类号： H01L21/306
CPC分类号： H01L21/32134 , B82Y10/00 , H01L21/0206 , H01L21/28273 , H01L27/11529 , H01L29/66825
摘要： Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
摘要翻译：一些实施方案包括从基材上除去含贵金属的颗粒的方法。将基材暴露于降低含贵金属的颗粒和基材之间的粘附性的组合物，同时将基材纺丝以从基材中除去至少一些含贵金属的颗粒。一些实施例包括跨越半导体晶片形成隧道电介质材料的方法。穿过隧道电介质材料形成金属纳米颗粒。在金属纳米颗粒上形成两层或更多种不同材料的堆叠。堆叠的一部分用保护罩覆盖，而堆叠的另一部分保持不受保护。去除堆的未保护部分以暴露一些金属纳米颗粒。对半导体晶片进行蚀刻剂，该蚀刻剂适于对至少一些暴露的金属纳米颗粒进行底切，并同时旋转半导体晶片。

8. 发明申请

US20120303559A1 CREATION, USE AND TRAINING OF COMPUTER-BASED DISCOVERY AVATARS 审中-公开
标题翻译：创建，使用和培训基于计算机的发现空间
公开(公告)号：US20120303559A1
公开(公告)日：2012-11-29
申请号：US13480734
申请日：2012-05-25
申请人： Brian Dolan
发明人： Brian Dolan
IPC分类号： G06F15/18 , G06F17/30
CPC分类号： G06N20/00
摘要： In embodiments of the present invention improved capabilities are described for developing, training, validating and deploying discovery avatars embodying mathematical models that may be used for document and data discovery and deployed within large data repositories.
摘要翻译：在本发明的实施例中，描述了用于开发，训练，验证和部署体现可用于文档和数据发现并部署在大数据存储库内的数学模型的发现头像的改进的能力。

9. 发明授权

US08242008B2 Methods of removing noble metal-containing nanoparticles, methods of forming NAND string gates, and methods of forming integrated circuitry 有权
标题翻译：去除含贵金属纳米粒子的方法，形成NAND串门的方法以及形成集成电路的方法
公开(公告)号：US08242008B2
公开(公告)日：2012-08-14
申请号：US12467718
申请日：2009-05-18
申请人： Fatma Arzum Simsek-Ege , Brian Dolan
发明人： Fatma Arzum Simsek-Ege , Brian Dolan
IPC分类号： H01L21/3205
CPC分类号： H01L21/32134 , B82Y10/00 , H01L21/0206 , H01L21/28273 , H01L27/11529 , H01L29/66825
摘要： Some embodiments include methods of removing noble metal-containing particles from over a substrate. The substrate is exposed to a composition that reduces adhesion between the noble metal-containing particles and the substrate, and simultaneously the substrate is spun to sweep at least some of the noble metal-containing particles off from the substrate. Some embodiments include methods in which tunnel dielectric material is formed across a semiconductor wafer. Metallic nanoparticles are formed across the tunnel dielectric material. A stack of two or more different materials is formed over the metallic nanoparticles. A portion of the stack is covered with a protective mask while another portion of the stack is left unprotected. The unprotected portion of the stack is removed to expose some of the metallic nanoparticles. The semiconductor wafer to is subjected to etchant suitable to undercut at least some of the exposed metallic nanoparticles, and simultaneously the semiconductor wafer is spun.
摘要翻译：一些实施方案包括从基材上除去含贵金属的颗粒的方法。将基材暴露于降低含贵金属的颗粒和基材之间的粘附性的组合物，同时将基材纺丝以从基材中除去至少一些含贵金属的颗粒。一些实施例包括跨越半导体晶片形成隧道电介质材料的方法。穿过隧道电介质材料形成金属纳米颗粒。在金属纳米颗粒上形成两层或更多种不同材料的堆叠。堆叠的一部分用保护罩覆盖，而堆叠的另一部分保持不受保护。去除堆的未保护部分以暴露一些金属纳米颗粒。对半导体晶片进行蚀刻剂，该蚀刻剂适于对至少一些暴露的金属纳米颗粒进行底切，并同时旋转半导体晶片。

10. 发明申请

US20080154717A1 Publisher scoring 审中-公开
标题翻译：发行商得分
公开(公告)号：US20080154717A1
公开(公告)日：2008-06-26
申请号：US11644127
申请日：2006-12-22
申请人： Qasim Saifee , Steve Dang , Brian Dolan
发明人： Qasim Saifee , Steve Dang , Brian Dolan
IPC分类号： G06Q30/00
CPC分类号： G06Q30/02 , G06Q30/0263 , G06Q30/0273 , G06Q30/0277
摘要： A system and method are disclosed for a publisher scoring algorithm. Various factors or variables are analyzed for publishers to determine a score associated with the publishers. The score may be a reflection of the success or value a publisher provides to an advertisement provider or an advertiser.
摘要翻译：公开了一种用于发行商评分算法的系统和方法。为发布者分析各种因素或变量，以确定与发布商相关的分数。得分可能反映了发布商向广告提供商或广告商提供的成功或价值。

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