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    • 1. 发明授权
    • CRC verification apparatus with constant delay and method thereof
    • 具有恒定延迟的CRC校验装置及其方法
    • US07194672B2
    • 2007-03-20
    • US10723551
    • 2003-11-25
    • Chan KimSeung Hwan KimTae Whan YooHyeong Ho Lee
    • Chan KimSeung Hwan KimTae Whan YooHyeong Ho Lee
    • H03M13/00
    • H03M13/091
    • An apparatus and method for detecting errors in received data and transferring only error-free data in data communications are provided. In the cyclic redundancy check (CRC) verification apparatus and method having a constant delay, irrespective of the length of a received data frame, input and output processing delay of received data is made to be constant. The CRC verification apparatus having constant delay comprises an input control unit which stores the start address of an input data frame in a memory storing the input data frame, and stores a CRC verification result in the start address location; and an output control unit which after a predetermined constant time passes from the start address, reads an input data frame and if the CRC verification result is normal, output the read data frame. The apparatus and method make the time taken for receiving a data frame, constant irrespective of the received data frame, while CRC verification is performed.
    • 提供了用于检测接收到的数据中的错误并且仅传送数据通信中的无错误数据的装置和方法。 在具有恒定延迟的循环冗余校验(CRC)验证装置和方法中,与接收到的数据帧的长度无关,使得接收数据的输入和输出处理延迟是恒定的。 具有恒定延迟的CRC校验装置包括输入控制单元,其将输入数据帧的起始地址存储在存储输入数据帧的存储器中,并将CRC验证结果存储在起始地址位置; 以及输出控制单元,其在从起始地址经过预定的恒定时间之后,读取输入数据帧,并且如果CRC验证结果正常,则输出读取的数据帧。 该装置和方法使得接收数据帧所花费的时间,不管接收的数据帧是多少,而执行CRC校验。
    • 2. 发明授权
    • Method and apparatus for processing ethernet data frame in media access control (MAC) sublayer of ethernet passive optical network (PON)
    • 以太网无源光网络(PON)的媒体访问控制(MAC)子层中处理以太网数据帧的方法和装置
    • US07274695B2
    • 2007-09-25
    • US10646062
    • 2003-08-22
    • Seung Hwan KimTae Whan YooHyeong Ho Lee
    • Seung Hwan KimTae Whan YooHyeong Ho Lee
    • H04L12/28H04J3/16H04J3/24
    • H04L1/0061H04L1/0072H04L69/08H04L69/32H04Q11/0066H04Q11/0067H04Q11/0071H04Q2011/0064
    • A method and apparatus for processing Ethernet data frames in a media access control (MAC) sublayer of an Ethernet passive optical network (PON) are provided. The apparatus for processing protocol layers of an Ethernet passive optical network (PON) includes: an Emulation sublayer processing unit which performs cyclic redundancy check (CRC) on information included in a preamble of an Ethernet data frame transferred from a physical layer processing unit, and extracts LLIDs from the preamble; a MAC sublayer processing unit, which has one MAC address corresponding to multiple LLID indexes corresponding to the extracted LLIDs, to perform control and management; a MAC control sublayer processing unit which contains information of the multiple LLID indexes, and performs MAC control on each LLID index; a PON bridge sublayer processing unit which performs a bridge function of the Ethernet PON and tag management of the Ethernet PON; and an Emulated-MAC sublayer processing unit which performs upstream and downstream Ethernet data frame matching, FCS error checking, and PAUSE frame processing. Therefore, an effect exists in that when processing the Ethernet frames, an interface suited to the Ethernet PON system is provided.
    • 提供了一种用于处理以太网无源光网络(PON)的媒体访问控制(MAC)子层中的以太网数据帧的方法和装置。 用于处理以太网无源光网络(PON)的协议层的装置包括:仿真子层处理单元,对从物理层处理单元传送的以太网数据帧的前导码中包括的信息执行循环冗余校验(CRC),以及 从前导码中提取LLID; MAC子层处理单元,其具有对应于与所提取的LLID相对应的多个LLID索引的一个MAC地址,以执行控制和管理; MAC控制子层处理单元,其包含多个LLID索引的信息,并对每个LLID索引执行MAC控制; 执行以太网PON的桥接功能和以太网PON的标签管理的PON桥接子层处理单元; 以及执行上游和下游以太网数据帧匹配,FCS错误检查和暂停帧处理的仿真MAC子层处理单元。 因此,在处理以太网帧时,提供了适用于以太网PON系统的接口。
    • 3. 发明授权
    • Apparatus for executing multi-point control protocol in Ethernet passive optical network
    • 以太网无源光网络中执行多点控制协议的设备
    • US07301970B2
    • 2007-11-27
    • US10629889
    • 2003-07-29
    • Chan KimHo Sook LeeTae Whan YooHyeong Ho Lee
    • Chan KimHo Sook LeeTae Whan YooHyeong Ho Lee
    • H04J3/04
    • H04Q11/0067H04Q11/0066H04Q2011/0064
    • A MAC master apparatus for executing a multi-point control protocol (MPCP) data in an optical line termination (OLT) of an Ethernet passive optical network (PON) is provided. The MPCP master apparatus includes a CPU interface unit, two or more memory arbitration control units, a SGA table memory, a RTT table memory, a static grant generation unit, a dynamic grant generation unit, a static grant queue, a dynamic grant queue, a sending message queue, a sending multiplexing unit, a time setting unit, a receiving window generation unit, an upstream grant queue, a received demultiplexing unit, a report queue and a received message queue. Therefore, any frame, including MPCP frames from/to the CPU can be sent or received, and a grant can be allocated statically according to a setting or dynamically according to a report from the ONUs.
    • 提供了一种用于在以太网无源光网络(PON)的光线路终端(OLT)中执行多点控制协议(MPCP)数据的MAC主设备。 MPCP主设备包括CPU接口单元,两个或多个存储器仲裁控制单元,SGA表存储器,RTT表存储器,静态授权生成单元,动态授权生成单元,静态授权队列,动态授权队列, 发送消息队列,发送多路复用单元,时间设定单元,接收窗口生成单元,上游准许队列,接收解复用单元,报告队列和接收到的消息队列。 因此,可以发送或接收包括来自/到CPU的MPCP帧的任何帧,并且可以根据设置或动态地根据来自ONU的报告来静态地分配许可。
    • 4. 发明授权
    • Ethernet switch, and apparatus and method for expanding port
    • 以太网交换机,扩展端口的设备和方法
    • US07599353B2
    • 2009-10-06
    • US10739737
    • 2003-12-17
    • Chan KimTae Whan YooHyeong Ho Lee
    • Chan KimTae Whan YooHyeong Ho Lee
    • H04L12/66
    • H04L49/45H04L49/351
    • An Ethernet switch having a function of expanding a port, apparatus and method for expanding a port are provided. A receiver receives a frame including predetermined port identification information. An information detector detects the predetermined port identification information and a terminal address of a terminal connected to a sub port corresponding to the predetermined port identification information. A storage unit stores an address table including the terminal address and the predetermined port identification information. A reader reads port identification information corresponding to a destination address included in the frame from the address table. A frame transformer adds the read port identification information to the frame. An output unit outputs the frame transformed by the frame transformer to a main port connected to a sub port corresponding to the read port identification information among main ports that can be connected to at least one sub port.
    • 提供具有扩展用于扩展端口的端口,装置和方法的功能的以太网交换机。 接收机接收包括预定端口识别信息的帧。 信息检测器检测预定端口识别信息和连接到与预定端口识别信息对应的子端口的终端的终端地址。 存储单元存储包括终端地址和预定端口识别信息的地址表。 读取器从地址表读取与帧中包括的目的地地址对应的端口识别信息。 帧转换器将读端口识别信息添加到帧。 输出单元将帧变换器变换后的帧输出到与能够与至少一个子端口连接的主端口中对应于读端口识别信息的子端口连接的主端口。
    • 7. 发明授权
    • MB810 encoder/decoder, dual mode encoder/decoder, and MB810 code generating method
    • MB810编码器/解码器,双模式编码器/解码器和MB810代码生成方法
    • US07290202B2
    • 2007-10-30
    • US10848944
    • 2004-05-19
    • Sungsoo KangTae Whan YooHyeong Ho Lee
    • Sungsoo KangTae Whan YooHyeong Ho Lee
    • H03M13/00G06F11/00G08C25/00H04L1/00
    • H03M5/02H03M5/145H03M7/04
    • An MB810 encoder and/or decoder, dual mode encoder and/or decoder, and a method for generating MB810 codes are provided. Twelve state points in the form of a 4×3 matrix on a state transition map are formed with binary unit digital sum variation & alternate sum variation (BUDA). A 10-bit code from 8-bit data is generated outputting a 10-bit code from a predetermined state point to form the matrix. Codes forming a complementary pair from a set of codes capable of arriving at state points forming the matrix are selected. Codes forming the 12 state points by supplementing state points lacked in the codes forming a complementary pair are selected. Control codes including IDLE code from the codes forming the 12 state points are selected. Codes generating the IDLE code by a bit string between neighboring codes among the codes forming the 12 state points are removed.
    • 提供了一种MB810编码器和/或解码器,双模式编码器和/或解码器,以及用于生成MB810代码的方法。 状态转换图上4x3矩阵形式的12个状态点由二进制单位数字和变化和交替和变化(BUDA)形成。 生成来自8位数据的10位代码,从预定状态点输出10位代码以形成矩阵。 选择从能够到达形成矩阵的状态点的一组代码形成互补对的代码。 选择通过补充形成互补对的代码中缺少的状态点来形成12个状态点的代码。 选择包含形成12个状态点的代码的IDLE代码的控制代码。 在形成12个状态点的代码中,通过相邻代码之间的位串产生IDLE代码的代码被去除。
    • 9. 发明授权
    • Dual mode decoder
    • 双模解码器
    • US07313751B2
    • 2007-12-25
    • US11231415
    • 2005-09-20
    • Sungsoo KangTae Whan YooHyeong Ho Lee
    • Sungsoo KangTae Whan YooHyeong Ho Lee
    • H03M13/00G06F11/00G08C25/00H04L1/00
    • H03M5/02H03M5/145H03M7/04
    • A dual mode decoder which includes an MB810 decoder; an 8B/10B decoder; a mode detection unit, a first low pass filter; a second low pass filter; an IDLE code detection unit which detects IDLE code and transfers to the mode detection unit; a first switch unit which selectively outputs the 10-bit code input from the first low pass filter and the second low pass filter; a parallel conversion unit which outputs a 10-bit parallel code; a first selection unit which provides the 10-bit parallel code to the decoder determined as the operation decoder between the MB810 decoder and the 8B/10B decoder; and a second selection unit which selectively outputs an 8-bit code corresponding to the 10-bit parallel code input form the decoder determined as the operation decoder.
    • 一种双模式解码器,包括一个MB810解码器; 一个8B / 10B解码器; 模式检测单元,第一低通滤波器; 第二低通滤波器; IDLE码检测单元,其检测IDLE码并传送到模式检测单元; 第一开关单元,其选择性地输出从第一低通滤波器和第二低通滤波器输入的10位代码; 并行转换单元,其输出10位并行代码; 第一选择单元,其将10位并行码提供给被确定为MB810解码器和8B / 10B解码器之间的操作解码器的解码器; 以及第二选择单元,其从被确定为操作解码器的解码器选择性地输出与10位并行代码输入相对应的8位代码。