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1. 发明授权

US09405693B2 Non-volatile memory cache performance improvement 有权
标题翻译：非易失性内存缓存性能提升
公开(公告)号：US09405693B2
公开(公告)日：2016-08-02
申请号：US13555803
申请日：2012-07-23
申请人： Cenk Ergan , Clark D. Nicholson , Daniel Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Daniel Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F12/08 , G06F3/06
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.
摘要翻译：为了提供更有效的持久存储设备，一个或多个长期存储介质与非易失性存储器一起被包括在内。在一个实施例中，非易失性存储器的一部分用作写入缓冲器和用于对长期存储介质的写入和读取的读高速缓存。提供了用于控制非易失性存储器作为写缓冲器和读缓存的使用的接口。此外，非易失性存储器的一部分用于为长期存储介质的特定扇区提供直接映射。关于永久存储设备的描述性数据被存储在非易失性存储器的另一部分中。

2. 发明授权

US08255645B2 Non-volatile memory cache performance improvement 有权
标题翻译：非易失性内存缓存性能提升
公开(公告)号：US08255645B2
公开(公告)日：2012-08-28
申请号：US13231088
申请日：2011-09-13
申请人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F12/02
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.
摘要翻译：为了提供更有效的持久存储设备，一个或多个长期存储介质与非易失性存储器一起被包括在内。在一个实施例中，非易失性存储器的一部分用作写入缓冲器和用于对长期存储介质的写入和读取的读高速缓存。提供了用于控制非易失性存储器作为写缓冲器和读缓存的使用的接口。此外，非易失性存储器的一部分用于为长期存储介质的特定扇区提供直接映射。关于永久存储设备的描述性数据被存储在非易失性存储器的另一部分中。

3. 发明申请

US20120290785A1 Non-Volatile Memory Cache Performance Improvement 有权
公开(公告)号：US20120290785A1
公开(公告)日：2012-11-15
申请号：US13555803
申请日：2012-07-23
申请人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.

4. 发明授权

US07644239B2 Non-volatile memory cache performance improvement 有权
标题翻译：非易失性内存缓存性能提升
公开(公告)号：US07644239B2
公开(公告)日：2010-01-05
申请号：US10837986
申请日：2004-05-03
申请人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F13/14
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.
摘要翻译：为了提供更有效的持久存储设备，一个或多个长期存储介质与非易失性存储器一起被包括在内。在一个实施例中，非易失性存储器的一部分用作写入缓冲器和用于对长期存储介质的写入和读取的读高速缓存。提供了用于控制非易失性存储器作为写缓冲器和读缓存的使用的接口。此外，非易失性存储器的一部分用于为长期存储介质的特定扇区提供直接映射。关于永久存储设备的描述性数据被存储在非易失性存储器的另一部分中。

5. 发明申请

US20120005422A1 Non-Volatile Memory Cache Performance Improvement 有权
标题翻译：非易失性内存缓存性能改进
公开(公告)号：US20120005422A1
公开(公告)日：2012-01-05
申请号：US13231088
申请日：2011-09-13
申请人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F12/16 , G06F12/00
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.
摘要翻译：为了提供更有效的持久存储设备，一个或多个长期存储介质与非易失性存储器一起被包括在内。在一个实施例中，非易失性存储器的一部分用作写入缓冲器和用于对长期存储介质的写入和读取的读高速缓存。提供了用于控制非易失性存储器作为写缓冲器和读缓存的使用的接口。此外，非易失性存储器的一部分用于为长期存储介质的特定扇区提供直接映射。关于永久存储设备的描述性数据被存储在非易失性存储器的另一部分中。

6. 发明授权

US08041904B2 Non-volatile memory cache performance improvement 有权
标题翻译：非易失性内存缓存性能提升
公开(公告)号：US08041904B2
公开(公告)日：2011-10-18
申请号：US12627710
申请日：2009-11-30
申请人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F12/02
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.
摘要翻译：为了提供更有效的持久存储设备，一个或多个长期存储介质与非易失性存储器一起被包括在内。在一个实施例中，非易失性存储器的一部分用作写入缓冲器和用于对长期存储介质的写入和读取的读高速缓存。提供了用于控制非易失性存储器作为写缓冲器和读缓存的使用的接口。此外，非易失性存储器的一部分用于为长期存储介质的特定扇区提供直接映射。关于永久存储设备的描述性数据被存储在非易失性存储器的另一部分中。

7. 发明申请

US20100077197A1 NON-VOLATILE MEMORY CACHE PERFORMANCE IMPROVEMENT 有权
标题翻译：非易失性存储器高速缓存性能改进
公开(公告)号：US20100077197A1
公开(公告)日：2010-03-25
申请号：US12627710
申请日：2009-11-30
申请人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
发明人： Cenk Ergan , Clark D. Nicholson , Dan Teodosiu , Dean L. DeWhitt , Emily Nicole Hill , Hanumantha R. Kodavalla , Michael J. Zwilling , John M. Parchem , Michael R. Fortin , Nathan Steven Obr , Rajeev Y. Nagar , Surenda Verma , Therron Powell , William J. Westerinen , Mark Joseph Zbikowski , Patrick L. Stemen
IPC分类号： G06F15/177 , G06F12/00 , G06F12/16 , G06F11/00
CPC分类号： G06F12/0866 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F12/08 , G06F2212/1016 , G06F2212/222 , G06F2212/281 , G06F2212/305 , G06F2212/312 , G06F2212/313 , Y02D10/13
摘要： In order to provide a more efficient persistent storage device, one or more long-term storage media are included along with a non-volatile memory. In one embodiment, one portion of the non-volatile memory is used as a write buffer and a read cache for writes and reads to the long-term storage media. Interfaces are provided for controlling the use of the non-volatile memory as a write buffer and a read cache. Additionally, a portion of the non-volatile memory is used to provide a direct mapping for specified sectors of the long-term storage media. Descriptive data regarding the persistent storage device is stored in another portion of the non-volatile memory.
摘要翻译：为了提供更有效的持久存储设备，一个或多个长期存储介质与非易失性存储器一起被包括在内。在一个实施例中，非易失性存储器的一部分用作写入缓冲器和用于对长期存储介质的写入和读取的读高速缓存。提供了用于控制非易失性存储器作为写缓冲器和读缓存的使用的接口。此外，非易失性存储器的一部分用于为长期存储介质的特定扇区提供直接映射。关于永久存储设备的描述性数据被存储在非易失性存储器的另一部分中。

8. 发明授权

US07082495B2 Method and apparatus to reduce power consumption and improve read/write performance of hard disk drives using non-volatile memory 有权
标题翻译：使用非易失性存储器降低功耗并提高硬盘驱动器读/写性能的方法和装置
公开(公告)号：US07082495B2
公开(公告)日：2006-07-25
申请号：US10372734
申请日：2003-02-21
申请人： Dean L. DeWhitt , Clark D. Nicholson , W. Jeff Westerinen , Michael R. Fortin , John M. Parchem , Charles P. Thacker
发明人： Dean L. DeWhitt , Clark D. Nicholson , W. Jeff Westerinen , Michael R. Fortin , John M. Parchem , Charles P. Thacker
IPC分类号： G06F12/00
CPC分类号： G06F1/3203 , G06F3/0601 , G06F9/4418 , G06F2003/0697 , Y02D10/44
摘要： A method and apparatus to improve the read/write performance of a hard drive is presented. The hard drive includes solid state, non-volatile (NV) memory as a read/write cache. Data specified by the operating system is stored in the NV memory. The operating system provides a list of data to be put in NV memory. The data includes data to be pinned in NV memory and data that is dynamic. Pinned data persists in NV memory until the operating system commands it to be flushed. Dynamic data can be flushed by the hard drive controller. Data sent by an application for storage is temporary stored in NV memory in data blocks until the operating system commits it to the disk.
摘要翻译：提出了一种提高硬盘驱动器的读/写性能的方法和装置。硬盘驱动器包括固态，非易失性（NV）存储器作为读/写高速缓存。由操作系统指定的数据存储在NV存储器中。操作系统提供要放入NV存储器的数据列表。数据包括要固定在NV存储器中的数据和动态数据。固定数据在NV存储器中仍然存在，直到操作系统命令它被刷新。动态数据可以由硬盘驱动器控制器刷新。存储应用程序发送的数据临时存储在数据块中的NV存储器中，直到操作系统提交到磁盘。

9. 发明申请

US20080178019A1 Using priorities and power usage to allocate power budget 有权
标题翻译：使用优先级和功率使用来分配功率预算
公开(公告)号：US20080178019A1
公开(公告)日：2008-07-24
申请号：US11655427
申请日：2007-01-19
申请人： Sean Nicholas McGrane , John M. Parchem
发明人： Sean Nicholas McGrane , John M. Parchem
IPC分类号： G06F1/26 , G06F1/00
CPC分类号： G06F1/26
摘要： Aspects of the subject matter described herein relate to using priorities and power usage to allocate power budget to devices. In aspects, a console that maintains power usage, priorities, and other power data regarding a set of devices may receive a notification that a device has exceeded its budgeted power. In response, using priorities and power usage associated with the devices, the console determines one or more devices to instruct to use less power. A device that exceeded its budgeted power may be instructed to operate at a lower power level or another device (e.g., a lower priority device that is underutilizing its budgeted power) may be instructed to reduce its power to remain below a power budget for the set of devices.
摘要翻译：本文描述的主题的方面涉及使用优先级和功率使用来向设备分配功率预算。在一些方面，维护关于一组设备的功率使用，优先级和其他功率数据的控制台可以接收设备已经超过其预算功率的通知。作为响应，使用与设备相关联的优先级和功率使用，控制台确定一个或多个设备来指示使用更少的功率。可以指示超过其预算功率的设备在较低功率水平下操作或者可以指示其他设备（例如，其预算功率不足的低优先级设备）降低其功率以保持低于该组的功率预算的设备。

10. 发明授权

US5708814A Method and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of events 失效
标题翻译：通过为一组事件产生单个中断来降低中断速率的方法和装置
公开(公告)号：US5708814A
公开(公告)日：1998-01-13
申请号：US561104
申请日：1995-11-21
申请人： Robert T. Short , John M. Parchem , David N. Cutler
发明人： Robert T. Short , John M. Parchem , David N. Cutler
IPC分类号： G06F13/24 , G06F13/00
CPC分类号： G06F13/24
摘要： A peripheral device interrupt controller maintains a count of pending interrupt events for a peripheral device up to a preset limit and times a preset delay interval from a first pending interrupt event or last interrupt servicing before asserting an interrupt request. When the interrupt request is asserted, the then pending interrupt events can be serviced as a group by a central processing unit of a computer. The overhead of processing a separate interrupt request for each interrupt event is thus avoided. The preset limit and preset delay interval can be set under software control to control the rate at which interrupt requests can be asserted by the peripheral device.
摘要翻译：外围设备中断控制器将外部设备的待处理中断事件计数保持到预设限制，并在断言中断请求之前从第一个待处理中断事件或最后一个中断服务计算一个预设的延迟时间间隔。当中断请求被断言时，可以由计算机的中央处理单元将当时挂起的中断事件作为一组进行处理。因此避免了对每个中断事件处理单独的中断请求的开销。可以在软件控制下设置预设限制和预设延迟时间间隔，以控制外围设备可以断言中断请求的速率。

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