专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06630976B2 Array substrate for use in LCD device 有权
标题翻译：用于LCD设备的阵列基板
公开(公告)号：US06630976B2
公开(公告)日：2003-10-07
申请号：US09736410
申请日：2000-12-15
申请人： Byung-Chul Ahn , Jae-Gu Lee , Yu-Ho Jung
发明人： Byung-Chul Ahn , Jae-Gu Lee , Yu-Ho Jung
IPC分类号： G02F11343
CPC分类号： G02F1/1368 , G02F2001/136272
摘要： A TFT array substrate for use in an LCD device includes at least one repair line to repair line defects. The repair line(s) is formed when forming the pixel electrode so that additional process steps are not required. Accordingly, productivity can be increased. Moreover, either a short-circuit or an open-circuit can be repaired due to the repair line(s). Thus, in the present invention, a TFT array substrate, including: a substrate; a gate line formed on the substrate, arranged in a transverse direction and having a gate electrode; a data line insulated against the gate line by a first insulation layer, arranged in a longitudinal direction perpendicular to the gate line, having a source electrode near the cross point of the gate and data lines, and having first and second data lines which are defined by a cross point of the gate and data lines; a drain electrode space apart from the source electrode over the gate electrode; a pixel electrode connecting to the drain electrode; and a repair line(s) insulated against the data and gate lines by insulation layers and overlapping the gate and data lines, one repair line overlapping a free end of the other repair line and the gate line.
摘要翻译：用于LCD装置的TFT阵列基板包括至少一条维修线以修复线缺陷。在形成像素电极时形成修复线，使得不需要额外的工艺步骤。因此，可以提高生产率。此外，由于维修线路可以修理短路或开路。因此，在本发明中，TFT阵列基板包括：基板; 形成在基板上的栅极线，沿横向布置并具有栅电极; 由垂直于栅极线的纵向方向布置的第一绝缘层与栅极线绝缘的数据线，在栅极和数据线的交叉点附近具有源电极，并且具有限定的第一和第二数据线通过栅极和数据线的交叉点; 位于栅电极之外的源极电极的漏电极空间; 连接到漏电极的像素电极; 以及通过绝缘层与数据线和栅极线绝缘并与栅极和数据线重叠的修复线，一条修复线与另一条修复线的自由端和栅极线重叠。

2. 发明授权

US06734049B2 Array substrate for liquid crystal display device and the fabrication method of the same 有权
公开(公告)号：US06734049B2
公开(公告)日：2004-05-11
申请号：US09734009
申请日：2000-12-12
申请人： Soon-Sung Yoo , Yong-Wan Kim , Yu-Ho Jung , Woo-Chae Lee
发明人： Soon-Sung Yoo , Yong-Wan Kim , Yu-Ho Jung , Woo-Chae Lee
IPC分类号： H01L2100
CPC分类号： G02F1/1368 , G02F1/136286 , H01L27/124 , H01L27/1288 , H01L29/41733
摘要： The present invention discloses an array substrate for an active-matrix LCD device and a method of fabricating the same. The array substrate reduces the number of masks typically used in the fabrication process so that reliability is enhanced and the cost is reduced over the conventional device and method. Electric shorts caused by hillocks can be prevented or reduced by incorporating short-preventing sections between the gate line and an overlapping pixel electrode.

3. 发明授权

US06642972B2 Array substrate for a liquid crystal display and method for fabricating thereof with insulating stack made from TFT layers between crossed conductors 有权
标题翻译：用于液晶显示器的阵列基板及其制造方法，其具有由交叉导体之间的TFT层制成的绝缘堆叠
公开(公告)号：US06642972B2
公开(公告)日：2003-11-04
申请号：US09892785
申请日：2001-06-28
申请人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
发明人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
IPC分类号： G02F11333
CPC分类号： G02F1/136286 , G02F1/133345 , G02F1/136204 , G02F2201/50
摘要： An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a first metal layer on a substrate, patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar, forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer, patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer, forming a passivation layer to cover the patterned second metal layer, forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes, and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.
摘要翻译：通过以下步骤制造用于液晶显示装置的阵列基板：在基板上形成第一金属层，图案化第一金属层以形成栅极线，栅电极，栅极焊盘，第一短路棒，以及第二短路棒，形成栅绝缘层，纯非晶硅层，掺杂非晶硅层和第二金属层以覆盖图案化的第一金属层，图案化第二金属层和掺杂的非晶硅层以形成第一第二和第三通孔以及第一和第二凹槽以暴露纯非晶硅层的一部分，第一和第二凹槽产生第二金属层的隔离部分，形成钝化层以覆盖图案化的第二金属层，形成源电极，漏电极，数据线，数据焊盘，绝缘段和第一，第二和第三接触孔，并形成像素电极，第一连接器和第二连接器透明导电材料。

4. 发明授权

US06760092B2 Method for fabricating an array substrate for a liquid crystal display with an insulating stack made from TFT layers between crossed conductors 有权
标题翻译：用于制造具有由交叉导体之间的TFT层制成的绝缘层的液晶显示器用阵列基板的方法
公开(公告)号：US06760092B2
公开(公告)日：2004-07-06
申请号：US10652311
申请日：2003-09-02
申请人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
发明人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
IPC分类号： G02F11333
CPC分类号： G02F1/136286 , G02F1/133345 , G02F1/136204 , G02F2201/50
摘要： An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a first metal layer on a substrate, patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar, forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer, patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer, forming a passivation layer to cover the patterned second metal layer, forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes, and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.
摘要翻译：通过以下步骤制造用于液晶显示装置的阵列基板：在基板上形成第一金属层，图案化第一金属层以形成栅极线，栅电极，栅极焊盘，第一短路棒，以及第二短路棒，形成栅绝缘层，纯非晶硅层，掺杂非晶硅层和第二金属层以覆盖图案化的第一金属层，图案化第二金属层和掺杂的非晶硅层以形成第一第二和第三通孔以及第一和第二凹槽以暴露纯非晶硅层的一部分，第一和第二凹槽产生第二金属层的隔离部分，形成钝化层以覆盖图案化的第二金属层，形成源电极，漏电极，数据线，数据焊盘，绝缘段以及第一，第二和第三接触孔，并形成像素电极，第一连接器和第二连接器透明导电材料。

5. 发明授权

US06177971B1 Slim type notebook personal computer 失效
标题翻译：超薄型笔记本个人电脑
公开(公告)号：US06177971B1
公开(公告)日：2001-01-23
申请号：US09210354
申请日：1998-12-11
申请人： Yu-Ho Jung , Jin-Kyu Kim
发明人： Yu-Ho Jung , Jin-Kyu Kim
IPC分类号： G02F11333
CPC分类号： G02F1/133308 , G02F2001/13332 , G02F2201/503
摘要： A slim type notebook personal computer mounted with a liquid crystal display module in such a manner to have a thin thickness. In the computer, a top bezel is secured to the edge of a lower glass substrate included in the liquid crystal display module. A buffing member positioned between the edge of the lower glass substrate and the top bezel buffs an impact to be applied to the edge of the lower glass substrate.
摘要翻译：安装有液晶显示模块的薄型笔记本个人计算机，其厚度薄。在计算机中，顶部挡板固定在液晶显示模块中包括的下部玻璃基板的边缘。定位在下玻璃基板的边缘和顶部边框之间的抛光构件将对下玻璃基板的边缘施加冲击。

6. 发明授权

US07428024B2 Array substrate for liquid crystal display device and the fabrication method of the same 有权
标题翻译：液晶显示装置用阵列基板及其制造方法
公开(公告)号：US07428024B2
公开(公告)日：2008-09-23
申请号：US10810659
申请日：2004-03-29
申请人： Soon-Sung Yoo , Yong-Wan Kim , Yu-Ho Jung , Woo-Chae Lee
发明人： Soon-Sung Yoo , Yong-Wan Kim , Yu-Ho Jung , Woo-Chae Lee
IPC分类号： G02F1/1343
CPC分类号： G02F1/1368 , G02F1/136286 , H01L27/124 , H01L27/1288 , H01L29/41733
摘要： The present invention discloses an array substrate for an active-matrix LCD device and a method of fabricating the same. The array substrate reduces the number of masks typically used in the fabrication process so that reliability is enhanced and the cost is reduced over the conventional device and method. Electric shorts caused by hillocks can be prevented or reduced by incorporating short-preventing sections between the gate line and an overlapping pixel electrode.
摘要翻译：本发明公开了一种有源矩阵LCD器件用阵列基板及其制造方法。阵列基板减少了在制造过程中通常使用的掩模的数量，从而提高了可靠性并且降低了成本比传统的装置和方法。通过在栅极线和重叠像素电极之间并入防短路部分，可以防止或减少由小丘引起的电短路。

7. 发明授权

US06627470B2 Array substrate for use in LCD device and method of fabricating same 有权
标题翻译：用于LCD装置的阵列基板及其制造方法
公开(公告)号：US06627470B2
公开(公告)日：2003-09-30
申请号：US09779438
申请日：2001-02-09
申请人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
发明人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
IPC分类号： H01L2100
CPC分类号： H01L29/66765 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1248 , H01L29/78669
摘要： A TFT array substrate has a PAI pattern, and the PAI pattern has an over-etched portion of the pure amorphous silicon layer. This over-etched portion prevents a short between the pixel electrode and the pure amorphous silicon layer (i.e., the active layer). The over-etched portion also enables the aperture ratio to increase. a gate line over a said substrate; a data line over the said substrate being perpendicular to the gate line; a passivation layer covering the data line, the passivation layer divided into a residual passivation layer and a etched passivation layer; a doped amorphous silicon layer formed under the data line and corresponding in size to the data line; a pure amorphous silicon layer formed under the doped amorphous silicon layer and having a over-etched portion in the peripheral portions, wherein the over-etched portion is over-etched from the edges of the residual passivation layer toward the inner side; an insulator layer under the pure amorphous silicon layer; a TFT formed near the crossing of the gate line and the data line; and a pixel electrode overlapping the data line and contacting the TFT.
摘要翻译： TFT阵列基板具有PAI图案，并且PAI图案具有纯非晶硅层的过蚀刻部分。该过蚀刻部分防止像素电极和纯非晶硅层（即有源层）之间的短路。过蚀刻部分还使孔径比增加。在所述衬底上的栅极线; 所述衬底上的数据线垂直于所述栅极线; 覆盖数据线的钝化层，钝化层分为残留钝化层和蚀刻钝化层; 形成在数据线之下且与数据线大小对应的掺杂非晶硅层; 形成在掺杂非晶硅层下面并且在周边部分中具有过蚀刻部分的纯非晶硅层，其中过蚀刻部分从残余钝化层的边缘向内侧被过度蚀刻; 在纯非晶硅层下面的绝缘体层; 形成在栅极线和数据线的交叉点附近的TFT; 以及与数据线重叠并与TFT接触的像素电极。

8. 发明授权

US08681305B2 Liquid crystal display device comprising a common line pattern formed correspond to the conductive seal pattern, a transparent electrode pattern overlapping the common line pattern with an insulating layer interposed there between, the transparent electrode pattern having a width equal to or less than that of the common line pattern 有权
标题翻译：包括形成的公共线图形的液晶显示装置对应于导电密封图案，与公共线图案重叠的透明电极图案与介于其间的绝缘层，透明电极图案的宽度等于或小于公共线图案的宽度线条图案
公开(公告)号：US08681305B2
公开(公告)日：2014-03-25
申请号：US12633710
申请日：2009-12-08
申请人： Yu-Ho Jung , Young-Seok Choi
发明人： Yu-Ho Jung , Young-Seok Choi
IPC分类号： G02F1/1345 , G02F1/1339
CPC分类号： G02F1/1345 , G02F1/1339 , G02F2201/121
摘要： A liquid crystal display device and a method for manufacturing the same, are discussed. The liquid crystal display device includes first and second substrates each having an active area and a non-active area, gate lines and data lines formed on the active area of the first substrate to define a plurality of pixel areas, thin film transistors formed at intersections of the gate and data lines, pixel electrodes, a common electrode formed over the second substrate, a conductive seal pattern between the first and second substrates, a common line pattern formed on the first substrate to correspond to the conductive seal pattern, and a transparent electrode pattern overlapping the common line pattern with an insulating layer interposed therebetween, the transparent electrode pattern having a width equal to or less than that of the common line pattern.
摘要翻译：讨论了液晶显示装置及其制造方法。液晶显示装置包括各自具有有源面积和非有效面积的第一基板和第二基板，形成在第一基板的有源区域上以限定多个像素区域的栅极线和数据线，在交叉点形成的薄膜晶体管栅极和数据线，像素电极，形成在第二衬底上的公共电极，第一和第二衬底之间的导电密封图案，形成在第一衬底上以对应于导电密封图案的公共线图案，以及透明电极图案与公共线图案重叠，绝缘层插入其间，透明电极图案的宽度等于或小于公共线图案的宽度。

9. 发明授权

US07027120B2 Liquid crystal display device and method of fabricating the same 有权
公开(公告)号：US07027120B2
公开(公告)日：2006-04-11
申请号：US10753449
申请日：2004-01-09
申请人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
发明人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
IPC分类号： G02F1/1333
CPC分类号： G02F1/133512 , G02F1/136286 , G02F2001/136295
摘要： A liquid crystal display device and a method of fabricating the same are disclosed in the present invention. More specifically, the method includes the steps forming a gate line on the first substrate sequentially forming a first insulating layer, an amorphous silicon layer, and a metal layer on the first substrate, patterning the metal layer to form a data line, forming a second insulating layer on the data line, patterning the second insulating layer and the amorphous silicon layer to form a passivation layer and an active layer, respectively, forming a pixel electrode at a pixel region defined by the gate and data lines, assembling the first substrate and the second substrate having a black matrix thereon, wherein the black matrix vertically overlaps at least one boundary line defined by different exposures during step-and-repeat exposure processes; and forming a liquid crystal layer between the first and second substrates.

10. 发明授权

US06992364B2 Array substrate for use in LCD device and method of fabricating same 有权
标题翻译：用于LCD装置的阵列基板及其制造方法
公开(公告)号：US06992364B2
公开(公告)日：2006-01-31
申请号：US10653283
申请日：2003-09-03
申请人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
发明人： Soon-Sung Yoo , Dong-Yeung Kwak , Hu-Sung Kim , Yu-Ho Jung , Yong-Wan Kim , Duk-Jin Park , Woo-Chae Lee
IPC分类号： H01L29/00
CPC分类号： H01L29/66765 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1248 , H01L29/78669
摘要： A TFT array substrate has a PAI pattern, and the PAI pattern has an over-etched portion of the pure amorphous silicon layer. This over-etched portion prevents a short between the pixel electrode and the pure amorphous silicon layer (i.e., the active layer). The over-etched portion also enables the aperture ratio to increase a gate line over a said substrate; a data line over the said substrate being perpendicular to the gate line; a passivation layer covering the data line, the passivation layer divided into a residual passivation layer and a etched passivation layer; a doped amorphous silicon layer formed under the data line and corresponding in size to the data line; a pure amorphous silicon layer formed under the doped amorphous silicon layer and having a over-etched portion in the peripheral portions, wherein the over-etched portion is over-etched from the edges of the residual passivation layer toward the inner side; an insulator layer under the pure amorphous silicon layer; a TFT formed near the crossing of the gate line and the data line; and a pixel electrode overlapping the data line and contacting the TFT.
摘要翻译： TFT阵列基板具有PAI图案，并且PAI图案具有纯非晶硅层的过蚀刻部分。该过蚀刻部分防止像素电极和纯非晶硅层（即有源层）之间的短路。过蚀刻部分还使孔径比增加了所述衬底上的栅极线; 所述衬底上的数据线垂直于所述栅极线; 覆盖数据线的钝化层，钝化层分为残留钝化层和蚀刻钝化层; 形成在数据线之下且与数据线大小对应的掺杂非晶硅层; 形成在掺杂非晶硅层下面并且在周边部分中具有过蚀刻部分的纯非晶硅层，其中过蚀刻部分从残余钝化层的边缘向内侧被过度蚀刻; 在纯非晶硅层下面的绝缘体层; 形成在栅极线和数据线的交叉点附近的TFT; 以及与数据线重叠并与TFT接触的像素电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式