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1. 发明授权

US07902553B2 Thin film transistor array panel and method for manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07902553B2
公开(公告)日：2011-03-08
申请号：US11930536
申请日：2007-10-31
申请人： Byoung-June Kim , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
发明人： Byoung-June Kim , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
IPC分类号： H01L29/04
CPC分类号： H01L27/1255 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L29/41733 , H01L29/4908 , H01L29/66742 , H01L29/66765
摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
摘要翻译：薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

2. 发明授权

US08486775B2 Thin film transistor array panel and method for manufacturing the same 有权
公开(公告)号：US08486775B2
公开(公告)日：2013-07-16
申请号：US13020467
申请日：2011-02-03
申请人： Byoung-June Kim , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
发明人： Byoung-June Kim , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
IPC分类号： H01L21/84
CPC分类号： H01L27/1255 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L29/41733 , H01L29/4908 , H01L29/66742 , H01L29/66765
摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.

3. 发明申请

US20110124163A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20110124163A1
公开(公告)日：2011-05-26
申请号：US13020467
申请日：2011-02-03
申请人： Byoung-June KIM , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
发明人： Byoung-June KIM , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
IPC分类号： H01L21/336 , H01L21/84
CPC分类号： H01L27/1255 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L29/41733 , H01L29/4908 , H01L29/66742 , H01L29/66765
摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
摘要翻译：薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

4. 发明申请

US20080185590A1 Thin Film Transistor Array Panel and Method for Manufacturing the Same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20080185590A1
公开(公告)日：2008-08-07
申请号：US11930536
申请日：2007-10-31
申请人： Byoung-June Kim , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
发明人： Byoung-June Kim , Jae-Ho Choi , Chang-Oh Jeong , Sung-Hoon Yang , Je-Hun Lee , Do-Hyun Kim , Hwa-Yeul Oh , Yong-Mo Choi
IPC分类号： H01L29/04 , H01L21/84
CPC分类号： H01L27/1255 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L29/41733 , H01L29/4908 , H01L29/66742 , H01L29/66765
摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
摘要翻译：薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

5. 发明授权

US08558230B2 Thin film transistor substrate and method of fabricating the same 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US08558230B2
公开(公告)日：2013-10-15
申请号：US12756323
申请日：2010-04-08
申请人： Dong-Hoon Lee , Je-Hun Lee , Do-Hyun Kim , Hee-Tae Kim , Chang-Oh Jeong , Pil-Sang Yun , Ki-Won Kim
发明人： Dong-Hoon Lee , Je-Hun Lee , Do-Hyun Kim , Hee-Tae Kim , Chang-Oh Jeong , Pil-Sang Yun , Ki-Won Kim
IPC分类号： H01L29/04 , H01L29/10
CPC分类号： H01L27/1225 , H01L27/1214 , H01L27/1288 , H01L29/7869
摘要： A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate wiring formed on an insulating substrate. Oxide active layer patterns may be formed on the gate wiring and may include a first substance. Data wiring may be formed on the oxide active layer patterns to cross the gate wiring and may include a second substance. Barrier layer patterns may be disposed between the oxide active layer patterns and the data wiring and may include a third substance.
摘要翻译：提供薄膜晶体管（TFT）基板及其制造方法。薄膜晶体管基板可以具有低电阻特性，并且可以减少有源层图案和数据布线之间的相互扩散和接触电阻。薄膜晶体管基板可以包括形成在绝缘基板上的栅极布线。氧化物有源层图案可以形成在栅极布线上，并且可以包括第一物质。数据布线可以形成在氧化物有源层图案上以跨越栅极布线，并且可以包括第二物质。阻挡层图案可以设置在氧化物活性层图案和数据布线之间，并且可以包括第三物质。

6. 发明授权

US08507956B2 Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating the thin film transistor substrate 有权
标题翻译：线结构，制造线的方法，薄膜晶体管基板以及制造薄膜晶体管基板的方法
公开(公告)号：US08507956B2
公开(公告)日：2013-08-13
申请号：US13051904
申请日：2011-03-18
申请人： Je-Hun Lee , Chang-Oh Jeong , Eun-Guk Lee , Do-Hyun Kim
发明人： Je-Hun Lee , Chang-Oh Jeong , Eun-Guk Lee , Do-Hyun Kim
IPC分类号： H01L33/00 , H01L29/43 , H01L29/49 , H01L29/76
CPC分类号： H01L29/458 , H01L27/124 , H01L29/4908
摘要： Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including a copper layer and a copper solid solution layer.
摘要翻译：提供线结构，制造线的方法，薄膜晶体管（TFT）基板和制造TFT基板的方法。导线结构包括在基板上形成的包含铜层和铜固溶体层的阻挡层。

7. 发明申请

US20100276686A1 THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20100276686A1
公开(公告)日：2010-11-04
申请号：US12756323
申请日：2010-04-08
申请人： Dong-Hoon Lee , Je-Hun Lee , Do-Hyun Kim , Hee-Tae Kim , Chang-Oh Jeong , Pil-Sang Yun , Ki-Won Kim
发明人： Dong-Hoon Lee , Je-Hun Lee , Do-Hyun Kim , Hee-Tae Kim , Chang-Oh Jeong , Pil-Sang Yun , Ki-Won Kim
IPC分类号： H01L29/786 , H01L29/12 , H01L21/336
CPC分类号： H01L27/1225 , H01L27/1214 , H01L27/1288 , H01L29/7869
摘要： A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate wiring formed on an insulating substrate. Oxide active layer patterns may be formed on the gate wiring and may include a first substance. Data wiring may be formed on the oxide active layer patterns to cross the gate wiring and may include a second substance. Barrier layer patterns may be disposed between the oxide active layer patterns and the data wiring and may include a third substance.
摘要翻译：提供薄膜晶体管（TFT）基板及其制造方法。薄膜晶体管基板可以具有低电阻特性，并且可以减少有源层图案和数据布线之间的相互扩散和接触电阻。薄膜晶体管基板可以包括形成在绝缘基板上的栅极布线。氧化物有源层图案可以形成在栅极布线上，并且可以包括第一物质。数据布线可以形成在氧化物有源层图案上以跨越栅极布线，并且可以包括第二物质。阻挡层图案可以设置在氧化物活性层图案和数据布线之间，并且可以包括第三物质。

8. 发明授权

US07811868B2 Method for manufacturing a signal line, thin film transistor panel, and method for manufacturing the thin film transistor panel 有权
标题翻译：信号线的制造方法，薄膜晶体管面板，以及薄膜晶体管面板的制造方法
公开(公告)号：US07811868B2
公开(公告)日：2010-10-12
申请号：US11932233
申请日：2007-10-31
申请人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
发明人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
IPC分类号： H01L21/768
CPC分类号： H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode.
摘要翻译：一种制造薄膜晶体管阵列面板的方法，包括在基板上形成栅极线; 在栅极线上顺序地形成栅极绝缘层，硅层和包括下层和上层的导体层，在导体层上形成光致抗蚀剂膜，图案化光致抗蚀剂膜以形成包括第一部分和第二部分具有比第一部分更大的厚度，通过使用光致抗蚀剂图案作为蚀刻掩模蚀刻上层和下层，通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻硅层以形成半导体，通过使用回蚀工艺去除光致抗蚀剂图案的第二部分，通过使用光致抗蚀剂图案作为蚀刻掩模来选择性地湿法蚀刻导体层的上层，通过使用光致抗蚀剂干蚀刻导体层的下层图案作为蚀刻掩模以形成包括剩余的上层和下层的数据线和漏极，并且形成连接到漏电极的像素电极。

9. 发明申请

US20090174835A1 LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME TO HAVE TFT'S WITH PIXEL ELECTRODES INTEGRALLY EXTENDING FROM ONE OF THE SOURCE/DRAIN ELECTRODES 有权
标题翻译：液晶显示器及其制造方法，使其具有从像素电极组成的TFT，从电源/漏极电极中积分扩展
公开(公告)号：US20090174835A1
公开(公告)日：2009-07-09
申请号：US12344075
申请日：2008-12-24
申请人： Je-Hun Lee , Do-Hyun Kim , Tae-Sang Kim , Kyung-Seok Son , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Tae-Sang Kim , Kyung-Seok Son , Chang-Oh Jeong
IPC分类号： G02F1/1368 , H01L21/70 , H01L27/12
CPC分类号： H01L33/0095 , G02F1/133512 , G02F1/133516 , G02F1/136209 , G02F1/1368 , G02F2001/133397 , G02F2001/136222 , G02F2001/136231 , G02F2001/13685 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs.
摘要翻译：液晶显示器（LCD）包括薄膜晶体管（TFT），每个薄膜晶体管具有间隔开的源/漏电极和设置在源/漏电极之间和之间的氧化物型半导体膜，以限定有源层。源/漏电极中的每一个包括细分透明导电层的一部分，其中透明导电层的一个细分从其源极/漏极之一内延伸，以限定光学曝光的像素电极，其可靠地与一个源/漏电极。由于可以使用较少数量的光刻掩模来形成TFT，所以可以降低批量生产成本并提高生产可靠性。

10. 发明申请

US20070122649A1 Thin film transistor substrate for display 审中-公开
标题翻译：用于显示的薄膜晶体管基板
公开(公告)号：US20070122649A1
公开(公告)日：2007-05-31
申请号：US11595395
申请日：2006-11-08
申请人： Je-Hun Lee , Shi-Yul Kim , Do-Hyun Kim , Byeong-Beom Kim , Chang-Oh Jeong , Jun-Young Lee , Yang-Ho Bae , Sung-Wook Kang
发明人： Je-Hun Lee , Shi-Yul Kim , Do-Hyun Kim , Byeong-Beom Kim , Chang-Oh Jeong , Jun-Young Lee , Yang-Ho Bae , Sung-Wook Kang
IPC分类号： B32B15/20 , B32B19/00 , C23C14/00 , B05D1/36
CPC分类号： H01L29/458 , G02F2001/13629 , G02F2001/136295 , H01L27/124 , H01L29/4908 , Y10T428/12903
摘要： A conductive structure containing copper is capable of being etched to have a reliable profile where the copper layer is free of corrosion or oxidation includes a barrier layer formed on an insulating or semiconductor substrate followed by a copper layer, a blocking layer and a capping layer. The copper layer includes copper or copper alloy. The barrier layer includes molybdenum (Mo), molybdenum nitride (MoN) or molybdenum alloy which includes at least one of MoW, MoTi, MoNb or MoZr. The blocking layer includes copper nitride, copper oxide or copper oxinitride. The capping layer includes molybdenum, molybdenum nitride (MoN) or molybdenum alloy which includes at least one of MoW, MoTi, MoNb and MoZr.
摘要翻译：包含铜的导电结构能够被蚀刻以具有可靠的轮廓，其中铜层没有腐蚀或氧化，包括形成在绝缘或半导体衬底上的阻挡层，之后是铜层，阻挡层和覆盖层。铜层包括铜或铜合金。阻挡层包括钼（Mo），氮化钼（MoN）或钼合金，其包括MoW，MoTi，MoNb或MoZr中的至少一种。阻挡层包括氮化铜，氧化铜或氧化氮铜。覆盖层包括钼，氮化钼（MoN）或钼合金，其包括MoW，MoTi，MoNb和MoZr中的至少一种。

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