会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Method to construct a high-assurance IPSec gateway using an unmodified commercial implementation
    • 使用未经修改的商业实现构建高保证IPSec网关的方法
    • US08250356B2
    • 2012-08-21
    • US12275322
    • 2008-11-21
    • Brian W. PrussKenneth C. FuchsTimothy M. Langham
    • Brian W. PrussKenneth C. FuchsTimothy M. Langham
    • H05L29/06
    • H04L63/0485H04L63/0263H04L63/164
    • A system and method of providing secure communications is provided. Messages are encrypted or decrypted in protected memory of a processor. Outbound messages from a secure network are prepared for encryption by adding a header outside of the protected memory and then encrypted in the protected memory. The encryption is performed by retrieving a key from a key cache as designated by rules in the header. The encrypted message is sent to the unsecure network. An inbound message from an unsecure network that is received in unprotected memory is sent to a decryption module in protected memory. The inbound message is decrypted using a key designated in its header and retrieved from the key cache. The decrypted message is returned to the unprotected memory, where it is stripped of the encryption header and then sent to its destination within the secure network.
    • 提供了提供安全通信的系统和方法。 消息在处理器的受保护的存储器中被加密或解密。 来自安全网络的出站消息通过在受保护的存储器之外添加头部然后在受保护的存储器中加密来准备加密。 通过从标题中的规则指定的密钥缓存中检索密钥来执行加密。 加密的消息被发送到不安全的网络。 在未受保护的存储器中接收到的来自不安全网络的入站消息被发送到受保护存储器中的解密模块。 使用在其报头中指定的并从密钥高速缓存中检索的密钥解密入站消息。 解密的消息被返回到不受保护的存储器,其中它被剥离加密头部,然后在安全网络内发送到其目的地。
    • 3. 发明授权
    • System and method of vetting data
    • 审查数据的制度和方法
    • US08424100B2
    • 2013-04-16
    • US12748645
    • 2010-03-29
    • Kenneth C. FuchsBrian W. PrussGary W. Schluckbier
    • Kenneth C. FuchsBrian W. PrussGary W. Schluckbier
    • G06F7/04
    • G06F9/526
    • Systems and methods for vetting data include receiving a notification at a second processor that a first processor has written first output data to an output data buffer in an output device. A hardware-implemented buffer access flag controls a permission for the first processor to write data to the output data buffer. The second processor sets the hardware-implemented buffer access flag to a first setting that prevents the first processor from writing additional output data to the output data buffer while the first output data in the output data buffer is being inspected. The second processor has a read-write permission to the hardware-implemented buffer access flag. The first processor has a read-only permission to the hardware-implemented buffer access flag.
    • 用于审查数据的系统和方法包括在第二处理器处接收到第一处理器已将第一输出数据写入输出设备中的输出数据缓冲器的通知。 硬件实现的缓冲器访问标志控制第一处理器将数据写入输出数据缓冲器的权限。 第二处理器将硬件实现的缓冲器访问标志设置为第一设置,以防止在检查输出数据缓冲器中的第一输出数据时第一处理器将额外的输出数据写入输出数据缓冲器。 第二个处理器具有对硬件实现的缓冲区访问标志的读写权限。 第一个处理器具有对硬件实现的缓冲区访问标志的只读权限。
    • 4. 发明申请
    • SYSTEM AND METHOD OF VETTING DATA
    • 系统和数据的方法
    • US20110239308A1
    • 2011-09-29
    • US12748645
    • 2010-03-29
    • Kenneth C. FuchsBrian W. PrussGary W. Schluckbier
    • Kenneth C. FuchsBrian W. PrussGary W. Schluckbier
    • G06F21/24G06F11/16
    • G06F9/526
    • Systems and methods for vetting data include receiving a notification at a second processor that a first processor has written first output data to an output data buffer in an output device. A hardware-implemented buffer access flag controls a permission for the first processor to write data to the output data buffer. The second processor sets the hardware-implemented buffer access flag to a first setting that prevents the first processor from writing additional output data to the output data buffer while the first output data in the output data buffer is being inspected. The second processor has a read-write permission to the hardware-implemented buffer access flag. The first processor has a read-only permission to the hardware-implemented buffer access flag.
    • 用于审查数据的系统和方法包括在第二处理器处接收到第一处理器已将第一输出数据写入输出设备中的输出数据缓冲器的通知。 硬件实现的缓冲器访问标志控制第一处理器将数据写入输出数据缓冲器的权限。 第二处理器将硬件实现的缓冲器访问标志设置为第一设置,以防止在检查输出数据缓冲器中的第一输出数据时第一处理器将额外的输出数据写入输出数据缓冲器。 第二个处理器具有对硬件实现的缓冲区访问标志的读写权限。 第一个处理器具有对硬件实现的缓冲区访问标志的只读权限。