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1. 发明申请

US20050030800A1 Multilayered phase change memory 有权
标题翻译：多层相变存储器
公开(公告)号：US20050030800A1
公开(公告)日：2005-02-10
申请号：US10634130
申请日：2003-08-04
申请人： Brian Johnson , Stephen Hudgens
发明人： Brian Johnson , Stephen Hudgens
IPC分类号： G11C16/02 , H01L45/00 , G11C29/00
CPC分类号： G11C13/0004 , G11C2213/52 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1273 , H01L45/144
摘要： A phase change layer may switch between more and less conductive states in response to electrical stimulation. The phase change layer may be positioned over a non-switching ovonic material which acts as an electrode, a resistive heater, and an insulating barrier. The phase change layer may be positioned over a non-switching ovonic material which acts as an electrode, a resistive heater, and a thermal barrier.
摘要翻译：响应于电刺激，相变层可以在越来越少的导电状态之间切换。相变层可以位于用作电极，电阻加热器和绝缘屏障的非开关式超声波材料上。相变层可以位于作为电极，电阻加热器和热障壁的非切换式超声波材料上。

2. 发明申请

US20100059729A1 Apparatus and method for memory 审中-公开
标题翻译：记忆装置和方法
公开(公告)号：US20100059729A1
公开(公告)日：2010-03-11
申请号：US12283113
申请日：2008-09-09
申请人： Stephen Hudgens
发明人： Stephen Hudgens
IPC分类号： H01L47/00 , H01L21/00
CPC分类号： H01L45/06 , H01L27/2463 , H01L45/1233 , H01L45/144 , H01L45/165
摘要： A programmable resistance memory includes a volume of programmable resistance material formed between and coupled to two electrodes. The volume of programmable resistance material includes a region of enhanced programmability that is positioned to maximize the effect of a programming current. The region of enhanced programmability is positioned at a distance from regions of high thermal conductivity, such as areas in close proximity to electrodes.
摘要翻译：可编程电阻存储器包括在两个电极之间形成并耦合到两个电极的可编程电阻材料的体积。可编程电阻材料的体积包括增强可编程性的区域，其被定位成使编程电流的影响最大化。增强的可编程性区域位于与导热系数高的区域，例如靠近电极的区域。

3. 发明申请

US20050029502A1 Processing phase change material to improve programming speed 有权
标题翻译：处理相变材料，提高编程速度
公开(公告)号：US20050029502A1
公开(公告)日：2005-02-10
申请号：US10633873
申请日：2003-08-04
申请人： Stephen Hudgens
发明人： Stephen Hudgens
IPC分类号： H01L45/00 , H01L47/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1625 , H01L45/165 , H01L45/1658
摘要： A phase change material may be processed to reduce its microcrystalline grain size and may also be processed to increase the crystallization or set programming speed of the material. For example, material doped with nitrogen to reduce grain size may be doped with titanium to reduce crystallization time.
摘要翻译：可以处理相变材料以降低其微晶粒度，并且还可以加工以增加材料的结晶或设定编程速度。例如，掺杂氮以减小晶粒尺寸的材料可以掺杂钛以减少结晶时间。

4. 发明申请

US20060006443A1 Electrically programmable memory element with reduced area of contact 有权
标题翻译：减少接触面积的电可编程存储元件
公开(公告)号：US20060006443A1
公开(公告)日：2006-01-12
申请号：US11221627
申请日：2005-09-08
申请人： Tyler Lowrey , Stephen Hudgens , Patrick Klersy
发明人： Tyler Lowrey , Stephen Hudgens , Patrick Klersy
IPC分类号： H01L27/108
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： A programmable resistance memory element having a conductive layer as an electrode. The conductive layer and memory material may have a small area of contact. In one embodiment, the conductive layer may be cup-shaped. In one embodiment, the memory element may include a chalcogenide material.
摘要翻译：一种具有导电层作为电极的可编程电阻存储元件。导电层和记忆材料可以具有小的接触面积。在一个实施例中，导电层可以是杯形的。在一个实施例中，存储元件可以包括硫族化物材料。

5. 发明申请

US20050003602A1 Programmable resistance memory element with multi-regioned contact 有权
标题翻译：具有多区域接触的可编程电阻存储元件
公开(公告)号：US20050003602A1
公开(公告)日：2005-01-06
申请号：US10891970
申请日：2004-07-15
申请人： Tyler Lowrey , Stephen Hudgens , Patrick Klersy
发明人： Tyler Lowrey , Stephen Hudgens , Patrick Klersy
IPC分类号： G11C11/56 , H01L27/24 , H01L45/00 , H01L21/8238
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： An electrically programmable memory element comprising a programmable resistance material and an electrical contact. The electrical contact having at least two portion wherein the first portion has a higher resistivity than the second portion.
摘要翻译：一种电可编程存储元件，包括可编程电阻材料和电触点。所述电触点具有至少两部分，其中所述第一部分具有比所述第二部分更高的电阻率。

6. 发明授权

US06567296B1 Memory device 有权
标题翻译：内存设备
公开(公告)号：US06567296B1
公开(公告)日：2003-05-20
申请号：US10041684
申请日：2001-10-24
申请人： Giulio Casagrande , Tyler Lowrey , Roberto Bez , Guy Wicker , Edward Spall , Stephen Hudgens , Wolodymyr Czubatyj
发明人： Giulio Casagrande , Tyler Lowrey , Roberto Bez , Guy Wicker , Edward Spall , Stephen Hudgens , Wolodymyr Czubatyj
IPC分类号： G11C1706
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C2213/72
摘要： A memory device including a plurality of memory cells, a plurality of insulated first regions of a first type of conductivity formed in a chip of semiconductor material, at least one second region of a second type of conductivity formed in each first region, a junction between each second region and the corresponding first region defining a unidirectional conduction access element for selecting a corresponding memory cell connected to the second region when forward biased, and at least one contact for contacting each first region; a plurality of access elements are formed in each first region, the access elements being grouped into at least one sub-set consisting of a plurality of adjacent access elements without interposition of any contact, and the memory device further includes means for forward biasing the access elements of each sub-set simultaneously.
摘要翻译：一种存储器件，包括多个存储器单元，形成在半导体材料的芯片中的第一类型的导电性的多个绝缘的第一区域，在每个第一区域中形成的至少一个第二导电类型的第二区域，每个第二区域和相应的第一区域限定单向传导访问元件，用于当正向偏置时选择连接到第二区域的对应的存储单元，以及用于接触每个第一区域的至少一个触点; 在每个第一区域中形成多个访问元件，所述访问元件被分组成由多个相邻的访问元件组成的至少一个子集，而不插入任何联系人，并且所述存储器设备还包括：每个子集的元素同时进行。

7. 发明授权

US4624862A Boron doped semiconductor materials and method for producing same 失效
公开(公告)号：US4624862A
公开(公告)日：1986-11-25
申请号：US668435
申请日：1984-11-05
申请人： Chi C. Yang , Ralph Mohr , Stephen Hudgens , Annette Johncock , Prem Nath
发明人： Chi C. Yang , Ralph Mohr , Stephen Hudgens , Annette Johncock , Prem Nath
IPC分类号： C23C16/30 , C23C14/14 , C23C16/50 , G03G5/082 , H01L21/205 , H01L31/04 , H01L31/20 , B05D5/12
CPC分类号： H01L31/206 , G03G5/08264 , G03G5/08278 , H01L21/02425 , H01L21/0245 , H01L21/02505 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L31/202 , Y02E10/50 , Y02P70/521
摘要： An improved p-type semiconductor alloy film, an improved substantially intrinsic amorphous semiconductor alloy film, improved photovoltaic and photoresponsive devices incorporating such films and r.f. and microwave glow discharge methods for fabricating same. The improved semiconductor alloy films preferably include at least silicon deposited by the glow discharge of a compound containing at least silicon and a boron species that remains substantially monoatomic as it is incorporated into the silicon matrix. The p-type film is particularly stable, is characterized by a non-narrowed band gap, reduced bulk stress, improved morphology, growth and adhesion and reduced peeling and cracking. The substantially intrinsic film is characterized by substantially reduced Staebler-Wronski degradation. The method includes the novel step of introducing a boron species that does not form higher order boron hydrides or other boron polymers or oligomers in the glow discharge plasma.

8. 发明授权

US07515460B2 Multilevel programming of phase change memory cells 有权
标题翻译：相变存储器单元的多级编程
公开(公告)号：US07515460B2
公开(公告)日：2009-04-07
申请号：US11606762
申请日：2006-11-30
申请人： George Gordon , Stephen Hudgens , Fabio Pellizzer , Agostino Pirovano
发明人： George Gordon , Stephen Hudgens , Fabio Pellizzer , Agostino Pirovano
IPC分类号： G11C11/00
CPC分类号： G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0083 , G11C2213/79
摘要： A method for programming a phase change memory cell is discussed. A phase change memory cell includes a memory element of a phase change material having a first state, in which the phase change material is crystalline and has a minimum resistance level, a second state in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states, in which the phase change material includes both crystalline regions and amorphous regions and has intermediate resistance levels. According to the method, a plurality of programming pulses are provided to the phase change memory cell; programming energies respectively associated to the programming pulses are lower than a threshold energy which is required to bring the phase change material to the second state.
摘要翻译：讨论了一种编程相变存储单元的方法。相变存储单元包括具有第一状态的相变材料的存储元件，其中所述相变材料是晶体并且具有最小电阻水平，所述相变材料是非晶态且具有最大电阻的第二状态电平和多个中间状态，其中相变材料包括结晶区域和非晶区域并具有中等电阻水平。根据该方法，向相变存储单元提供多个编程脉冲; 分别与编程脉冲相关联的编程能量低于使相变材料进入第二状态所需的阈值能量。

9. 发明申请

US20070096074A1 Electrically rewritable non-volatile memory element and method of manufacturing the same 有权
标题翻译：电可重写非易失性存储元件及其制造方法
公开(公告)号：US20070096074A1
公开(公告)日：2007-05-03
申请号：US11264129
申请日：2005-11-02
申请人： Isamu Asano , Natsuki Sato , Tyler Lowrey , Guy Wicker , Wolodymyr Czubatyj , Stephen Hudgens
发明人： Isamu Asano , Natsuki Sato , Tyler Lowrey , Guy Wicker , Wolodymyr Czubatyj , Stephen Hudgens
IPC分类号： H01L47/00
CPC分类号： H01L45/06 , H01L27/2436 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/148
摘要： A non-volatile memory element includes a first interlayer insulation layer 11 having a first through-hole 11a, a second interlayer insulation layer 12 having a second through-hole 12a formed on the first interlayer insulation layer 11, a bottom electrode 13 provided in the first through-hole 11, recording layer 15 containing phase change material provided in the second through-hole 12, a top electrode 16 provided on the second interlayer insulation layer 12, and a thin-film insulation layer 14 formed between the bottom electrode 13 and the recording layer 15. In accordance with this invention, the diameter D1 of a bottom electrode 13 buried in a first through-hole 11a is smaller than the diameter D2 of a second through-hole 12a, thereby decreasing the thermal capacity of the bottom electrode 13. Therefore, when a pore 14a is formed by dielectric breakdown in a thin-film insulation layer 14 and the vicinity is used as a heating region, the amount of heat escaping to the bottom electrode 13 is decreased, resulting in higher heating efficiency.
摘要翻译：非易失性存储元件包括具有第一通孔11a的第一层间绝缘层11，具有形成在第一层间绝缘层11上的第二通孔12a的第二层间绝缘层12，在第一通孔11中，设置在第二通孔12中的包含相变材料的记录层15，设置在第二层间绝缘层12上的顶部电极16和形成在第二通孔12的底部电极之间的薄膜绝缘层14 13和记录层15。根据本发明，埋在第一通孔11a中的底部电极13的直径D 1小于第二通孔12a的直径D 2，从而降低底部电极13的热容量。因此，当通过薄膜绝缘层14中的电介质击穿形成孔14a并且将其附近用作加热区域时，逸出到底部电极13的热量减少，导致更高的加热效率。

10. 发明申请

US20070077699A1 Multilevel programming of phase change memory cells 有权
标题翻译：相变存储器单元的多级编程
公开(公告)号：US20070077699A1
公开(公告)日：2007-04-05
申请号：US11606762
申请日：2006-11-30
申请人： George Gordon , Stephen Hudgens , Fabio Pellizzer , Agostino Pirovano
发明人： George Gordon , Stephen Hudgens , Fabio Pellizzer , Agostino Pirovano
IPC分类号： H01L21/8238
CPC分类号： G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0083 , G11C2213/79
摘要： A method for programming a phase change memory cell is disclosed. A phase change memory cell includes a memory element of a phase change material having a first state, in which the phase change material is crystalline and has a minimum resistance level, a second state in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states, in which the phase change material includes both crystalline regions and amorphous regions and has intermediate resistance levels. According to the method, a plurality of programming pulses are provided to the phase change memory cell; programming energies respectively associated to the programming pulses are lower than a threshold energy which is required to bring the phase change material to the second state.
摘要翻译：公开了一种用于编程相变存储器单元的方法。相变存储单元包括具有第一状态的相变材料的存储元件，其中所述相变材料是晶体并且具有最小电阻水平，所述相变材料是非晶态且具有最大电阻的第二状态电平和多个中间状态，其中相变材料包括结晶区域和非晶区域并具有中等电阻水平。根据该方法，向相变存储单元提供多个编程脉冲; 分别与编程脉冲相关联的编程能量低于使相变材料进入第二状态所需的阈值能量。

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