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1. 发明申请

US20110035523A1 Communication infrastructure for a data processing apparatus and a method of operation of such a communication infrastructure 有权
标题翻译：用于数据处理设备的通信基础设施和这种通信基础设施的操作方法
公开(公告)号：US20110035523A1
公开(公告)日：2011-02-10
申请号：US12461345
申请日：2009-08-07
申请人： Brett Stanley Feero , Peter Andrew Riocreux , Andrew David Tune
发明人： Brett Stanley Feero , Peter Andrew Riocreux , Andrew David Tune
IPC分类号： G06F13/00
CPC分类号： G06F13/4022 , G06F2213/0038
摘要： A communication infrastructure for a data processing apparatus, and a method of operation of such a communication infrastructure are provided. The communication infrastructure provides first and second switching circuits interconnected via a bidirectional link. Both of the switching circuits employ a multi-channel communication protocol, such that for each transaction a communication path is established from an initiating master interface to a target slave interface, with that communication path comprising m channels. The m channels comprise one or more forward channels from the initiating master interface to the target slave interface and one or more reverse channels from the target slave interface to the initiating master interface, and handshaking signals are associated with each of the m channels. The bidirectional link comprises n connection lines, where n is less than m, the bidirectional link supporting a first communication path from the first switching circuit to the second switching circuit and a second communication path in an opposite direction from the second switching circuit to the first switching circuit. Control circuitry is used to multiplex at least one forward channel of the first communication path and at least one reverse channel of the second communication path, with the multiplexing being performed in dependence on the handshaking signals associated with the channels to be multiplexed. This allows the 2m channels formed by the first and second communication paths to be provided by the n connection lines of the bidirectional link.
摘要翻译：提供了一种用于数据处理装置的通信基础设施，以及这种通信基础设施的操作方法。通信基础设施提供通过双向链路互连的第一和第二交换电路。两个开关电路采用多通道通信协议，使得对于每个事务，通信路径从启动主接口建立到目标从接口，该通信路径包括m个信道。 m个信道包括从初始主接口到目标从接口的一个或多个前向信道，以及从目标从接口到发起主接口的一个或多个反向信道，以及握手信号与m个信道中的每一个相关联。双向链路包括n个小于m的n个连接线，支持从第一开关电路到第二开关电路的第一通信路径的双向链路和与第二开关电路相反的第二通信路径开关电路。控制电路用于复用第一通信路径的至少一个前向信道和第二通信路径的至少一个反向信道，根据与要多路复用的信道相关联的握手信号执行复用。这允许由第一和第二通信路径形成的2m信道由双向链路的n个连接线提供。

2. 发明授权

US08285912B2 Communication infrastructure for a data processing apparatus and a method of operation of such a communication infrastructure 有权
标题翻译：用于数据处理设备的通信基础设施和这种通信基础设施的操作方法
公开(公告)号：US08285912B2
公开(公告)日：2012-10-09
申请号：US12461345
申请日：2009-08-07
申请人： Brett Stanley Feero , Peter Andrew Riocreux , Andrew David Tune
发明人： Brett Stanley Feero , Peter Andrew Riocreux , Andrew David Tune
IPC分类号： G06F13/00
CPC分类号： G06F13/4022 , G06F2213/0038
摘要： A communication infrastructure for a data processing apparatus, and a method of operation of such a communication infrastructure are provided. The communication infrastructure provides first and second switching circuits interconnected via a bidirectional link. Both of the switching circuits employ a multi-channel communication protocol, such that for each transaction a communication path is established from an initiating master interface to a target slave interface, with that communication path comprising m channels. The m channels comprise one or more forward channels from the initiating master interface to the target slave interface and one or more reverse channels from the target slave interface to the initiating master interface, and handshaking signals are associated with each of the m channels. The bidirectional link comprises n connection lines, where n is less than m, the bidirectional link supporting a first communication path from the first switching circuit to the second switching circuit and a second communication path in an opposite direction from the second switching circuit to the first switching circuit. Control circuitry is used to multiplex at least one forward channel of the first communication path and at least one reverse channel of the second communication path, with the multiplexing being performed in dependence on the handshaking signals associated with the channels to be multiplexed. This allows the 2m channels formed by the first and second communication paths to be provided by the n connection lines of the bidirectional link.
摘要翻译：提供了一种用于数据处理装置的通信基础设施，以及这种通信基础设施的操作方法。通信基础设施提供通过双向链路互连的第一和第二交换电路。两个开关电路采用多通道通信协议，使得对于每个事务，通信路径从启动主接口建立到目标从接口，该通信路径包括m个信道。 m个信道包括从初始主接口到目标从接口的一个或多个前向信道，以及从目标从接口到发起主接口的一个或多个反向信道，以及握手信号与m个信道中的每一个相关联。双向链路包括n个小于m的n个连接线，支持从第一开关电路到第二开关电路的第一通信路径的双向链路和与第二开关电路相反的第二通信路径开关电路。控制电路用于复用第一通信路径的至少一个前向信道和第二通信路径的至少一个反向信道，根据与要多路复用的信道相关联的握手信号执行复用。这允许由第一和第二通信路径形成的2m信道由双向链路的n个连接线提供。

3. 发明授权

US07664901B2 Data processing apparatus and method for arbitrating access to a shared resource 有权
标题翻译：用于仲裁对共享资源的访问的数据处理装置和方法
公开(公告)号：US07664901B2
公开(公告)日：2010-02-16
申请号：US11727647
申请日：2007-03-27
申请人： Peter Andrew Riocreux , Alistair Crone Bruce , Andrew David Tune
发明人： Peter Andrew Riocreux , Alistair Crone Bruce , Andrew David Tune
IPC分类号： G06F13/38
CPC分类号： G06F13/14 , G06F13/36
摘要： A data processing apparatus and method are providing for arbitrating access to a shared resource. The data processing apparatus has a plurality of logic elements sharing access to the shared resource, and arbitration circuitry which is responsive to requests by one or more of the logic elements for access to the shared resource to perform a priority determination operation to select one of the requests as a winning request. The arbitration circuitry applies an arbitration policy to associate priorities with each logic element, the arbitration policy comprising multiple priority groups, each priority group having a different priority and containing at least one of the logic elements. Within each priority group, the arbitration circuitry applies a priority ordering operation to attribute relative priorities to the logic elements within that priority group. Responsive to a predetermined event, the arbitration circuitry re-applies the priority ordering operation within at least one priority group prior to a subsequent performance of the priority determination operation. Such an approach has been found to provide a particularly flexible mechanism for performing arbitration, allowing a wide variety of different arbitration schemes to be implemented using the same arbitration hardware.
摘要翻译：数据处理装置和方法正在提供仲裁对共享资源的访问。数据处理装置具有共享对共享资源的访问的多个逻辑元件，以及响应于一个或多个逻辑元件对于共享资源的访问的请求的仲裁电路，以执行优先级确定操作，以选择请求作为获胜请求。仲裁电路应用仲裁策略以将优先级与每个逻辑元件相关联，仲裁策略包括多个优先级组，每个优先级组具有不同的优先级并且包含至少一个逻辑元件。在每个优先级组内，仲裁电路应用优先级排序操作来将相对优先级归因于该优先级组内的逻辑元件。响应于预定事件，仲裁电路在随后执行优先级确定操作之前在至少一个优先级组内重新应用优先级排序操作。已经发现这种方法提供了一种用于执行仲裁的特别灵活的机制，允许使用相同的仲裁硬件来实现各种不同的仲裁方案。

4. 发明申请

US20080244133A1 Data processing apparatus and method for arbitrating access to a shared resource 有权
标题翻译：用于仲裁对共享资源的访问的数据处理装置和方法
公开(公告)号：US20080244133A1
公开(公告)日：2008-10-02
申请号：US11727647
申请日：2007-03-27
申请人： Peter Andrew Riocreux , Alistair Crone Bruce , Andrew David Tune
发明人： Peter Andrew Riocreux , Alistair Crone Bruce , Andrew David Tune
IPC分类号： G06F13/36
CPC分类号： G06F13/14 , G06F13/36
摘要： A data processing apparatus and method are providing for arbitrating access to a shared resource. The data processing apparatus has a plurality of logic elements sharing access to the shared resource, and arbitration circuitry which is responsive to requests by one or more of the logic elements for access to the shared resource to perform a priority determination operation to select one of the requests as a winning request. The arbitration circuitry applies an arbitration policy to associate priorities with each logic element, the arbitration policy comprising multiple priority groups, each priority group having a different priority and containing at least one of the logic elements. Within each priority group, the arbitration circuitry applies a priority ordering operation to attribute relative priorities to the logic elements within that priority group. Responsive to a predetermined event, the arbitration circuitry re-applies the priority ordering operation within at least one priority group prior to a subsequent performance of the priority determination operation. Such an approach has been found to provide a particularly flexible mechanism for performing arbitration, allowing a wide variety of different arbitration schemes to be implemented using the same arbitration hardware.
摘要翻译：数据处理装置和方法正在提供仲裁对共享资源的访问。数据处理装置具有共享对共享资源的访问的多个逻辑元件，以及响应于一个或多个逻辑元件对于共享资源的访问的请求的仲裁电路，以执行优先级确定操作，以选择请求作为获胜请求。仲裁电路应用仲裁策略以将优先级与每个逻辑元件相关联，仲裁策略包括多个优先级组，每个优先级组具有不同的优先级并且包含至少一个逻辑元件。在每个优先级组内，仲裁电路应用优先级排序操作来将相对优先级归因于该优先级组内的逻辑元件。响应于预定事件，仲裁电路在随后执行优先级确定操作之前在至少一个优先级组内重新应用优先级排序操作。已经发现这种方法提供了一种用于执行仲裁的特别灵活的机制，允许使用相同的仲裁硬件来实现各种不同的仲裁方案。

5. 发明授权

US08732400B2 Data store maintenance requests in interconnects 有权
标题翻译：互连中的数据存储维护请求
公开(公告)号：US08732400B2
公开(公告)日：2014-05-20
申请号：US12923725
申请日：2010-10-05
申请人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
发明人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
IPC分类号： G06F12/00
CPC分类号： G06F13/362 , G06F13/1621 , G06F13/1689 , G06F13/364
摘要： Interconnect circuitry for a data processing apparatus is disclosed. The interconnect circuitry is configured to provide data routes via which at least one initiator device may access at least one recipient device. The interconnect circuitry comprises: at least one input for receiving transaction requests from the initiator device(s); at least one output for outputting transaction requests to the recipient device(s); a plurality of paths for transmitting said transaction requests between the at least one input and the at least one output; wherein at least one of said transaction requests comprises a data store maintenance request requesting a data store maintenance operation to be performed on data stores within the data processing apparatus; and control circuitry for routing the received transaction requests from the at least one input to the at least one output; wherein the control circuitry is configured to respond to receipt of the data store maintenance operation by transmitting the data store maintenance operation along at least one of the plurality of paths followed by a barrier transaction request, the control circuitry being configured to maintain an ordering of at least some transaction requests with respect to the barrier transaction request within a stream of transaction requests passing along the at least one of said plurality of paths, such that at least some transaction requests subsequent to the data store maintenance request in the stream of transaction requests are held behind the data store maintenance request by the barrier transaction request.
摘要翻译：公开了一种用于数据处理装置的互连电路。互连电路被配置为提供数据路由，至少一个发起者设备可经由该路由访问至少一个接收者设备。所述互连电路包括：用于接收来自所述发起者设备的交易请求的至少一个输入; 至少一个用于向所述接收方设备输出交易请求的输出; 用于在所述至少一个输入和所述至少一个输出之间传送所述事务请求的多条路径; 其中所述交易请求中的至少一个包括数据存储维护请求，请求在所述数据处理设备内的数据存储器上执行数据存储维护操作; 以及用于将所接收的交易请求从所述至少一个输入路由到所述至少一个输出的控制电路; 其中所述控制电路被配置为通过沿着所述多个路径中的至少一个路径发送所述数据存储维护操作来响应于所述数据存储维护操作的接收，所述控制电路被配置为维持在在沿所述多个路径中的至少一个路径传递的事务请求流内的至少一些关于屏障事务请求的事务请求，使得在事务请求流中的数据存储维护请求之后的至少一些事务请求是通过屏障事务请求在数据存储维护请求之后。

6. 发明申请

US20110125944A1 Synchronising activities of various components in a distributed system 有权
标题翻译：在分布式系统中同步各种组件的活动
公开(公告)号：US20110125944A1
公开(公告)日：2011-05-26
申请号：US12923906
申请日：2010-10-13
申请人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
发明人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
IPC分类号： G06F13/00
CPC分类号： G06F13/362 , G06F13/1621 , G06F13/1689 , G06F13/364
摘要： An initiator device for issuing transaction requests to a recipient device via an interconnect is disclosed. The initiator device comprises: at least one port for receiving requests from and issuing requests to said interconnect; a barrier generator for generating barrier transaction requests, the barrier transaction requests indicating to the interconnect that an ordering of at least some transaction requests within a stream of transaction requests passing through the interconnect should be maintained by not allowing reordering of at least some of the transaction requests that occur before the barrier transaction request in the stream of transaction requests with respect to the barrier transaction request; wherein in response to receipt of a synchronise request querying progress of at least a subset of transaction requests, the initiator device is responsive to action any pending transaction requests within the at least a subset of transaction request and to generate a barrier transaction request at the barrier generator and to issue the barrier transaction request to the interconnect via the at least one port, and in response to receiving a response to the barrier transaction request to issue an acknowledge signal as a response to the synchronise request.
摘要翻译：公开了一种用于经由互连向接收方设备发出交易请求的发起者设备。所述发起者设备包括：用于从所述互连接收请求并向所述互连发出请求的至少一个端口; 用于产生屏障事务请求的屏障发生器，所述屏障事务请求向所述互连指示通过所述互连的事务请求流内的至少一些事务请求的排序应该通过不允许重新排序所述事务中的至少一些来维持关于屏障交易请求的交易请求流中的屏障事务请求之前发生的请求; 其中响应于接收到查询至少一个事务请求的子集的进程的同步请求，所述发起者设备响应于所述事务请求的所述至少一个子集内的任何待处理的事务请求的动作，并在所述屏障上生成屏障事务请求并且经由至少一个端口向互连发出屏障事务请求，并且响应于接收到对屏障事务请求的响应来发出确认信号作为对同步请求的响应。

7. 发明申请

US20110119448A1 Data store maintenance requests in interconnects 有权
标题翻译：互连中的数据存储维护请求
公开(公告)号：US20110119448A1
公开(公告)日：2011-05-19
申请号：US12923725
申请日：2010-10-05
申请人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
发明人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
IPC分类号： G06F12/08 , G06F13/00
CPC分类号： G06F13/362 , G06F13/1621 , G06F13/1689 , G06F13/364
摘要： Interconnect circuitry for a data processing apparatus is disclosed. The interconnect circuitry is configured to provide data routes via which at least one initiator device may access at least one recipient device. The interconnect circuitry comprises: at least one input for receiving transaction requests from the initiator device(s); at least one output for outputting transaction requests to the recipient device(s); a plurality of paths for transmitting said transaction requests between the at least one input and the at least one output; wherein at least one of said transaction requests comprises a data store maintenance request requesting a data store maintenance operation to be performed on data stores within the data processing apparatus; and control circuitry for routing the received transaction requests from the at least one input to the at least one output; wherein the control circuitry is configured to respond to receipt of the data store maintenance operation by transmitting the data store maintenance operation along at least one of the plurality of paths followed by a barrier transaction request, the control circuitry being configured to maintain an ordering of at least some transaction requests with respect to the barrier transaction request within a stream of transaction requests passing along the at least one of said plurality of paths, such that at least some transaction requests subsequent to the data store maintenance request in the stream of transaction requests are held behind the data store maintenance request by the barrier transaction request.
摘要翻译：公开了一种用于数据处理装置的互连电路。互连电路被配置为提供数据路由，至少一个启动器设备可经由该路径访问至少一个接收设备。所述互连电路包括：用于接收来自所述发起者设备的交易请求的至少一个输入; 至少一个用于向所述接收方设备输出交易请求的输出; 用于在所述至少一个输入和所述至少一个输出之间传送所述事务请求的多条路径; 其中所述交易请求中的至少一个包括数据存储维护请求，请求在所述数据处理设备内的数据存储器上执行数据存储维护操作; 以及用于将所接收的交易请求从所述至少一个输入路由到所述至少一个输出的控制电路; 其中所述控制电路被配置为通过沿着所述多个路径中的至少一个路径发送所述数据存储维护操作来响应于所述数据存储维护操作的接收，所述控制电路被配置为维持在在沿所述多个路径中的至少一个路径传递的事务请求流内的至少一些关于屏障事务请求的事务请求，使得在事务请求流中的数据存储维护请求之后的至少一些事务请求是通过屏障事务请求在数据存储维护请求之后。

8. 发明授权

US08607006B2 Barrier transactions in interconnects 有权
标题翻译：互连中的障碍事务
公开(公告)号：US08607006B2
公开(公告)日：2013-12-10
申请号：US12923727
申请日：2010-10-05
申请人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
发明人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
IPC分类号： G06F13/00
CPC分类号： G06F13/362 , G06F13/1621 , G06F13/1689 , G06F13/364
摘要： Interconnect circuitry is configured to provide data routes via which at least one initiator device may access at least one recipient device. The circuitry including: at least one input for receiving transaction requests from at least one initiator device; at least one output for outputting transaction requests to the at least one recipient device; and at least one path for transmitting transaction requests between at least one input and at least one output. Also includes is control circuitry for routing the received transaction requests from at least one input to at least one output and responds to a barrier transaction request to maintain an ordering of at least some transaction requests with respect to said barrier transaction request within a stream of transaction requests passing along one of said at least one paths. Barrier transaction requests include an indicator of transaction requests whose ordering is to be maintained.
摘要翻译：互连电路被配置为提供数据路由，至少一个发起者设备可经由该路由访问至少一个接收者设备。所述电路包括：用于从至少一个发起者设备接收交易请求的至少一个输入; 用于向所述至少一个接收设备输出交易请求的至少一个输出; 以及用于在至少一个输入和至少一个输出之间传送事务请求的至少一个路径。还包括用于将接收到的交易请求从至少一个输入路由到至少一个输出的控制电路，并且响应于屏障事务请求以维持关于业务流内的所述屏障事务请求的至少一些交易请求的排序沿着所述至少一条路径中的一条通过的请求。阻塞事务请求包括要保持其顺序的事务请求的指示符。

9. 发明授权

US08463966B2 Synchronising activities of various components in a distributed system 有权
标题翻译：在分布式系统中同步各种组件的活动
公开(公告)号：US08463966B2
公开(公告)日：2013-06-11
申请号：US12923906
申请日：2010-10-13
申请人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
发明人： Peter Andrew Riocreux , Bruce James Mathewson , Christopher William Laycock , Richard Roy Grisenthwaite
IPC分类号： G06F13/00 , G06F13/364
CPC分类号： G06F13/362 , G06F13/1621 , G06F13/1689 , G06F13/364
摘要： The initiator device receives requests from and issues transaction requests to a recipient device via an interconnect. A barrier generator generates barrier transaction requests indicating to the interconnect that an ordering of some transaction requests within a stream of transaction requests passing through the interconnect should be maintained by not allowing reordering of some of the transaction requests that occur before the barrier transaction request in the stream of transaction requests with respect to the barrier transaction request. In response to a synchronize request querying progress of a subset of transaction requests, the initiator device actions any pending transaction requests within the subset of transaction request and the barrier generator generates and issues a barrier transaction request to the interconnect. In response to receiving a response to the barrier transaction request, the initiator device issues an acknowledge signal as a response to the synchronize request.
摘要翻译：发起者设备通过互连接收来自接收方设备的请求并向接收方设备发出事务请求。屏障发生器产生屏障事务请求，指示互连，通过互连的事务请求流内的某些事务请求的排序应该通过不允许在屏幕交易请求之前出现的一些事务请求的重新排序来维护关于屏障交易请求的交易请求流。响应于查询事务请求的子集的进程的同步请求，发起者设备动作事务请求子集内的任何待处理的事务请求，并且屏障生成器生成并向互连发出屏障事务请求。响应于接收到对屏障事务请求的响应，发起者设备发出确认信号作为对同步请求的响应。

10. 发明申请

US20090070493A1 Interconnect component and device configuration generation 审中-公开
标题翻译：互连组件和设备配置生成
公开(公告)号：US20090070493A1
公开(公告)日：2009-03-12
申请号：US12222449
申请日：2008-08-08
申请人： Peter Andrew Riocreux , Andrew Mark Nightingale
发明人： Peter Andrew Riocreux , Andrew Mark Nightingale
IPC分类号： G06F3/00
CPC分类号： G06F17/5045
摘要： A method of generating a configuration of an integrated circuit 2 having an interconnect component 14 connecting a plurality of devices 4, 6, 8, 10, 12 uses selecting a device to be connected to the interconnect component, reading interface parameters of that device from a file or model (e.g. IP-XACT), selecting parameters of an interface “if” of the interconnect component to match the read parameters, detecting and making any settings in the configuration of the interconnect component 14 itself required to match the selected parameters of the interface and then detecting any changes required in the configuration of any devices previously connected to the interconnect component required to match the configuration of the interconnect component as it now stands. In this way, configuration of the interconnect component can be at least semi-automated with a reduction in the possibility of errors and an increase in the speed of such configuration.
摘要翻译：产生具有连接多个设备4,6,8,10,12的互连部件14的集成电路2的配置的方法使用选择要连接到互连部件的设备，从该设备的接口参数从文件或模型（例如IP-XACT），选择互连组件的接口“if”的参数以匹配读取的参数，检测并进行互连组件14本身的配置中的任何设置，以使其匹配所选择的参数接口，然后检测配置以前连接到互连组件的任何设备所需的任何更改，以匹配互连组件的配置，如现在所示。以这种方式，互连部件的配置可以至少半自动化，同时降低了错误的可能性和这种配置的速度的增加。

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