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1. 发明授权

US06365421B2 Method and apparatus for storage of test results within an integrated circuit 失效
标题翻译：在集成电路内存储测试结果的方法和装置
公开(公告)号：US06365421B2
公开(公告)日：2002-04-02
申请号：US09531023
申请日：2000-03-20
申请人： Brett Debenham , Kim Pierce , Douglas J. Cutter , Kurt Beigel , Fan Ho , Patrick J. Mullarkey , Dien Luong , Hua Zheng , Michael Shore , Jeffrey P. Wright , Adrian E. Ong , Todd A. Merritt
发明人： Brett Debenham , Kim Pierce , Douglas J. Cutter , Kurt Beigel , Fan Ho , Patrick J. Mullarkey , Dien Luong , Hua Zheng , Michael Shore , Jeffrey P. Wright , Adrian E. Ong , Todd A. Merritt
IPC分类号： H01L2166
CPC分类号： H01L27/112 , G01R31/31702 , G01R31/3181 , G11C17/10 , G11C17/18
摘要： An integrated circuit memory device has a plurality of nonvolatile programmable elements which are used to store a pass/fail status bit at selected milestones in a test sequence. At selected points in the test process an element may be programmed to indicate that the device has passed the tests associated with the selected point in the process. Prior to performing further tests on the device, the element is read to verify that it passed previous tests in the test process. If the appropriate elements are not programmed, the device is rejected. A rejected device may be retested according to the previous test steps. Laser fuses, electrically programmable fuses or antifuses are used to store test results. The use of electrically writeable nonvolatile memory elements allows for programming of the elements after the device has been packaged.
摘要翻译：集成电路存储器件具有多个非易失性可编程元件，用于在测试序列中存储所选择的里程碑处的通过/失败状态位。在测试过程的选定点，元件可以被编程以指示设备已经通过与该过程中的所选点相关联的测试。在对设备执行进一步测试之前，读取该元素以验证其在测试过程中通过先前的测试。如果没有编写适当的元素，则设备被拒绝。可以根据先前的测试步骤重新测试被拒绝的设备。激光熔丝，电可编程熔丝或反熔丝用于存储测试结果。使用电可写非易失性存储器元件允许在器件被封装之后对元件进行编程。

2. 发明授权

US06194738B1 Method and apparatus for storage of test results within an integrated circuit 失效
标题翻译：在集成电路内存储测试结果的方法和装置
公开(公告)号：US06194738B1
公开(公告)日：2001-02-27
申请号：US09032417
申请日：1998-02-27
申请人： Brett Debenham , Kim Pierce , Douglas J. Cutter , Kurt Beigel , Fan Ho , Patrick J. Mullarkey , Dien Luong , Hua Zheng , Michael Shore , Jeffrey P. Wright , Adrian E. Ong , Todd A. Merritt
发明人： Brett Debenham , Kim Pierce , Douglas J. Cutter , Kurt Beigel , Fan Ho , Patrick J. Mullarkey , Dien Luong , Hua Zheng , Michael Shore , Jeffrey P. Wright , Adrian E. Ong , Todd A. Merritt
IPC分类号： H01L2358
CPC分类号： H01L27/112 , G01R31/31702 , G01R31/3181 , G11C17/10 , G11C17/18
摘要： An integrated circuit memory device has a plurality of nonvolatile programmable elements which are used to store a pass/fail status bit at selected milestones in a test sequence. At selected points in the test process an element may be programmed to indicate that the device has passed the tests associated with the selected point in the process. Prior to performing further tests on the device, the element is read to verify that it passed previous tests in the test process. If the appropriate elements are not programmed, the device is rejected. A rejected device may be retested according to the previous test steps. Laser fuses, electrically programmable fuses or antifuses are used to store test results. The use of electrically writeable nonvolatile memory elements allows for programming of the elements after the device has been packaged.
摘要翻译：集成电路存储器件具有多个非易失性可编程元件，用于在测试序列中存储所选择的里程碑处的通过/失败状态位。在测试过程的选定点，元件可以被编程以指示设备已经通过与该过程中的所选点相关联的测试。在对设备执行进一步测试之前，读取该元素以验证其在测试过程中通过先前的测试。如果没有编写适当的元素，则设备被拒绝。可以根据先前的测试步骤重新测试被拒绝的设备。激光熔丝，电可编程熔丝或反熔丝用于存储测试结果。使用电可写非易失性存储器元件允许在器件被封装之后对元件进行编程。

3. 发明授权

US6154410A Method and apparatus for reducing antifuse programming time 失效
标题翻译：减少反熔丝编程时间的方法和装置
公开(公告)号：US6154410A
公开(公告)日：2000-11-28
申请号：US795531
申请日：1997-02-05
申请人： Douglas J. Cutter , Kurt D. Beigel , Adrian E. Ong , Fan Ho , Patrick J. Mullarkey , Dien Luong , Brett Debenham , Kim Pierce
发明人： Douglas J. Cutter , Kurt D. Beigel , Adrian E. Ong , Fan Ho , Patrick J. Mullarkey , Dien Luong , Brett Debenham , Kim Pierce
IPC分类号： G11C17/18 , G11C7/00
CPC分类号： G11C17/18
摘要： Method and apparatus are disclosed for reducing antifuse programming time by connecting the programming voltage to the electrode of the antifuse element that has roughened polysilicon.
摘要翻译：公开了通过将编程电压连接到具有粗糙多晶硅的反熔丝元件的电极来减少反熔丝编程时间的方法和装置。

4. 发明授权

US06983404B2 Method and apparatus for checking the resistance of programmable elements 失效
标题翻译：用于检查可编程元件电阻的方法和装置
公开(公告)号：US06983404B2
公开(公告)日：2006-01-03
申请号：US09777036
申请日：2001-02-05
申请人： Douglas J. Cutter , Adrian E. Ong , Fan Ho , Kurt D. Beigel , Brett M. Debenham , Dien Luong , Kim Pierce , Patrick J. Mullarkey
发明人： Douglas J. Cutter , Adrian E. Ong , Fan Ho , Kurt D. Beigel , Brett M. Debenham , Dien Luong , Kim Pierce , Patrick J. Mullarkey
IPC分类号： G11C29/00
CPC分类号： G11C17/18
摘要： Method and apparatus are disclosed for checking the resistance of antifuse elements in an integrated circuit. A voltage based on the resistance of an antifuse element is compared to a voltage based on a known resistance, and an output signal is generated whose binary value indicates whether the resistance of the antifuse element is higher or lower than the known value of resistance. The method and apparatus are useful in verifying the programming of antifuse elements.
摘要翻译：公开了用于检查集成电路中的反熔丝元件的电阻的方法和装置。将基于反熔丝元件的电阻的电压与基于已知电阻的电压进行比较，并且生成其二进制值表示反熔丝元件的电阻是否高于或低于已知电阻值的输出信号。该方法和装置在验证反熔丝元件的编程方面是有用的。

5. 发明授权

US06185705B2 Method and apparatus for checking the resistance of programmable elements 失效
标题翻译：用于检查可编程元件电阻的方法和装置
公开(公告)号：US06185705B2
公开(公告)日：2001-02-06
申请号：US08813525
申请日：1997-03-07
申请人： Douglas J. Cutter , Adrian E. Ong , Fan Ho , Kurt D. Beigel , Brett M. Debenham , Dien Luong , Kim Pierce , Patrick J. Mullarkey
发明人： Douglas J. Cutter , Adrian E. Ong , Fan Ho , Kurt D. Beigel , Brett M. Debenham , Dien Luong , Kim Pierce , Patrick J. Mullarkey
IPC分类号： G11C2900
CPC分类号： G11C17/18
摘要： Method and apparatus are disclosed for checking the resistance of antifuse elements in an integrated circuit. A voltage based on the resistance of an antifuse element is compared to a voltage based on a known resistance, and an output signal is generated whose binary value indicates whether the resistance of the antifuse element is higher or lower than the known value of resistance. The method and apparatus are useful in verifying the programming of antifuse elements.
摘要翻译：公开了用于检查集成电路中的反熔丝元件的电阻的方法和装置。将基于反熔丝元件的电阻的电压与基于已知电阻的电压进行比较，并且生成其二进制值表示反熔丝元件的电阻是否高于或低于已知电阻值的输出信号。该方法和装置在验证反熔丝元件的编程方面是有用的。

6. 发明授权

US5706238A Self current limiting antifuse circuit 失效
标题翻译：自限流反熔丝电路
公开(公告)号：US5706238A
公开(公告)日：1998-01-06
申请号：US783623
申请日：1997-01-14
申请人： Douglas J. Cutter , Kurt D. Beigel , Adrian E. Ong , Fan Ho , Patrick J. Mullarkey , Dien S. Luong , Brett Debenham , Kim M. Pierce
发明人： Douglas J. Cutter , Kurt D. Beigel , Adrian E. Ong , Fan Ho , Patrick J. Mullarkey , Dien S. Luong , Brett Debenham , Kim M. Pierce
IPC分类号： G11C17/18 , G11C17/16
CPC分类号： G11C17/18
摘要： An antifuse bank includes a bank of self-decoupling anti fuse circuits. The anti fuse circuits are programmed according to a pattern of address bits by blowing antifuses corresponding to bits of the address. The antifuses are blown by applying a high voltage across the antifuse. As each antifuse is blown, its resistance drops and current through the antifuse increases. The self-decoupling circuit detects the increased current flow and, when the anti fuse resistance is sufficiently low, limits current flow through the anti fuse. The antifuse thus does not load the high voltage source as other antifuses are blown.
摘要翻译：反熔丝库包括一组自去耦反熔丝电路。反熔丝电路根据地址位的模式通过吹出与地址的位相对应的反熔丝来编程。通过在反熔丝上施加高电压来吹制反熔丝。当每个反熔丝熔断时，其电阻下降，并且通过反熔丝的电流增加。自解耦电路检测到增加的电流，当反熔丝电阻足够低时，限制电流通过反熔丝。因此，反熔丝因其他反熔丝被吹制而不加载高压源。

7. 发明授权

US5631862A Self current limiting antifuse circuit 失效
标题翻译：自限流反熔丝电路
公开(公告)号：US5631862A
公开(公告)日：1997-05-20
申请号：US611419
申请日：1996-03-05
申请人： Douglas J. Cutter , Kurt D. Beigel , Adrian E. Ong , Fan Ho , Patrick J. Mullarkey , Dien S. Luong , Brett Debenham , Kim M. Pierce
发明人： Douglas J. Cutter , Kurt D. Beigel , Adrian E. Ong , Fan Ho , Patrick J. Mullarkey , Dien S. Luong , Brett Debenham , Kim M. Pierce
IPC分类号： G11C17/18 , G11C17/16
CPC分类号： G11C17/18
摘要： An antifuse bank includes a bank of self-decoupling antifuse circuits. The antifuse circuits are programmed according to a pattern of address bits by blowing antifuses corresponding to bits of the address. The antifuses are blown by applying a high voltage across the antifuse. As each antifuse is blown, its resistance drops and current through the antifuse increases. The self-decoupling circuit detects the increased current flow and, when the antifuse resistance is sufficiently low, limits current flow through the antifuse. The antifuse thus does not load the high voltage source as other antifuses are blown.
摘要翻译：反熔丝库包括一组自解耦反熔丝电路。反熔丝电路根据地址位的模式通过吹出与地址的位相对应的反熔丝来编程。通过在反熔丝上施加高电压来吹制反熔丝。当每个反熔丝熔断时，其电阻下降，并且通过反熔丝的电流增加。自解耦电路检测到增加的电流，并且当反熔丝电阻足够低时，限制了通过反熔丝的电流流动。因此，反熔丝因其他反熔丝被吹制而不加载高压源。

8. 发明申请

US20110016352A1 PROGRAMMABLE MEMORY REPAIR SCHEME 有权
标题翻译：可编程存储器维修方案
公开(公告)号：US20110016352A1
公开(公告)日：2011-01-20
申请号：US12922425
申请日：2009-04-09
申请人： Adrian E. Ong , Fan Ho
发明人： Adrian E. Ong , Fan Ho
IPC分类号： G06F11/16 , G06F11/00
CPC分类号： G11C29/76 , G11C11/401 , G11C11/4085 , G11C29/027 , G11C29/04 , G11C29/12 , G11C29/4401 , G11C29/48 , G11C29/78 , G11C29/789 , G11C29/802 , G11C2229/743
摘要： The present disclosure provides semiconductor devices and methods, systems, and apparatus for testing and operating the same. A semiconductor memory device includes data storage elements and a repair circuit. The data storage elements include primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations. The repair circuit is programmable by another semiconductor device separate from the memory device to recognize a malfunctioning address of the primary data storage elements and the programmed repair circuit is configured to reroute memory access from a primary data storage element having the recognized malfunctioning address to a corresponding redundant data storage element.
摘要翻译：本公开提供了用于测试和操作该半导体器件的方法，系统和装置。半导体存储器件包括数据存储元件和修复电路。数据存储元件包括主数据存储元件和一个或多个冗余数据存储元件，主数据存储元件具有用于存储器存取操作的相应地址。修复电路由与存储器件分开的另一个半导体器件可编程，以识别主数据存储元件的故障地址，并且编程的修复电路被配置为将存储器访问从具有识别的故障地址的主数据存储元件重新路由到相应的冗余数据存储元件。

9. 发明授权

US06657914B1 Configurable addressing for multiple chips in a package 有权
标题翻译：封装中多个芯片的可配置寻址
公开(公告)号：US06657914B1
公开(公告)日：2003-12-02
申请号：US09909675
申请日：2001-07-19
申请人： Adrian E. Ong , Fan Ho
发明人： Adrian E. Ong , Fan Ho
IPC分类号： G11C800
CPC分类号： G11C8/10
摘要： A first semiconductor chip is provided. The first semiconductor chip is operable to be incorporated along with at least a second semiconductor chip of the same type into an integrated circuit device within in a single package. The integrated circuit device has a common address path for the first and second semiconductor chips. The first semiconductor chip includes a configurable addressing circuit operable to be configured so that the first semiconductor chip responds to a predetermined range of addresses in the common address path of the integrated circuit device, to decode an address conveyed in the common address path of the integrated circuit device, and to generate a selection signal if the address conveyed in the common address path falls within the predetermined range of addresses.
摘要翻译：提供第一半导体芯片。第一半导体芯片可操作地与至少一个相同类型的第二半导体芯片一起并入到单个封装内的集成电路器件中。集成电路器件具有用于第一和第二半导体芯片的公共地址路径。第一半导体芯片包括可配置寻址电路，其可操作以被配置为使得第一半导体芯片响应于集成电路器件的公共地址路径中的预定范围的地址，以对在集成电路器件的公共地址路径中传送的地址进行解码并且如果在公共地址路径中传送的地址落在地址的预定范围内，则产生选择信号。

10. 发明授权

US08446788B2 Programmable memory repair scheme 有权
公开(公告)号：US08446788B2
公开(公告)日：2013-05-21
申请号：US12922425
申请日：2009-04-09
申请人： Adrian E. Ong , Fan Ho
发明人： Adrian E. Ong , Fan Ho
IPC分类号： G11C7/00 , G11C29/00
CPC分类号： G11C29/76 , G11C11/401 , G11C11/4085 , G11C29/027 , G11C29/04 , G11C29/12 , G11C29/4401 , G11C29/48 , G11C29/78 , G11C29/789 , G11C29/802 , G11C2229/743
摘要： The present disclosure provides semiconductor devices and methods, systems, and apparatus for testing and operating the same. A semiconductor memory device includes data storage elements and a repair circuit. The data storage elements include primary data storage elements and one or more redundant data storage elements, the primary data storage elements having respective addresses for memory access operations. The repair circuit is programmable by another semiconductor device separate from the memory device to recognize a malfunctioning address of the primary data storage elements and the programmed repair circuit is configured to reroute memory access from a primary data storage element having the recognized malfunctioning address to a corresponding redundant data storage element.

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