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    • 1. 发明授权
    • Embedded dynamic random access memory device and method
    • 嵌入式动态随机存取存储器件及方法
    • US09059319B2
    • 2015-06-16
    • US12692760
    • 2010-01-25
    • Brent A. AndersonJohn E. Barth, Jr.Herbert L. HoEdward J. NowakWayne Trickle
    • Brent A. AndersonJohn E. Barth, Jr.Herbert L. HoEdward J. NowakWayne Trickle
    • H01L27/108H01L21/84H01L29/66
    • H01L21/84H01L27/1087H01L27/10894H01L29/66181
    • Embodiments of the invention provide an integrated circuit for an embedded dynamic random access memory (eDRAM), a semiconductor-on-insulator (SOI) wafer in which such an integrated circuit may be formed, and a method of forming an eDRAM in such an SOI wafer. One embodiment of the invention provides an integrated circuit for an embedded dynamic random access memory (eDRAM) comprising: a semiconductor-on-insulator (SOI) wafer including: an n-type substrate; an insulator layer atop the n-type substrate; and an active semiconductor layer atop the insulator layer; a plurality of deep trenches, each extending from a surface of the active semiconductor layer into the n-type substrate; a dielectric liner along a surface of each of the plurality of deep trenches; and an n-type conductor within each of the plurality of deep trenches, the dielectric liner separating the n-type conductor from the n-type substrate; wherein the n-type substrate, the dielectric liner, and the n-type conductor form a buried plate, a node dielectric, and a node plate, respectively, of a cell capacitor.
    • 本发明的实施例提供了一种用于嵌入式动态随机存取存储器(eDRAM),其中可形成这种集成电路的绝缘体上半导体(SOI)晶片的集成电路,以及在这种SOI中形成eDRAM的方法 晶圆。 本发明的一个实施例提供了一种用于嵌入式动态随机存取存储器(eDRAM)的集成电路,包括:绝缘体上半导体(SOI)晶片,其包括:n型衬底; 位于n型衬底顶部的绝缘体层; 和位于绝缘体层顶部的有源半导体层; 多个深沟槽,各自从有源半导体层的表面延伸到n型衬底中; 沿着所述多个深沟槽中的每一个的表面的电介质衬垫; 以及在所述多个深沟槽的每一个内的n型导体,所述电介质衬垫将所述n型导体与所述n型衬底分离; 其中所述n型衬底,所述电介质衬垫和所述n型导体分别形成电池电容器的掩埋板,节点电介质和节点板。
    • 2. 发明申请
    • EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD
    • 嵌入式动态随机访问存储器件和方法
    • US20110180862A1
    • 2011-07-28
    • US12692760
    • 2010-01-25
    • Brent A. AndersonJohn E. Barth, JR.Herbert L. HoEdward J. NowakWayne Trickle
    • Brent A. AndersonJohn E. Barth, JR.Herbert L. HoEdward J. NowakWayne Trickle
    • H01L27/12H01L27/108H01L21/8242
    • H01L21/84H01L27/1087H01L27/10894H01L29/66181
    • Embodiments of the invention provide an integrated circuit for an embedded dynamic random access memory (eDRAM), a semiconductor-on-insulator (SOI) wafer in which such an integrated circuit may be formed, and a method of forming an eDRAM in such an SOI wafer. One embodiment of the invention provides an integrated circuit for an embedded dynamic random access memory (eDRAM) comprising: a semiconductor-on-insulator (SOI) wafer including: an n-type substrate; an insulator layer atop the n-type substrate; and an active semiconductor layer atop the insulator layer; a plurality of deep trenches, each extending from a surface of the active semiconductor layer into the n-type substrate; a dielectric liner along a surface of each of the plurality of deep trenches; and an n-type conductor within each of the plurality of deep trenches, the dielectric liner separating the n-type conductor from the n-type substrate; wherein the n-type substrate, the dielectric liner, and the n-type conductor form a buried plate, a node dielectric, and a node plate, respectively, of a cell capacitor.
    • 本发明的实施例提供了一种用于嵌入式动态随机存取存储器(eDRAM),其中可形成这种集成电路的绝缘体上半导体(SOI)晶片的集成电路,以及在这种SOI中形成eDRAM的方法 晶圆。 本发明的一个实施例提供了一种用于嵌入式动态随机存取存储器(eDRAM)的集成电路,包括:绝缘体上半导体(SOI)晶片,其包括:n型衬底; 位于n型衬底顶部的绝缘体层; 和位于绝缘体层顶部的有源半导体层; 多个深沟槽,各自从有源半导体层的表面延伸到n型衬底中; 沿着所述多个深沟槽中的每一个的表面的电介质衬垫; 以及在所述多个深沟槽的每一个内的n型导体,所述电介质衬垫将所述n型导体与所述n型衬底分离; 其中所述n型衬底,所述电介质衬垫和所述n型导体分别形成电池电容器的掩埋板,节点电介质和节点板。