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1. 发明授权

US08892225B2 Wideband personal-radio recorder 有权
标题翻译：宽带个人无线电录音机
公开(公告)号：US08892225B2
公开(公告)日：2014-11-18
申请号：US12762950
申请日：2010-04-19
申请人： Brendan Walsh , Stefan Szasz , Madhukar Reddy
发明人： Brendan Walsh , Stefan Szasz , Madhukar Reddy
IPC分类号： G06F17/00 , H04B7/12 , H03J7/32 , H04B15/06 , H03D7/16 , H04L27/38 , H04H60/27 , H04H40/18 , H04B1/00 , H04H60/37 , G11B27/28 , H04N21/458 , H04H60/13
CPC分类号： H03D7/165 , G11B27/28 , H04B1/0007 , H04H40/18 , H04H60/13 , H04H60/27 , H04H60/37 , H04H2201/60 , H04L27/3818 , H04N21/458
摘要： Methods and apparatuses for concurrently recording multiple radio channels. A recorder includes a wideband tuner having a complex mixer for converting a received wideband RF signal to a complex signal that is then digitized. A digital front end module applies a number of complex down-mixers to the digital complex signal to generate the multiple radio channels in the baseband. Each one of the multiple radio channels in the baseband is further filtered, decimated and demodulated. A digital signal processing unit encodes each demodulated channel according to an audio compression format and stores the then encoded audio content to a storage unit. An RBDS decoder parses radio data service information associated with the stored audio content. The radio data service information is stored in a first section of the storage unit while the encoded audio content is stored in a second section of the storage unit.
摘要翻译：同时记录多个无线电频道的方法和装置。记录器包括具有用于将接收到的宽带RF信号转换成然后被数字化的复信号的复合混频器的宽带调谐器。数字前端模块将数个复数下混频器应用于数字复合信号，以在基带中生成多个无线电信道。基带中的多个无线电信道中的每一个被进一步滤波，抽取和解调。数字信号处理单元根据音频压缩格式对每个解调的信道进行编码，并将所编码的音频内容存储到存储单元。 RBDS解码器解析与所存储的音频内容相关联的无线电数据服务信息。无线电数据服务信息被存储在存储单元的第一部分中，而编码的音频内容被存储在存储单元的第二部分中。

2. 发明申请

US20110096874A1 WIDEBAND PERSONAL-RADIO RECORDER 有权
标题翻译：宽带个人无线电记录仪
公开(公告)号：US20110096874A1
公开(公告)日：2011-04-28
申请号：US12762950
申请日：2010-04-19
申请人： Brendan Walsh , Stefan Szasz , Madhukar Reddy
发明人： Brendan Walsh , Stefan Szasz , Madhukar Reddy
IPC分类号： H04L27/06
CPC分类号： H03D7/165 , G11B27/28 , H04B1/0007 , H04H40/18 , H04H60/13 , H04H60/27 , H04H60/37 , H04H2201/60 , H04L27/3818 , H04N21/458
摘要： Methods and apparatuses for concurrently recording multiple radio channels. A recorder includes a wideband tuner having a complex mixer for converting a received wideband RF signal to a complex signal that is then digitized. A digital front end module applies a number of complex down-mixers to the digital complex signal to generate the multiple radio channels in the baseband. Each one of the multiple radio channels in the baseband is further filtered, decimated and demodulated. A digital signal processing unit encodes each demodulated channel according to an audio compression format and stores the then encoded audio content to a storage unit. An RBDS decoder parses radio data service information associated with the stored audio content. The radio data service information is stored in a first section of the storage unit while the encoded audio content is stored in a second section of the storage unit.
摘要翻译：同时记录多个无线电频道的方法和装置。记录器包括具有用于将接收到的宽带RF信号转换成然后被数字化的复信号的复合混频器的宽带调谐器。数字前端模块将数个复数下混频器应用于数字复合信号，以在基带中生成多个无线电信道。基带中的多个无线电信道中的每一个被进一步滤波，抽取和解调。数字信号处理单元根据音频压缩格式对每个解调的信道进行编码，并将所编码的音频内容存储到存储单元。 RBDS解码器解析与所存储的音频内容相关联的无线电数据服务信息。无线电数据服务信息被存储在存储单元的第一部分中，而编码的音频内容被存储在存储单元的第二部分中。

3. 发明申请

US20100185664A1 SYSTEM AND METHOD FOR COMPENDING BLOGS 有权
标题翻译：用于组合博客的系统和方法
公开(公告)号：US20100185664A1
公开(公告)日：2010-07-22
申请号：US12665568
申请日：2008-06-20
申请人： Christopher C. Baggott , Allson L. Sales , Eric Stauffer , Brendan Walsh
发明人： Christopher C. Baggott , Allson L. Sales , Eric Stauffer , Brendan Walsh
IPC分类号： G06F17/30
CPC分类号： G06F17/30867 , G06F17/2705 , G06F17/30589 , G06F17/3089 , G06F17/30905
摘要： The present disclosure provides a system and method for preparing compended biogs, In at least one embodiment, a method of posting blog content to a compended blog comprises establishing a compended blog having a selected keyword, obtaining a blog content, processing the blog content to identify at least one blog content keyword contained within the blog content, comparing the identified blog content keyword to the selected keyword to determine whether a match exists based upon at least one predetermined criterion, and posting the blog content the compended blog if the comparison reveals a match based upon meeting or exceeding the predetermined criterion.
摘要翻译：本公开提供了一种用于制作补充生物体的系统和方法。在至少一个实施方案中，将博客内容发布到一个已有的博客的方法包括：建立具有所选关键词的获胜博客，获得博客内容，处理博客内容以识别包含在博客内容中的至少一个博客内容关键字，将所识别的博客内容关键字与所选择的关键字进行比较，以基于至少一个预定标准来确定是否存在匹配，以及如果比较显示匹配则将博客内容发布给所述博客内容基于满足或超过预定标准。

4. 发明申请

US20050266079A1 Process for making aqueous coated beadlets 审中-公开
标题翻译：制备水性涂层珠粒的方法
公开(公告)号：US20050266079A1
公开(公告)日：2005-12-01
申请号：US11190093
申请日：2005-07-26
申请人： Anand Achanta , Prasad Adusumilli , Ganesh Deshpande , Stanley Lech , Philip Oths , Arthur Vinen , Brendan Walsh
发明人： Anand Achanta , Prasad Adusumilli , Ganesh Deshpande , Stanley Lech , Philip Oths , Arthur Vinen , Brendan Walsh
IPC分类号： A61K9/16 , A61K9/22 , A61K9/26 , A61K9/50 , A61K9/54 , A61K31/137 , A61K31/192 , A61K31/4402 , A61K31/485 , A61K47/32 , A61K47/38 , A61P11/04 , A61K9/24 , A61K9/14
CPC分类号： A61K31/4402 , A61K9/5047 , A61K9/5078 , A61K9/5084 , A61K31/485
摘要： The present invention is directed to application of novel process conditions for aqueous coating techniques of water soluble active agents, and its application to production of sustained release beadlets of said agents. The improvement lies in the determination and use of the glass transition point for the water swellable polymer used to produce the sustained release effect, and control of the moisture content of the air by dew point.
摘要翻译：本发明涉及水溶性活性剂的水性涂布技术的新工艺条件的应用，以及其用于生产所述试剂缓释珠粒的应用。改进在于测定和使用用于产生持续释放效果的水溶胀性聚合物的玻璃化转变点，以及通过露点控制空气的含水量。

5. 发明授权

US06877145B2 Automatic generation of interconnect logic components 有权
标题翻译：自动生成互连逻辑元件
公开(公告)号：US06877145B2
公开(公告)日：2005-04-05
申请号：US09919806
申请日：2001-08-02
申请人： Sean Boylan , Derek Coburn , Tadhg Creedon , Denise De Paor , Vincent Gavin , Kevin J Hyland , Suzanne M Hughes , Kevin Jennings , Mike Lardner , Brendan Walsh
发明人： Sean Boylan , Derek Coburn , Tadhg Creedon , Denise De Paor , Vincent Gavin , Kevin J Hyland , Suzanne M Hughes , Kevin Jennings , Mike Lardner , Brendan Walsh
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： A program tool automatically generating interconnect logic for a system-on-a-chip is based on a library of operational cores and on a architecture which requires all data exchange between cores to proceed via shared memory, which may be ‘off-chip’. The architecture includes a data aggregation technique for access to memory with successive levels of arbitration.
摘要翻译：自动生成片上系统的互连逻辑的程序工具基于运行核心库和需要核心之间的所有数据交换的架构，通过可能是“片外”的共享存储器进行。该架构包括用于具有连续级别的仲裁来访问存储器的数据聚合技术。

6. 发明授权

US08046269B2 Auction based procurement system 有权
标题翻译：拍卖采购系统
公开(公告)号：US08046269B2
公开(公告)日：2011-10-25
申请号：US11700128
申请日：2007-01-31
申请人： John Lee , Tooraj Nikzadeh , Luther Tupponce , Brendan Walsh
发明人： John Lee , Tooraj Nikzadeh , Luther Tupponce , Brendan Walsh
IPC分类号： G06Q30/00
CPC分类号： G06Q30/08 , G06Q40/04
摘要： A method and system for performing an auction by determining a request for an item based on at least one of (i) an item to purchase, (ii) a performance specification of the item to purchase, and (iii) a term of a request for the item to purchase. The method and system include sending, through a network, the request for the item to an auctioneer machine server. Performance information is collected for each seller. Notice is provided that a performance evaluation has been received for a specific seller, and is on record with the provider of the information. Additional transaction costs may be captured and included as a separate line item in an auto-rebid auction environment.
摘要翻译：一种用于通过基于（i）要购买的项目，（ii）要购买的项目的性能指标和（iii）请求的项目中的至少一个来确定对项目的请求来执行拍卖的方法和系统用于购买物品。该方法和系统包括通过网络向拍卖机服务器发送该项目的请求。为每位卖家收集演出信息。提供了对特定卖方已经收到绩效评估的通知，并且与信息提供者有记录。额外的交易成本可以被捕获并作为单独的订单项包含在自动重新竞价拍卖环境中。

7. 发明授权

US5596763A Three input arithmetic logic unit forming mixed arithmetic and boolean combinations 失效
标题翻译：三输入算术逻辑单元形成混合算术和布尔组合
公开(公告)号：US5596763A
公开(公告)日：1997-01-21
申请号：US159285
申请日：1993-11-30
申请人： Karl M. Guttag , Richard Simpson , Brendan Walsh
发明人： Karl M. Guttag , Richard Simpson , Brendan Walsh
IPC分类号： G06F7/00 , G06F7/57 , G06F7/575 , G06F12/08 , G06T1/20 , G06F7/38 , G06F7/50
CPC分类号： G06F7/575 , G06F2207/382 , G06F7/49994
摘要： A three input arithmetic logic unit (230) forms a mixed arithmetic and Boolean combination of three multibit input signals. The arithmetic logic unit (230) first forms a Boolean combination and then forms an arithmetic combination. The current instruction drives an instruction decoder (250, 245) that generates the functions signals F0-F7 which control the combination formed. The three input arithmetic logic unit (230) preferably employs a set of bit circuits (400), each forming carry propagate, generate and kill signals. These signals may employed with a multilevel logic tree circuit and a carry input to produce a bit resultant and a carry output to the next bit circuit. This structure permits formation of selected arithmetic, Boolean or mixed arithmetic and Boolean function of the three input signals based upon the current instruction. Selection of the function signals enables the combination to be insensitive to one of the input signals, thus performs a two input function of remaining input signals. The instruction itself may include the function signals and function modification bits, or the function signals and function modification signals may be stored in a special data register. Function modification signals cause modification of the function signals prior to use. The three input arithmetic logic unit (230) includes a least significant bit carry-in generator (246) supplying a carry input to the least significant bit. This carry input is determined by the combination being formed, and generally is "1" only during subtraction. The carry input may be specified in the special purpose data register (D0) for certain instructions. The combination formed is optionally modified dependent upon the sign bit of one of the inputs.
摘要翻译：三输入算术逻辑单元（230）形成三个多位输入信号的混合运算和布尔组合。算术逻辑单元（230）首先形成布尔组合，然后形成算术组合。当前指令驱动产生控制所形成的组合的功能信号F0-F7的指令译码器（250,245）。三输入算术逻辑单元（230）优选地采用一组比特电路（400），每一组形成进位传播，产生和终止信号。这些信号可以与多级逻辑树电路和进位输入一起使用，以产生位结果和进位输出到下一位电路。该结构允许基于当前指令形成三个输入信号的所选算术，布尔或混合运算和布尔函数。功能信号的选择使得组合对输入信号之一不敏感，从而执行剩余输入信号的两个输入功能。指令本身可以包括功能信号和功能修改位，或者功能信号和功能修改信号可以存储在特殊数据寄存器中。功能修改信号在使用前会引起功能信号的修改。三输入算术逻辑单元（230）包括向最低有效位提供进位输入的最低有效位进位发生器（246）。该进位输入由形成的组合确定，并且通常在减法期间为“1”。某些指令可以在专用数据寄存器（D0）中指定进位输入。根据其中一个输入的符号位可选地修改形成的组合。

8. 发明授权

US09208245B2 System and method for compending blogs 有权
标题翻译：用于编辑博客的系统和方法
公开(公告)号：US09208245B2
公开(公告)日：2015-12-08
申请号：US12665568
申请日：2008-06-20
申请人： Christopher C. Baggott , Allson L. Sales , Eric Stauffer , Brendan Walsh
发明人： Christopher C. Baggott , Allson L. Sales , Eric Stauffer , Brendan Walsh
IPC分类号： G06F17/30
CPC分类号： G06F17/30867 , G06F17/2705 , G06F17/30589 , G06F17/3089 , G06F17/30905
摘要： The present disclosure provides a system and method for preparing compended biogs, In at least one embodiment, a method of posting blog content to a compended blog comprises establishing a compended blog having a selected keyword, obtaining a blog content, processing the blog content to identify at least one blog content keyword contained within the blog content, comparing the identified blog content keyword to the selected keyword to determine whether a match exists based upon at least one predetermined criterion, and posting the blog content the compended blog if the comparison reveals a match based upon meeting or exceeding the predetermined criterion.
摘要翻译：本公开提供了一种用于制作补充生物体的系统和方法。在至少一个实施方案中，将博客内容发布到一个已有的博客的方法包括：建立具有所选关键词的获胜博客，获得博客内容，处理博客内容以识别包含在博客内容中的至少一个博客内容关键字，将所识别的博客内容关键字与所选择的关键字进行比较，以基于至少一个预定标准来确定是否存在匹配，以及如果比较显示匹配则将博客内容发布给所述博客内容基于满足或超过预定标准。

9. 发明授权

US06568001B2 Loft bed assembly with multiple storage compartments 失效
公开(公告)号：US06568001B2
公开(公告)日：2003-05-27
申请号：US09975820
申请日：2001-10-12
申请人： Brendan Walsh
发明人： Brendan Walsh
IPC分类号： A47C1700
CPC分类号： A47C19/22 , A47B2220/04 , A47C19/207
摘要： A space-conscious, functional design for a loft bed. The design serves to optimize space by incorporating multi-functional features, such as drawers, closet space, or cabinet space, within the assembly for the bed itself. Specifically, a plurality of steps are substantially parallel to the length of the bed, and lead upwardly toward the foot of the bed for easy access to same. Such steps incorporate the aforementioned storage space, with access to the drawers or closets from a side position. As such, the unique assembly allows for a desk, computer work station, bar, or additional wide storage space below the bed and behind the steps, adding to the overall versatility of the assembly. Finally, in the preferred mode the unit is modular in nature and may be assembled and rearranged based upon user preference.

10. 发明授权

US5465224A Three input arithmetic logic unit forming the sum of a first Boolean combination of first, second and third inputs plus a second Boolean combination of first, second and third inputs 失效
标题翻译：三输入算术逻辑单元形成第一，第二和第三输入的第一布尔组合和第一，第二和第三输入的第二布尔组合的和
公开(公告)号：US5465224A
公开(公告)日：1995-11-07
申请号：US160113
申请日：1993-11-30
申请人： Karl M. Guttag , Richard Simpson , Brendan Walsh
发明人： Karl M. Guttag , Richard Simpson , Brendan Walsh
IPC分类号： G06F7/509 , G06F7/527 , G06F7/53 , G06F7/575 , G06F12/08 , G06T1/20 , G06T11/00 , G06F7/38
CPC分类号： G06F7/575
摘要： A three input arithmetic logic unit (230) forms a mixed arithmetic and Boolean combination of three multibit input signals. The arithmetic logic unit (230) first forms a Boolean combination and then forms an arithmetic combination. The current instruction drives an instruction decoder (250, 245) that generates the functions signals F0-F7 which control the combination formed. The arithmetic logic unit (230) includes a first three input Boolean function generator (496) forming a Boolean combination F1(A,B,C), a second three input Boolean function generator (497) forming a Boolean combination F2(A,B,C), and an adder (495) forming the sum of the two Boolean combinations. The first Boolean combination F1(A,B,C) and the second Boolean combination F2(A,B,C) are independently selected from the set of all possible Boolean combinations of three multibit input signals A, B and C. The adder (495) includes a least significant bit carry-in generator (246) supplying a carry input to the least significant bit. This carry input is determined by the combination being formed, and generally is "1" only during subtraction.
摘要翻译：三输入算术逻辑单元（230）形成三个多位输入信号的混合运算和布尔组合。算术逻辑单元（230）首先形成布尔组合，然后形成算术组合。当前指令驱动产生控制所形成的组合的功能信号F0-F7的指令译码器（250,245）。算术逻辑单元（230）包括形成布尔组合F1（A，B，C）的第一三输入布尔函数发生器（496），形成布尔组合F2（A，B，C）的第二三输入布尔函数发生器，C）和形成两个布尔组合之和的加法器（495）。第一布尔组合F1（A，B，C）和第二布尔组合F2（A，B，C）从三个多位输入信号A，B和C的所有可能布尔组合的集合中独立地选择。加法器 495）包括向最低有效位提供进位输入的最低有效位进位发生器（246）。该进位输入由形成的组合确定，并且通常在减法期间为“1”。

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