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    • 1. 发明申请
    • Motion-Adaptive Alternate Gamma Drive for LCD
    • 用于LCD的运动自适应替代伽马驱动器
    • US20090109290A1
    • 2009-04-30
    • US12254289
    • 2008-10-20
    • Bo YeTaesung KimChung Phan Vu
    • Bo YeTaesung KimChung Phan Vu
    • H04N7/18G06K9/40
    • G09G3/3611G09G3/2025G09G2320/0247G09G2320/0252G09G2320/0261G09G2320/0673G09G2320/103
    • Systems and methods are provided for reducing motion blur in a video display. A system for reducing motion blur in a video display may include a motion detection circuit and a luminance control circuit. The motion detection circuit may be used to compare a plurality of frames in a video signal to generate a motion detection output signal that indicates whether the video signal includes an image that is in motion or a still image. The luminance control circuit may be used to vary luminance levels between two or more consecutive frames of the video signal when the motion detection output signal indicates that the video signal includes an image that is in motion. The luminance control circuit further may also be used to discontinue varying the luminance levels of the video signal when the motion detection output signal indicates that the video signal includes a still image.
    • 提供了用于减少视频显示中的运动模糊的系统和方法。 用于减少视频显示中的运动模糊的系统可以包括运动检测电路和亮度控制电路。 运动检测电路可以用于比较视频信号中的多个帧,以产生指示视频信号是包括运动中的图像还是静止图像的运动检测输出信号。 当运动检测输出信号指示视频信号包括运动中的图像时,亮度控制电路可用于改变视频信号的两个或更多个连续帧之间的亮度级别。 当运动检测输出信号指示视频信号包括静止图像时,亮度控制电路还可用于停止改变视频信号的亮度级。
    • 2. 发明授权
    • Motion-adaptive alternate gamma drive for LCD
    • 适用于LCD的运动自适应替代伽马驱动器
    • US08804048B2
    • 2014-08-12
    • US12254289
    • 2008-10-20
    • Bo YeTaesung KimChung Phan Vu
    • Bo YeTaesung KimChung Phan Vu
    • H04N7/18
    • G09G3/3611G09G3/2025G09G2320/0247G09G2320/0252G09G2320/0261G09G2320/0673G09G2320/103
    • Systems and methods are provided for reducing motion blur in a video display. A system for reducing motion blur in a video display may include a motion detection circuit and a luminance control circuit. The motion detection circuit may be used to compare a plurality of frames in a video signal to generate a motion detection output signal that indicates whether the video signal includes an image that is in motion or a still image. The luminance control circuit may be used to vary luminance levels between two or more consecutive frames of the video signal when the motion detection output signal indicates that the video signal includes an image that is in motion. The luminance control circuit further may also be used to discontinue varying the luminance levels of the video signal when the motion detection output signal indicates that the video signal includes a still image.
    • 提供了用于减少视频显示中的运动模糊的系统和方法。 用于减少视频显示中的运动模糊的系统可以包括运动检测电路和亮度控制电路。 运动检测电路可以用于比较视频信号中的多个帧,以产生指示视频信号是包括运动中的图像还是静止图像的运动检测输出信号。 当运动检测输出信号指示视频信号包括运动中的图像时,亮度控制电路可用于改变视频信号的两个或更多个连续帧之间的亮度级别。 当运动检测输出信号指示视频信号包括静止图像时,亮度控制电路还可用于停止改变视频信号的亮度级。
    • 4. 发明授权
    • Complex-shaped video overlay using multi-bit row and column index registers
    • 使用多位行和列索引寄存器的复杂形状的视频叠加
    • US07400328B1
    • 2008-07-15
    • US10906409
    • 2005-02-18
    • Bo YeJimmy YangEdmund Cheung
    • Bo YeJimmy YangEdmund Cheung
    • G06F13/00G09G5/00
    • G09G5/14G09G5/397G09G2340/125
    • A graphics system reduces fetching from memory of color-key pixels when video pixels from a video-overlay window are displayed. A frame buffer is divided into multi-line, multi-pixel blocks that are arranged in block-rows and block-columns. Each block-row has primary and secondary row indicator bits and each block-column has two column indicator bits. When the primary row indicator bit is cleared, all pixels in the block-row are fetched from a frame-buffer memory. When the primary row indicator is set, a secondary row indicator bit selects either first or second column indicator bits for reading. When the selected column indicator bit for a block-column is set, fetching of pixels from the frame buffer memory is skipped. Instead, dummy color-key pixels are generated and inserted into the pixel stream. These dummy pixels match the color key and cause video pixels to be sent to the display. Memory fetching is reduced.
    • 当显示来自视频覆盖窗口的视频像素时,图形系统减少从色键像素的存储器中取出。 帧缓冲器被分成多行,多像素块,以块行和块列排列。 每个块行都有主行和第二行指示符位,每个块列有两个列指示符位。 当主行指示符位清零时,块行中的所有像素都从帧缓冲存储器中取出。 当主行指示符被设置时,辅助行指示符位选择用于读取的第一或第二列指示符位。 当设置块列的所选列指示符位时,跳过帧缓冲存储器中的像素。 相反,生成虚拟色键像素并将其插入到像素流中。 这些虚拟像素与彩色键匹配,并导致将视频像素发送到显示器。 内存提取减少。
    • 5. 发明授权
    • Display rotation using a small line buffer and optimized memory access
    • 使用小线缓冲区显示旋转和优化的内存访问
    • US07307635B1
    • 2007-12-11
    • US10906091
    • 2005-02-02
    • Jimmy YangBo YeEdward M. Jacobs
    • Jimmy YangBo YeEdward M. Jacobs
    • G09G5/36G09G5/00G06K9/32
    • G09G5/37G09G5/393G09G2340/0492
    • A frame buffer stores X pixels per line and Y lines and is read using a burst of B pixels. The un-rotated image is rotated by 90 degrees for display by writing and reading pixels from a line buffer. The line buffer stores a block of B*Y pixels. The frame buffer is logically divided into X/B blocks that are B pixels wide. Blocks are read from the frame buffer from the bottom line to the top with a burst of B pixels per line. An offset locate pixels to read in the line buffer. The offset is B for the first block, and increases by a factor of B for each block read, but wraps around modulo B*Y−1. Pixels for a next block are written into the line buffer to locations vacated as pixels are read out. The increasing offset re-orders the pixels for the rotated display order.
    • 帧缓冲器存储每行X行和Y行,并使用B像素的脉冲串进行读取。 通过从行缓冲区中写入和读取像素,未旋转的图像旋转90度以进行显示。 行缓冲器存储一组B * Y像素。 帧缓冲器在逻辑上被划分为B像素宽的X / B块。 块从帧缓冲区从底行到顶部读取,每行具有B个像素的突发。 偏移量定位要在行缓冲区中读取的像素。 第一个块的偏移量为B,对于每个块读取增加一个因子B,而是围绕模B * Y-1。 下一个块的像素被写入行缓冲器到读出像素的位置。 增加的偏移重新排列旋转显示顺序的像素。
    • 6. 发明授权
    • Delay compensation circuit
    • 延时补偿电路
    • US06819157B2
    • 2004-11-16
    • US09991231
    • 2001-11-15
    • Xianguo CaoObed DuardoBo Ye
    • Xianguo CaoObed DuardoBo Ye
    • H03H1126
    • G06F1/10H03L7/0814
    • A delay compensation circuit that determines the effects of process, voltage, and temperature (PVT) conditions of a chip by measuring the effective delay time of delay components inside the chip. The delay compensation circuit includes a plurality of sampler modules, each of which receives a delayed clock signal from one of a series of delay cells within a tapped delay circuit. The delay compensation circuit generates an output value based on the total number of sampling modules that lock into a fixed input signal using the delayed clock signals. Since the delay time of each delay cell changes based on variations of PVT conditions, the output values generated by the delay compensation circuit are determinate of PVT conditions in the chip. These output values can be used to design components to compensate for variances in PVT conditions or to control a variable delay component based on detected PVT conditions.
    • 一种延迟补偿电路,通过测量芯片内的延迟元件的有效延迟时间来确定芯片的工艺,电压和温度(PVT)条件的影响。 延迟补偿电路包括多个采样器模块,每个采样器模块从抽头延迟电路中的一系列延迟单元中的一个接收延迟的时钟信号。 延迟补偿电路使用延迟的时钟信号,基于锁定到固定输入信号的采样模块的总数来产生输出值。 由于每个延迟单元的延迟时间根据PVT条件的变化而变化,所以由延迟补偿电路产生的输出值确定了芯片中的PVT条件。 这些输出值可用于设计组件以补偿PVT条件中的方差,或者根据检测到的PVT条件来控制可变延迟分量。